physical.cc revision 4040
12391SN/A/* 22391SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 32391SN/A * All rights reserved. 42391SN/A * 52391SN/A * Redistribution and use in source and binary forms, with or without 62391SN/A * modification, are permitted provided that the following conditions are 72391SN/A * met: redistributions of source code must retain the above copyright 82391SN/A * notice, this list of conditions and the following disclaimer; 92391SN/A * redistributions in binary form must reproduce the above copyright 102391SN/A * notice, this list of conditions and the following disclaimer in the 112391SN/A * documentation and/or other materials provided with the distribution; 122391SN/A * neither the name of the copyright holders nor the names of its 132391SN/A * contributors may be used to endorse or promote products derived from 142391SN/A * this software without specific prior written permission. 152391SN/A * 162391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ron Dreslinski 292914Ssaidi@eecs.umich.edu * Ali Saidi 302391SN/A */ 312391SN/A 322391SN/A#include <sys/types.h> 332391SN/A#include <sys/mman.h> 342391SN/A#include <errno.h> 352391SN/A#include <fcntl.h> 362391SN/A#include <unistd.h> 372391SN/A#include <zlib.h> 382391SN/A 392391SN/A#include <iostream> 402391SN/A#include <string> 412391SN/A 423348Sbinkertn@umich.edu#include "arch/isa_traits.hh" 432391SN/A#include "base/misc.hh" 442391SN/A#include "config/full_system.hh" 453879Ssaidi@eecs.umich.edu#include "mem/packet_access.hh" 462394SN/A#include "mem/physical.hh" 472391SN/A#include "sim/builder.hh" 482415SN/A#include "sim/eventq.hh" 493348Sbinkertn@umich.edu#include "sim/host.hh" 502394SN/A 512391SN/Ausing namespace std; 522423SN/Ausing namespace TheISA; 532391SN/A 543012Ssaidi@eecs.umich.eduPhysicalMemory::PhysicalMemory(Params *p) 553012Ssaidi@eecs.umich.edu : MemObject(p->name), pmemAddr(NULL), port(NULL), lat(p->latency), _params(p) 562391SN/A{ 573012Ssaidi@eecs.umich.edu if (params()->addrRange.size() % TheISA::PageBytes != 0) 582391SN/A panic("Memory Size not divisible by page size\n"); 592391SN/A 602391SN/A int map_flags = MAP_ANON | MAP_PRIVATE; 613012Ssaidi@eecs.umich.edu pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE, 623918Ssaidi@eecs.umich.edu map_flags, -1, 0); 632391SN/A 643012Ssaidi@eecs.umich.edu if (pmemAddr == (void *)MAP_FAILED) { 652391SN/A perror("mmap"); 662391SN/A fatal("Could not mmap!\n"); 672391SN/A } 682391SN/A 693751Sgblack@eecs.umich.edu //If requested, initialize all the memory to 0 703751Sgblack@eecs.umich.edu if(params()->zero) 713751Sgblack@eecs.umich.edu memset(pmemAddr, 0, params()->addrRange.size()); 723751Sgblack@eecs.umich.edu 733012Ssaidi@eecs.umich.edu pagePtr = 0; 742391SN/A} 752391SN/A 762541SN/Avoid 772541SN/APhysicalMemory::init() 782541SN/A{ 792541SN/A if (!port) 802541SN/A panic("PhysicalMemory not connected to anything!"); 812541SN/A port->sendStatusChange(Port::RangeChange); 822541SN/A} 832541SN/A 842391SN/APhysicalMemory::~PhysicalMemory() 852391SN/A{ 863012Ssaidi@eecs.umich.edu if (pmemAddr) 873918Ssaidi@eecs.umich.edu munmap((char*)pmemAddr, params()->addrRange.size()); 882416SN/A //Remove memPorts? 892391SN/A} 902391SN/A 912391SN/AAddr 922391SN/APhysicalMemory::new_page() 932391SN/A{ 943012Ssaidi@eecs.umich.edu Addr return_addr = pagePtr << LogVMPageSize; 954040Ssaidi@eecs.umich.edu return_addr += start(); 962391SN/A 973012Ssaidi@eecs.umich.edu ++pagePtr; 982391SN/A return return_addr; 992391SN/A} 1002391SN/A 1012408SN/Aint 1022408SN/APhysicalMemory::deviceBlockSize() 1032408SN/A{ 1042409SN/A //Can accept anysize request 1052409SN/A return 0; 1062408SN/A} 1072408SN/A 1083012Ssaidi@eecs.umich.eduTick 1093349Sbinkertn@umich.eduPhysicalMemory::calculateLatency(PacketPtr pkt) 1103012Ssaidi@eecs.umich.edu{ 1113012Ssaidi@eecs.umich.edu return lat; 1123012Ssaidi@eecs.umich.edu} 1132413SN/A 1143170Sstever@eecs.umich.edu 1153170Sstever@eecs.umich.edu 1163170Sstever@eecs.umich.edu// Add load-locked to tracking list. Should only be called if the 1173170Sstever@eecs.umich.edu// operation is a load and the LOCKED flag is set. 1183170Sstever@eecs.umich.eduvoid 1193170Sstever@eecs.umich.eduPhysicalMemory::trackLoadLocked(Request *req) 1203170Sstever@eecs.umich.edu{ 1213170Sstever@eecs.umich.edu Addr paddr = LockedAddr::mask(req->getPaddr()); 1223170Sstever@eecs.umich.edu 1233170Sstever@eecs.umich.edu // first we check if we already have a locked addr for this 1243170Sstever@eecs.umich.edu // xc. Since each xc only gets one, we just update the 1253170Sstever@eecs.umich.edu // existing record with the new address. 1263170Sstever@eecs.umich.edu list<LockedAddr>::iterator i; 1273170Sstever@eecs.umich.edu 1283170Sstever@eecs.umich.edu for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) { 1293170Sstever@eecs.umich.edu if (i->matchesContext(req)) { 1303170Sstever@eecs.umich.edu DPRINTF(LLSC, "Modifying lock record: cpu %d thread %d addr %#x\n", 1313170Sstever@eecs.umich.edu req->getCpuNum(), req->getThreadNum(), paddr); 1323170Sstever@eecs.umich.edu i->addr = paddr; 1333170Sstever@eecs.umich.edu return; 1343170Sstever@eecs.umich.edu } 1353170Sstever@eecs.umich.edu } 1363170Sstever@eecs.umich.edu 1373170Sstever@eecs.umich.edu // no record for this xc: need to allocate a new one 1383170Sstever@eecs.umich.edu DPRINTF(LLSC, "Adding lock record: cpu %d thread %d addr %#x\n", 1393170Sstever@eecs.umich.edu req->getCpuNum(), req->getThreadNum(), paddr); 1403170Sstever@eecs.umich.edu lockedAddrList.push_front(LockedAddr(req)); 1413170Sstever@eecs.umich.edu} 1423170Sstever@eecs.umich.edu 1433170Sstever@eecs.umich.edu 1443170Sstever@eecs.umich.edu// Called on *writes* only... both regular stores and 1453170Sstever@eecs.umich.edu// store-conditional operations. Check for conventional stores which 1463170Sstever@eecs.umich.edu// conflict with locked addresses, and for success/failure of store 1473170Sstever@eecs.umich.edu// conditionals. 1483170Sstever@eecs.umich.edubool 1493170Sstever@eecs.umich.eduPhysicalMemory::checkLockedAddrList(Request *req) 1503170Sstever@eecs.umich.edu{ 1513170Sstever@eecs.umich.edu Addr paddr = LockedAddr::mask(req->getPaddr()); 1523170Sstever@eecs.umich.edu bool isLocked = req->isLocked(); 1533170Sstever@eecs.umich.edu 1543170Sstever@eecs.umich.edu // Initialize return value. Non-conditional stores always 1553170Sstever@eecs.umich.edu // succeed. Assume conditional stores will fail until proven 1563170Sstever@eecs.umich.edu // otherwise. 1573170Sstever@eecs.umich.edu bool success = !isLocked; 1583170Sstever@eecs.umich.edu 1593170Sstever@eecs.umich.edu // Iterate over list. Note that there could be multiple matching 1603170Sstever@eecs.umich.edu // records, as more than one context could have done a load locked 1613170Sstever@eecs.umich.edu // to this location. 1623170Sstever@eecs.umich.edu list<LockedAddr>::iterator i = lockedAddrList.begin(); 1633170Sstever@eecs.umich.edu 1643170Sstever@eecs.umich.edu while (i != lockedAddrList.end()) { 1653170Sstever@eecs.umich.edu 1663170Sstever@eecs.umich.edu if (i->addr == paddr) { 1673170Sstever@eecs.umich.edu // we have a matching address 1683170Sstever@eecs.umich.edu 1693170Sstever@eecs.umich.edu if (isLocked && i->matchesContext(req)) { 1703170Sstever@eecs.umich.edu // it's a store conditional, and as far as the memory 1713170Sstever@eecs.umich.edu // system can tell, the requesting context's lock is 1723170Sstever@eecs.umich.edu // still valid. 1733170Sstever@eecs.umich.edu DPRINTF(LLSC, "StCond success: cpu %d thread %d addr %#x\n", 1743170Sstever@eecs.umich.edu req->getCpuNum(), req->getThreadNum(), paddr); 1753170Sstever@eecs.umich.edu success = true; 1763170Sstever@eecs.umich.edu } 1773170Sstever@eecs.umich.edu 1783170Sstever@eecs.umich.edu // Get rid of our record of this lock and advance to next 1793170Sstever@eecs.umich.edu DPRINTF(LLSC, "Erasing lock record: cpu %d thread %d addr %#x\n", 1803170Sstever@eecs.umich.edu i->cpuNum, i->threadNum, paddr); 1813170Sstever@eecs.umich.edu i = lockedAddrList.erase(i); 1823170Sstever@eecs.umich.edu } 1833170Sstever@eecs.umich.edu else { 1843170Sstever@eecs.umich.edu // no match: advance to next record 1853170Sstever@eecs.umich.edu ++i; 1863170Sstever@eecs.umich.edu } 1873170Sstever@eecs.umich.edu } 1883170Sstever@eecs.umich.edu 1893170Sstever@eecs.umich.edu if (isLocked) { 1904040Ssaidi@eecs.umich.edu req->setExtraData(success ? 1 : 0); 1913170Sstever@eecs.umich.edu } 1923170Sstever@eecs.umich.edu 1933170Sstever@eecs.umich.edu return success; 1943170Sstever@eecs.umich.edu} 1953170Sstever@eecs.umich.edu 1963029Ssaidi@eecs.umich.eduvoid 1973349Sbinkertn@umich.eduPhysicalMemory::doFunctionalAccess(PacketPtr pkt) 1982413SN/A{ 1994040Ssaidi@eecs.umich.edu assert(pkt->getAddr() >= start() && 2004040Ssaidi@eecs.umich.edu pkt->getAddr() + pkt->getSize() <= start() + size()); 2012414SN/A 2023175Srdreslin@umich.edu if (pkt->isRead()) { 2033170Sstever@eecs.umich.edu if (pkt->req->isLocked()) { 2043170Sstever@eecs.umich.edu trackLoadLocked(pkt->req); 2053170Sstever@eecs.umich.edu } 2064040Ssaidi@eecs.umich.edu memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(), 2072641Sstever@eecs.umich.edu pkt->getSize()); 2083879Ssaidi@eecs.umich.edu#if TRACING_ON 2093879Ssaidi@eecs.umich.edu switch (pkt->getSize()) { 2103879Ssaidi@eecs.umich.edu case sizeof(uint64_t): 2113879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n", 2123879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>()); 2133879Ssaidi@eecs.umich.edu break; 2143879Ssaidi@eecs.umich.edu case sizeof(uint32_t): 2153879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n", 2163879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>()); 2173879Ssaidi@eecs.umich.edu break; 2183879Ssaidi@eecs.umich.edu case sizeof(uint16_t): 2193879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n", 2203879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>()); 2213879Ssaidi@eecs.umich.edu break; 2223879Ssaidi@eecs.umich.edu case sizeof(uint8_t): 2233879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read of size %i on address 0x%x data 0x%x\n", 2243879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>()); 2253879Ssaidi@eecs.umich.edu break; 2263879Ssaidi@eecs.umich.edu default: 2273879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read of size %i on address 0x%x\n", 2283879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr()); 2293879Ssaidi@eecs.umich.edu } 2303879Ssaidi@eecs.umich.edu#endif 2313175Srdreslin@umich.edu } 2323175Srdreslin@umich.edu else if (pkt->isWrite()) { 2333170Sstever@eecs.umich.edu if (writeOK(pkt->req)) { 2344040Ssaidi@eecs.umich.edu memcpy(pmemAddr + pkt->getAddr() - start(), pkt->getPtr<uint8_t>(), 2354040Ssaidi@eecs.umich.edu pkt->getSize()); 2363879Ssaidi@eecs.umich.edu#if TRACING_ON 2373879Ssaidi@eecs.umich.edu switch (pkt->getSize()) { 2383879Ssaidi@eecs.umich.edu case sizeof(uint64_t): 2393879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n", 2403879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>()); 2413879Ssaidi@eecs.umich.edu break; 2423879Ssaidi@eecs.umich.edu case sizeof(uint32_t): 2433879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n", 2443879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>()); 2453879Ssaidi@eecs.umich.edu break; 2463879Ssaidi@eecs.umich.edu case sizeof(uint16_t): 2473879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n", 2483879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>()); 2493879Ssaidi@eecs.umich.edu break; 2503879Ssaidi@eecs.umich.edu case sizeof(uint8_t): 2513879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Write of size %i on address 0x%x data 0x%x\n", 2523879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>()); 2533879Ssaidi@eecs.umich.edu break; 2543879Ssaidi@eecs.umich.edu default: 2553879Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Write of size %i on address 0x%x\n", 2563879Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr()); 2573879Ssaidi@eecs.umich.edu } 2583879Ssaidi@eecs.umich.edu#endif 2592631SN/A } 2604040Ssaidi@eecs.umich.edu } else if (pkt->isInvalidate()) { 2613175Srdreslin@umich.edu //upgrade or invalidate 2623175Srdreslin@umich.edu pkt->flags |= SATISFIED; 2634040Ssaidi@eecs.umich.edu } else if (pkt->isReadWrite()) { 2644040Ssaidi@eecs.umich.edu IntReg overwrite_val; 2654040Ssaidi@eecs.umich.edu bool overwrite_mem; 2664040Ssaidi@eecs.umich.edu uint64_t condition_val64; 2674040Ssaidi@eecs.umich.edu uint32_t condition_val32; 2684040Ssaidi@eecs.umich.edu uint64_t test_val64; 2694040Ssaidi@eecs.umich.edu uint32_t test_val32; 2704040Ssaidi@eecs.umich.edu 2714040Ssaidi@eecs.umich.edu assert(sizeof(IntReg) >= pkt->getSize()); 2724040Ssaidi@eecs.umich.edu 2734040Ssaidi@eecs.umich.edu overwrite_mem = true; 2744040Ssaidi@eecs.umich.edu // keep a copy of our possible write value, and copy what is at the 2754040Ssaidi@eecs.umich.edu // memory address into the packet 2764040Ssaidi@eecs.umich.edu memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize()); 2774040Ssaidi@eecs.umich.edu memcpy(pkt->getPtr<uint8_t>(), pmemAddr + pkt->getAddr() - start(), 2784040Ssaidi@eecs.umich.edu pkt->getSize()); 2794040Ssaidi@eecs.umich.edu 2804040Ssaidi@eecs.umich.edu if (pkt->req->isCondSwap()) { 2814040Ssaidi@eecs.umich.edu if (pkt->getSize() == sizeof(uint64_t)) { 2824040Ssaidi@eecs.umich.edu condition_val64 = htog(pkt->req->getExtraData()); 2834040Ssaidi@eecs.umich.edu memcpy(&test_val64, pmemAddr + pkt->getAddr() - start(), sizeof(uint64_t)); 2844040Ssaidi@eecs.umich.edu overwrite_mem = test_val64 == condition_val64; 2854040Ssaidi@eecs.umich.edu } else if (pkt->getSize() == sizeof(uint32_t)) { 2864040Ssaidi@eecs.umich.edu condition_val32 = htog((uint32_t)pkt->req->getExtraData()); 2874040Ssaidi@eecs.umich.edu memcpy(&test_val32, pmemAddr + pkt->getAddr() - start(), sizeof(uint32_t)); 2884040Ssaidi@eecs.umich.edu overwrite_mem = test_val32 == condition_val32; 2894040Ssaidi@eecs.umich.edu } else 2904040Ssaidi@eecs.umich.edu panic("Invalid size for conditional read/write\n"); 2914040Ssaidi@eecs.umich.edu } 2924040Ssaidi@eecs.umich.edu 2934040Ssaidi@eecs.umich.edu if (overwrite_mem) 2944040Ssaidi@eecs.umich.edu memcpy(pmemAddr + pkt->getAddr() - start(), 2954040Ssaidi@eecs.umich.edu &overwrite_val, pkt->getSize()); 2964040Ssaidi@eecs.umich.edu 2974040Ssaidi@eecs.umich.edu#if TRACING_ON 2984040Ssaidi@eecs.umich.edu switch (pkt->getSize()) { 2994040Ssaidi@eecs.umich.edu case sizeof(uint64_t): 3004040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n", 3014040Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint64_t>()); 3024040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n", 3034040Ssaidi@eecs.umich.edu overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't", 3044040Ssaidi@eecs.umich.edu condition_val64, overwrite_mem ? "happened" : "didn't happen"); 3054040Ssaidi@eecs.umich.edu break; 3064040Ssaidi@eecs.umich.edu case sizeof(uint32_t): 3074040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n", 3084040Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint32_t>()); 3094040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "New Data 0x%x %s conditional (0x%x) and %s \n", 3104040Ssaidi@eecs.umich.edu overwrite_mem, pkt->req->isCondSwap() ? "was" : "wasn't", 3114040Ssaidi@eecs.umich.edu condition_val32, overwrite_mem ? "happened" : "didn't happen"); 3124040Ssaidi@eecs.umich.edu break; 3134040Ssaidi@eecs.umich.edu case sizeof(uint16_t): 3144040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n", 3154040Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint16_t>()); 3164040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n", 3174040Ssaidi@eecs.umich.edu overwrite_mem); 3184040Ssaidi@eecs.umich.edu break; 3194040Ssaidi@eecs.umich.edu case sizeof(uint8_t): 3204040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x old data 0x%x\n", 3214040Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr(),pkt->get<uint8_t>()); 3224040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "New Data 0x%x wasn't conditional and happned\n", 3234040Ssaidi@eecs.umich.edu overwrite_mem); 3244040Ssaidi@eecs.umich.edu break; 3254040Ssaidi@eecs.umich.edu default: 3264040Ssaidi@eecs.umich.edu DPRINTF(MemoryAccess, "Read/Write of size %i on address 0x%x\n", 3274040Ssaidi@eecs.umich.edu pkt->getSize(), pkt->getAddr()); 3284040Ssaidi@eecs.umich.edu } 3294040Ssaidi@eecs.umich.edu#endif 3304040Ssaidi@eecs.umich.edu } else { 3312413SN/A panic("unimplemented"); 3322413SN/A } 3332420SN/A 3342641Sstever@eecs.umich.edu pkt->result = Packet::Success; 3352413SN/A} 3362413SN/A 3372413SN/APort * 3382738Sstever@eecs.umich.eduPhysicalMemory::getPort(const std::string &if_name, int idx) 3392413SN/A{ 3402738Sstever@eecs.umich.edu if (if_name == "port" && idx == -1) { 3412499SN/A if (port != NULL) 3422499SN/A panic("PhysicalMemory::getPort: additional port requested to memory!"); 3432640Sstever@eecs.umich.edu port = new MemoryPort(name() + "-port", this); 3442499SN/A return port; 3452519SN/A } else if (if_name == "functional") { 3463196Srdreslin@umich.edu /* special port for functional writes at startup. And for memtester */ 3472640Sstever@eecs.umich.edu return new MemoryPort(name() + "-funcport", this); 3482462SN/A } else { 3492462SN/A panic("PhysicalMemory::getPort: unknown port %s requested", if_name); 3502462SN/A } 3512413SN/A} 3522413SN/A 3532413SN/Avoid 3542413SN/APhysicalMemory::recvStatusChange(Port::Status status) 3552413SN/A{ 3562413SN/A} 3572413SN/A 3582640Sstever@eecs.umich.eduPhysicalMemory::MemoryPort::MemoryPort(const std::string &_name, 3592640Sstever@eecs.umich.edu PhysicalMemory *_memory) 3602914Ssaidi@eecs.umich.edu : SimpleTimingPort(_name), memory(_memory) 3612413SN/A{ } 3622413SN/A 3632413SN/Avoid 3642413SN/APhysicalMemory::MemoryPort::recvStatusChange(Port::Status status) 3652413SN/A{ 3662413SN/A memory->recvStatusChange(status); 3672413SN/A} 3682413SN/A 3692413SN/Avoid 3702522SN/APhysicalMemory::MemoryPort::getDeviceAddressRanges(AddrRangeList &resp, 3712522SN/A AddrRangeList &snoop) 3722413SN/A{ 3732522SN/A memory->getAddressRanges(resp, snoop); 3742497SN/A} 3752497SN/A 3762497SN/Avoid 3772522SN/APhysicalMemory::getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop) 3782497SN/A{ 3792522SN/A snoop.clear(); 3802522SN/A resp.clear(); 3814040Ssaidi@eecs.umich.edu resp.push_back(RangeSize(start(), 3823091Sstever@eecs.umich.edu params()->addrRange.size())); 3832413SN/A} 3842413SN/A 3852415SN/Aint 3862415SN/APhysicalMemory::MemoryPort::deviceBlockSize() 3872415SN/A{ 3882415SN/A return memory->deviceBlockSize(); 3892415SN/A} 3902413SN/A 3912413SN/ATick 3923349Sbinkertn@umich.eduPhysicalMemory::MemoryPort::recvAtomic(PacketPtr pkt) 3932413SN/A{ 3943029Ssaidi@eecs.umich.edu memory->doFunctionalAccess(pkt); 3953029Ssaidi@eecs.umich.edu return memory->calculateLatency(pkt); 3962413SN/A} 3972413SN/A 3982413SN/Avoid 3993349Sbinkertn@umich.eduPhysicalMemory::MemoryPort::recvFunctional(PacketPtr pkt) 4002413SN/A{ 4013612Srdreslin@umich.edu //Since we are overriding the function, make sure to have the impl of the 4023612Srdreslin@umich.edu //check or functional accesses here. 4033612Srdreslin@umich.edu std::list<std::pair<Tick,PacketPtr> >::iterator i = transmitList.begin(); 4043612Srdreslin@umich.edu std::list<std::pair<Tick,PacketPtr> >::iterator end = transmitList.end(); 4053612Srdreslin@umich.edu bool notDone = true; 4063612Srdreslin@umich.edu 4073612Srdreslin@umich.edu while (i != end && notDone) { 4083612Srdreslin@umich.edu PacketPtr target = i->second; 4093612Srdreslin@umich.edu // If the target contains data, and it overlaps the 4103612Srdreslin@umich.edu // probed request, need to update data 4113612Srdreslin@umich.edu if (target->intersect(pkt)) 4123612Srdreslin@umich.edu notDone = fixPacket(pkt, target); 4133612Srdreslin@umich.edu i++; 4143612Srdreslin@umich.edu } 4153612Srdreslin@umich.edu 4163091Sstever@eecs.umich.edu // Default implementation of SimpleTimingPort::recvFunctional() 4173091Sstever@eecs.umich.edu // calls recvAtomic() and throws away the latency; we can save a 4183091Sstever@eecs.umich.edu // little here by just not calculating the latency. 4192413SN/A memory->doFunctionalAccess(pkt); 4202413SN/A} 4212413SN/A 4222914Ssaidi@eecs.umich.eduunsigned int 4232914Ssaidi@eecs.umich.eduPhysicalMemory::drain(Event *de) 4242914Ssaidi@eecs.umich.edu{ 4252914Ssaidi@eecs.umich.edu int count = port->drain(de); 4262914Ssaidi@eecs.umich.edu if (count) 4272914Ssaidi@eecs.umich.edu changeState(Draining); 4282914Ssaidi@eecs.umich.edu else 4292914Ssaidi@eecs.umich.edu changeState(Drained); 4302914Ssaidi@eecs.umich.edu return count; 4312914Ssaidi@eecs.umich.edu} 4322413SN/A 4332391SN/Avoid 4342391SN/APhysicalMemory::serialize(ostream &os) 4352391SN/A{ 4362391SN/A gzFile compressedMem; 4372391SN/A string filename = name() + ".physmem"; 4382391SN/A 4392391SN/A SERIALIZE_SCALAR(filename); 4402391SN/A 4412391SN/A // write memory file 4422391SN/A string thefile = Checkpoint::dir() + "/" + filename.c_str(); 4432391SN/A int fd = creat(thefile.c_str(), 0664); 4442391SN/A if (fd < 0) { 4452391SN/A perror("creat"); 4462391SN/A fatal("Can't open physical memory checkpoint file '%s'\n", filename); 4472391SN/A } 4482391SN/A 4492391SN/A compressedMem = gzdopen(fd, "wb"); 4502391SN/A if (compressedMem == NULL) 4512391SN/A fatal("Insufficient memory to allocate compression state for %s\n", 4522391SN/A filename); 4532391SN/A 4543012Ssaidi@eecs.umich.edu if (gzwrite(compressedMem, pmemAddr, params()->addrRange.size()) != params()->addrRange.size()) { 4552391SN/A fatal("Write failed on physical memory checkpoint file '%s'\n", 4562391SN/A filename); 4572391SN/A } 4582391SN/A 4592391SN/A if (gzclose(compressedMem)) 4602391SN/A fatal("Close failed on physical memory checkpoint file '%s'\n", 4612391SN/A filename); 4622391SN/A} 4632391SN/A 4642391SN/Avoid 4652391SN/APhysicalMemory::unserialize(Checkpoint *cp, const string §ion) 4662391SN/A{ 4672391SN/A gzFile compressedMem; 4682391SN/A long *tempPage; 4692391SN/A long *pmem_current; 4702391SN/A uint64_t curSize; 4712391SN/A uint32_t bytesRead; 4722391SN/A const int chunkSize = 16384; 4732391SN/A 4742391SN/A 4752391SN/A string filename; 4762391SN/A 4772391SN/A UNSERIALIZE_SCALAR(filename); 4782391SN/A 4792391SN/A filename = cp->cptDir + "/" + filename; 4802391SN/A 4812391SN/A // mmap memoryfile 4822391SN/A int fd = open(filename.c_str(), O_RDONLY); 4832391SN/A if (fd < 0) { 4842391SN/A perror("open"); 4852391SN/A fatal("Can't open physical memory checkpoint file '%s'", filename); 4862391SN/A } 4872391SN/A 4882391SN/A compressedMem = gzdopen(fd, "rb"); 4892391SN/A if (compressedMem == NULL) 4902391SN/A fatal("Insufficient memory to allocate compression state for %s\n", 4912391SN/A filename); 4922391SN/A 4933012Ssaidi@eecs.umich.edu // unmap file that was mmaped in the constructor 4943012Ssaidi@eecs.umich.edu // This is done here to make sure that gzip and open don't muck with our 4953012Ssaidi@eecs.umich.edu // nice large space of memory before we reallocate it 4963918Ssaidi@eecs.umich.edu munmap((char*)pmemAddr, params()->addrRange.size()); 4972391SN/A 4983012Ssaidi@eecs.umich.edu pmemAddr = (uint8_t *)mmap(NULL, params()->addrRange.size(), PROT_READ | PROT_WRITE, 4992391SN/A MAP_ANON | MAP_PRIVATE, -1, 0); 5002391SN/A 5013012Ssaidi@eecs.umich.edu if (pmemAddr == (void *)MAP_FAILED) { 5022391SN/A perror("mmap"); 5032391SN/A fatal("Could not mmap physical memory!\n"); 5042391SN/A } 5052391SN/A 5062391SN/A curSize = 0; 5072391SN/A tempPage = (long*)malloc(chunkSize); 5082391SN/A if (tempPage == NULL) 5092391SN/A fatal("Unable to malloc memory to read file %s\n", filename); 5102391SN/A 5112391SN/A /* Only copy bytes that are non-zero, so we don't give the VM system hell */ 5123012Ssaidi@eecs.umich.edu while (curSize < params()->addrRange.size()) { 5132391SN/A bytesRead = gzread(compressedMem, tempPage, chunkSize); 5143012Ssaidi@eecs.umich.edu if (bytesRead != chunkSize && bytesRead != params()->addrRange.size() - curSize) 5152391SN/A fatal("Read failed on physical memory checkpoint file '%s'" 5162391SN/A " got %d bytes, expected %d or %d bytes\n", 5173012Ssaidi@eecs.umich.edu filename, bytesRead, chunkSize, params()->addrRange.size()-curSize); 5182391SN/A 5192391SN/A assert(bytesRead % sizeof(long) == 0); 5202391SN/A 5212391SN/A for (int x = 0; x < bytesRead/sizeof(long); x++) 5222391SN/A { 5232391SN/A if (*(tempPage+x) != 0) { 5243012Ssaidi@eecs.umich.edu pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long)); 5252391SN/A *pmem_current = *(tempPage+x); 5262391SN/A } 5272391SN/A } 5282391SN/A curSize += bytesRead; 5292391SN/A } 5302391SN/A 5312391SN/A free(tempPage); 5322391SN/A 5332391SN/A if (gzclose(compressedMem)) 5342391SN/A fatal("Close failed on physical memory checkpoint file '%s'\n", 5352391SN/A filename); 5362391SN/A 5372391SN/A} 5382391SN/A 5392413SN/A 5402391SN/ABEGIN_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory) 5412391SN/A 5422391SN/A Param<string> file; 5432391SN/A Param<Range<Addr> > range; 5442565SN/A Param<Tick> latency; 5453751Sgblack@eecs.umich.edu Param<bool> zero; 5462391SN/A 5472391SN/AEND_DECLARE_SIM_OBJECT_PARAMS(PhysicalMemory) 5482391SN/A 5492391SN/ABEGIN_INIT_SIM_OBJECT_PARAMS(PhysicalMemory) 5502391SN/A 5512391SN/A INIT_PARAM_DFLT(file, "memory mapped file", ""), 5522565SN/A INIT_PARAM(range, "Device Address Range"), 5533751Sgblack@eecs.umich.edu INIT_PARAM(latency, "Memory access latency"), 5543751Sgblack@eecs.umich.edu INIT_PARAM(zero, "Zero initialize memory") 5552391SN/A 5562391SN/AEND_INIT_SIM_OBJECT_PARAMS(PhysicalMemory) 5572391SN/A 5582391SN/ACREATE_SIM_OBJECT(PhysicalMemory) 5592391SN/A{ 5603012Ssaidi@eecs.umich.edu PhysicalMemory::Params *p = new PhysicalMemory::Params; 5613012Ssaidi@eecs.umich.edu p->name = getInstanceName(); 5623012Ssaidi@eecs.umich.edu p->addrRange = range; 5633012Ssaidi@eecs.umich.edu p->latency = latency; 5643751Sgblack@eecs.umich.edu p->zero = zero; 5653012Ssaidi@eecs.umich.edu return new PhysicalMemory(p); 5662391SN/A} 5672391SN/A 5682391SN/AREGISTER_SIM_OBJECT("PhysicalMemory", PhysicalMemory) 569