packet.cc revision 13367:dc06baae4275 
1/*
2 * Copyright (c) 2011-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Ali Saidi
42 *          Steve Reinhardt
43 */
44
45/**
46 * @file
47 * Definition of the Packet Class, a packet is a transaction occuring
48 * between a single level of the memory heirarchy (ie L1->L2).
49 */
50
51#include "mem/packet.hh"
52
53#include <algorithm>
54#include <cstring>
55#include <iostream>
56#include <sstream>
57#include <string>
58
59#include "base/cprintf.hh"
60#include "base/logging.hh"
61#include "base/trace.hh"
62#include "mem/packet_access.hh"
63
64// The one downside to bitsets is that static initializers can get ugly.
65#define SET1(a1)                     (1 << (a1))
66#define SET2(a1, a2)                 (SET1(a1) | SET1(a2))
67#define SET3(a1, a2, a3)             (SET2(a1, a2) | SET1(a3))
68#define SET4(a1, a2, a3, a4)         (SET3(a1, a2, a3) | SET1(a4))
69#define SET5(a1, a2, a3, a4, a5)     (SET4(a1, a2, a3, a4) | SET1(a5))
70#define SET6(a1, a2, a3, a4, a5, a6) (SET5(a1, a2, a3, a4, a5) | SET1(a6))
71#define SET7(a1, a2, a3, a4, a5, a6, a7) (SET6(a1, a2, a3, a4, a5, a6) | \
72                                          SET1(a7))
73
74const MemCmd::CommandInfo
75MemCmd::commandInfo[] =
76{
77    /* InvalidCmd */
78    { 0, InvalidCmd, "InvalidCmd" },
79    /* ReadReq - Read issued by a non-caching agent such as a CPU or
80     * device, with no restrictions on alignment. */
81    { SET3(IsRead, IsRequest, NeedsResponse), ReadResp, "ReadReq" },
82    /* ReadResp */
83    { SET3(IsRead, IsResponse, HasData), InvalidCmd, "ReadResp" },
84    /* ReadRespWithInvalidate */
85    { SET4(IsRead, IsResponse, HasData, IsInvalidate),
86            InvalidCmd, "ReadRespWithInvalidate" },
87    /* WriteReq */
88    { SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
89            WriteResp, "WriteReq" },
90    /* WriteResp */
91    { SET2(IsWrite, IsResponse), InvalidCmd, "WriteResp" },
92    /* WritebackDirty */
93    { SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
94            InvalidCmd, "WritebackDirty" },
95    /* WritebackClean - This allows the upstream cache to writeback a
96     * line to the downstream cache without it being considered
97     * dirty. */
98    { SET5(IsWrite, IsRequest, IsEviction, HasData, FromCache),
99            InvalidCmd, "WritebackClean" },
100    /* WriteClean - This allows a cache to write a dirty block to a memory
101       below without evicting its copy. */
102    { SET4(IsWrite, IsRequest, HasData, FromCache), InvalidCmd, "WriteClean" },
103    /* CleanEvict */
104    { SET3(IsRequest, IsEviction, FromCache), InvalidCmd, "CleanEvict" },
105    /* SoftPFReq */
106    { SET4(IsRead, IsRequest, IsSWPrefetch, NeedsResponse),
107            SoftPFResp, "SoftPFReq" },
108    /* SoftPFExReq */
109    { SET6(IsRead, NeedsWritable, IsInvalidate, IsRequest,
110           IsSWPrefetch, NeedsResponse), SoftPFResp, "SoftPFExReq" },
111    /* HardPFReq */
112    { SET5(IsRead, IsRequest, IsHWPrefetch, NeedsResponse, FromCache),
113            HardPFResp, "HardPFReq" },
114    /* SoftPFResp */
115    { SET4(IsRead, IsResponse, IsSWPrefetch, HasData),
116            InvalidCmd, "SoftPFResp" },
117    /* HardPFResp */
118    { SET4(IsRead, IsResponse, IsHWPrefetch, HasData),
119            InvalidCmd, "HardPFResp" },
120    /* WriteLineReq */
121    { SET5(IsWrite, NeedsWritable, IsRequest, NeedsResponse, HasData),
122            WriteResp, "WriteLineReq" },
123    /* UpgradeReq */
124    { SET6(IsInvalidate, NeedsWritable, IsUpgrade, IsRequest, NeedsResponse,
125            FromCache),
126            UpgradeResp, "UpgradeReq" },
127    /* SCUpgradeReq: response could be UpgradeResp or UpgradeFailResp */
128    { SET7(IsInvalidate, NeedsWritable, IsUpgrade, IsLlsc,
129           IsRequest, NeedsResponse, FromCache),
130            UpgradeResp, "SCUpgradeReq" },
131    /* UpgradeResp */
132    { SET2(IsUpgrade, IsResponse),
133            InvalidCmd, "UpgradeResp" },
134    /* SCUpgradeFailReq: generates UpgradeFailResp but still gets the data */
135    { SET7(IsRead, NeedsWritable, IsInvalidate,
136           IsLlsc, IsRequest, NeedsResponse, FromCache),
137            UpgradeFailResp, "SCUpgradeFailReq" },
138    /* UpgradeFailResp - Behaves like a ReadExReq, but notifies an SC
139     * that it has failed, acquires line as Dirty*/
140    { SET3(IsRead, IsResponse, HasData),
141            InvalidCmd, "UpgradeFailResp" },
142    /* ReadExReq - Read issues by a cache, always cache-line aligned,
143     * and the response is guaranteed to be writeable (exclusive or
144     * even modified) */
145    { SET6(IsRead, NeedsWritable, IsInvalidate, IsRequest, NeedsResponse,
146            FromCache),
147            ReadExResp, "ReadExReq" },
148    /* ReadExResp - Response matching a read exclusive, as we check
149     * the need for exclusive also on responses */
150    { SET3(IsRead, IsResponse, HasData),
151            InvalidCmd, "ReadExResp" },
152    /* ReadCleanReq - Read issued by a cache, always cache-line
153     * aligned, and the response is guaranteed to not contain dirty data
154     * (exclusive or shared).*/
155    { SET4(IsRead, IsRequest, NeedsResponse, FromCache),
156            ReadResp, "ReadCleanReq" },
157    /* ReadSharedReq - Read issued by a cache, always cache-line
158     * aligned, response is shared, possibly exclusive, owned or even
159     * modified. */
160    { SET4(IsRead, IsRequest, NeedsResponse, FromCache),
161            ReadResp, "ReadSharedReq" },
162    /* LoadLockedReq: note that we use plain ReadResp as response, so that
163     *                we can also use ReadRespWithInvalidate when needed */
164    { SET4(IsRead, IsLlsc, IsRequest, NeedsResponse),
165            ReadResp, "LoadLockedReq" },
166    /* StoreCondReq */
167    { SET6(IsWrite, NeedsWritable, IsLlsc,
168           IsRequest, NeedsResponse, HasData),
169            StoreCondResp, "StoreCondReq" },
170    /* StoreCondFailReq: generates failing StoreCondResp */
171    { SET6(IsWrite, NeedsWritable, IsLlsc,
172           IsRequest, NeedsResponse, HasData),
173            StoreCondResp, "StoreCondFailReq" },
174    /* StoreCondResp */
175    { SET3(IsWrite, IsLlsc, IsResponse),
176            InvalidCmd, "StoreCondResp" },
177    /* SwapReq -- for Swap ldstub type operations */
178    { SET6(IsRead, IsWrite, NeedsWritable, IsRequest, HasData, NeedsResponse),
179        SwapResp, "SwapReq" },
180    /* SwapResp -- for Swap ldstub type operations */
181    { SET4(IsRead, IsWrite, IsResponse, HasData),
182            InvalidCmd, "SwapResp" },
183    /* IntReq -- for interrupts */
184    { SET4(IsWrite, IsRequest, NeedsResponse, HasData),
185        MessageResp, "MessageReq" },
186    /* IntResp -- for interrupts */
187    { SET2(IsWrite, IsResponse), InvalidCmd, "MessageResp" },
188    /* MemFenceReq -- for synchronization requests */
189    {SET2(IsRequest, NeedsResponse), MemFenceResp, "MemFenceReq"},
190    /* MemFenceResp -- for synchronization responses */
191    {SET1(IsResponse), InvalidCmd, "MemFenceResp"},
192    /* Cache Clean Request -- Update with the latest data all existing
193       copies of the block down to the point indicated by the
194       request */
195    { SET4(IsRequest, IsClean, NeedsResponse, FromCache),
196      CleanSharedResp, "CleanSharedReq" },
197    /* Cache Clean Response - Indicates that all caches up to the
198       specified point of reference have a up-to-date copy of the
199       cache block or no copy at all */
200    { SET2(IsResponse, IsClean), InvalidCmd, "CleanSharedResp" },
201    /* Cache Clean and Invalidate Request -- Invalidate all existing
202       copies down to the point indicated by the request */
203    { SET5(IsRequest, IsInvalidate, IsClean, NeedsResponse, FromCache),
204      CleanInvalidResp, "CleanInvalidReq" },
205     /* Cache Clean and Invalidate Respose -- Indicates that no cache
206        above the specified point holds the block and that the block
207        was written to a memory below the specified point. */
208    { SET3(IsResponse, IsInvalidate, IsClean),
209      InvalidCmd, "CleanInvalidResp" },
210    /* InvalidDestError  -- packet dest field invalid */
211    { SET2(IsResponse, IsError), InvalidCmd, "InvalidDestError" },
212    /* BadAddressError   -- memory address invalid */
213    { SET2(IsResponse, IsError), InvalidCmd, "BadAddressError" },
214    /* FunctionalReadError */
215    { SET3(IsRead, IsResponse, IsError), InvalidCmd, "FunctionalReadError" },
216    /* FunctionalWriteError */
217    { SET3(IsWrite, IsResponse, IsError), InvalidCmd, "FunctionalWriteError" },
218    /* PrintReq */
219    { SET2(IsRequest, IsPrint), InvalidCmd, "PrintReq" },
220    /* Flush Request */
221    { SET3(IsRequest, IsFlush, NeedsWritable), InvalidCmd, "FlushReq" },
222    /* Invalidation Request */
223    { SET5(IsInvalidate, IsRequest, NeedsWritable, NeedsResponse, FromCache),
224      InvalidateResp, "InvalidateReq" },
225    /* Invalidation Response */
226    { SET2(IsInvalidate, IsResponse),
227      InvalidCmd, "InvalidateResp" }
228};
229
230bool
231Packet::trySatisfyFunctional(Printable *obj, Addr addr, bool is_secure, int size,
232                        uint8_t *_data)
233{
234    const Addr func_start = getAddr();
235    const Addr func_end   = getAddr() + getSize() - 1;
236    const Addr val_start  = addr;
237    const Addr val_end    = val_start + size - 1;
238
239    if (is_secure != _isSecure || func_start > val_end ||
240        val_start > func_end) {
241        // no intersection
242        return false;
243    }
244
245    // check print first since it doesn't require data
246    if (isPrint()) {
247        assert(!_data);
248        safe_cast<PrintReqState*>(senderState)->printObj(obj);
249        return false;
250    }
251
252    // we allow the caller to pass NULL to signify the other packet
253    // has no data
254    if (!_data) {
255        return false;
256    }
257
258    const Addr val_offset = func_start > val_start ?
259        func_start - val_start : 0;
260    const Addr func_offset = func_start < val_start ?
261        val_start - func_start : 0;
262    const Addr overlap_size = std::min(val_end, func_end)+1 -
263        std::max(val_start, func_start);
264
265    if (isRead()) {
266        std::memcpy(getPtr<uint8_t>() + func_offset,
267               _data + val_offset,
268               overlap_size);
269
270        // initialise the tracking of valid bytes if we have not
271        // used it already
272        if (bytesValid.empty())
273            bytesValid.resize(getSize(), false);
274
275        // track if we are done filling the functional access
276        bool all_bytes_valid = true;
277
278        int i = 0;
279
280        // check up to func_offset
281        for (; all_bytes_valid && i < func_offset; ++i)
282            all_bytes_valid &= bytesValid[i];
283
284        // update the valid bytes
285        for (i = func_offset; i < func_offset + overlap_size; ++i)
286            bytesValid[i] = true;
287
288        // check the bit after the update we just made
289        for (; all_bytes_valid && i < getSize(); ++i)
290            all_bytes_valid &= bytesValid[i];
291
292        return all_bytes_valid;
293    } else if (isWrite()) {
294        std::memcpy(_data + val_offset,
295               getConstPtr<uint8_t>() + func_offset,
296               overlap_size);
297    } else {
298        panic("Don't know how to handle command %s\n", cmdString());
299    }
300
301    // keep going with request by default
302    return false;
303}
304
305void
306Packet::pushSenderState(Packet::SenderState *sender_state)
307{
308    assert(sender_state != NULL);
309    sender_state->predecessor = senderState;
310    senderState = sender_state;
311}
312
313Packet::SenderState *
314Packet::popSenderState()
315{
316    assert(senderState != NULL);
317    SenderState *sender_state = senderState;
318    senderState = sender_state->predecessor;
319    sender_state->predecessor = NULL;
320    return sender_state;
321}
322
323uint64_t
324Packet::getUintX(ByteOrder endian) const
325{
326    switch(getSize()) {
327      case 1:
328        return (uint64_t)get<uint8_t>(endian);
329      case 2:
330        return (uint64_t)get<uint16_t>(endian);
331      case 4:
332        return (uint64_t)get<uint32_t>(endian);
333      case 8:
334        return (uint64_t)get<uint64_t>(endian);
335      default:
336        panic("%i isn't a supported word size.\n", getSize());
337    }
338}
339
340void
341Packet::setUintX(uint64_t w, ByteOrder endian)
342{
343    switch(getSize()) {
344      case 1:
345        set<uint8_t>((uint8_t)w, endian);
346        break;
347      case 2:
348        set<uint16_t>((uint16_t)w, endian);
349        break;
350      case 4:
351        set<uint32_t>((uint32_t)w, endian);
352        break;
353      case 8:
354        set<uint64_t>((uint64_t)w, endian);
355        break;
356      default:
357        panic("%i isn't a supported word size.\n", getSize());
358    }
359
360}
361
362void
363Packet::print(std::ostream &o, const int verbosity,
364              const std::string &prefix) const
365{
366    ccprintf(o, "%s%s [%x:%x]%s%s%s%s%s%s", prefix, cmdString(),
367             getAddr(), getAddr() + getSize() - 1,
368             req->isSecure() ? " (s)" : "",
369             req->isInstFetch() ? " IF" : "",
370             req->isUncacheable() ? " UC" : "",
371             isExpressSnoop() ? " ES" : "",
372             req->isToPOC() ? " PoC" : "",
373             req->isToPOU() ? " PoU" : "");
374}
375
376std::string
377Packet::print() const {
378    std::ostringstream str;
379    print(str);
380    return str.str();
381}
382
383Packet::PrintReqState::PrintReqState(std::ostream &_os, int _verbosity)
384    : curPrefixPtr(new std::string("")), os(_os), verbosity(_verbosity)
385{
386    labelStack.push_back(LabelStackEntry("", curPrefixPtr));
387}
388
389Packet::PrintReqState::~PrintReqState()
390{
391    labelStack.pop_back();
392    assert(labelStack.empty());
393    delete curPrefixPtr;
394}
395
396Packet::PrintReqState::
397LabelStackEntry::LabelStackEntry(const std::string &_label,
398                                 std::string *_prefix)
399    : label(_label), prefix(_prefix), labelPrinted(false)
400{
401}
402
403void
404Packet::PrintReqState::pushLabel(const std::string &lbl,
405                                 const std::string &prefix)
406{
407    labelStack.push_back(LabelStackEntry(lbl, curPrefixPtr));
408    curPrefixPtr = new std::string(*curPrefixPtr);
409    *curPrefixPtr += prefix;
410}
411
412void
413Packet::PrintReqState::popLabel()
414{
415    delete curPrefixPtr;
416    curPrefixPtr = labelStack.back().prefix;
417    labelStack.pop_back();
418    assert(!labelStack.empty());
419}
420
421void
422Packet::PrintReqState::printLabels()
423{
424    if (!labelStack.back().labelPrinted) {
425        LabelStack::iterator i = labelStack.begin();
426        LabelStack::iterator end = labelStack.end();
427        while (i != end) {
428            if (!i->labelPrinted) {
429                ccprintf(os, "%s%s\n", *(i->prefix), i->label);
430                i->labelPrinted = true;
431            }
432            i++;
433        }
434    }
435}
436
437
438void
439Packet::PrintReqState::printObj(Printable *obj)
440{
441    printLabels();
442    obj->print(os, verbosity, curPrefix());
443}
444