noncoherent_xbar.hh revision 13808:0a44fbc3a853
110260SAndrew.Bardsley@arm.com/* 210260SAndrew.Bardsley@arm.com * Copyright (c) 2011-2015 ARM Limited 310260SAndrew.Bardsley@arm.com * All rights reserved 410260SAndrew.Bardsley@arm.com * 510260SAndrew.Bardsley@arm.com * The license below extends only to copyright in the software and shall 610260SAndrew.Bardsley@arm.com * not be construed as granting a license to any other intellectual 710260SAndrew.Bardsley@arm.com * property including but not limited to intellectual property relating 810260SAndrew.Bardsley@arm.com * to a hardware implementation of the functionality of the software 910260SAndrew.Bardsley@arm.com * licensed hereunder. You may use the software subject to the license 1010260SAndrew.Bardsley@arm.com * terms below provided that you ensure that this notice is replicated 1110260SAndrew.Bardsley@arm.com * unmodified and in its entirety in all distributions of the software, 1210260SAndrew.Bardsley@arm.com * modified or unmodified, in source code or in binary form. 1310315Snilay@cs.wisc.edu * 1410260SAndrew.Bardsley@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 1510260SAndrew.Bardsley@arm.com * All rights reserved. 1610260SAndrew.Bardsley@arm.com * 1711570SCurtis.Dunham@arm.com * Redistribution and use in source and binary forms, with or without 1810260SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are 1911570SCurtis.Dunham@arm.com * met: redistributions of source code must retain the above copyright 2010260SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer; 2110260SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright 2210315Snilay@cs.wisc.edu * notice, this list of conditions and the following disclaimer in the 2310260SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution; 2410260SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its 2510260SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from 2610260SAndrew.Bardsley@arm.com * this software without specific prior written permission. 2710260SAndrew.Bardsley@arm.com * 2810753Sstever@gmail.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2911570SCurtis.Dunham@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3010260SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3111570SCurtis.Dunham@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3211570SCurtis.Dunham@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3311570SCurtis.Dunham@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3411570SCurtis.Dunham@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3510260SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3610260SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3711570SCurtis.Dunham@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3811570SCurtis.Dunham@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3910260SAndrew.Bardsley@arm.com * 4010260SAndrew.Bardsley@arm.com * Authors: Ron Dreslinski 4110260SAndrew.Bardsley@arm.com * Ali Saidi 4210260SAndrew.Bardsley@arm.com * Andreas Hansson 4310260SAndrew.Bardsley@arm.com * William Wang 4410260SAndrew.Bardsley@arm.com */ 4510260SAndrew.Bardsley@arm.com 4610260SAndrew.Bardsley@arm.com/** 4710260SAndrew.Bardsley@arm.com * @file 4810260SAndrew.Bardsley@arm.com * Declaration of a non-coherent crossbar. 4910260SAndrew.Bardsley@arm.com */ 5010260SAndrew.Bardsley@arm.com 5110315Snilay@cs.wisc.edu#ifndef __MEM_NONCOHERENT_XBAR_HH__ 5210260SAndrew.Bardsley@arm.com#define __MEM_NONCOHERENT_XBAR_HH__ 5310315Snilay@cs.wisc.edu 5410260SAndrew.Bardsley@arm.com#include "mem/xbar.hh" 5510260SAndrew.Bardsley@arm.com#include "params/NoncoherentXBar.hh" 5610260SAndrew.Bardsley@arm.com 5710260SAndrew.Bardsley@arm.com/** 5810260SAndrew.Bardsley@arm.com * A non-coherent crossbar connects a number of non-snooping masters 5910260SAndrew.Bardsley@arm.com * and slaves, and routes the request and response packets based on 6010260SAndrew.Bardsley@arm.com * the address. The request packets issued by the master connected to 6110260SAndrew.Bardsley@arm.com * a non-coherent crossbar could still snoop in caches attached to a 6210260SAndrew.Bardsley@arm.com * coherent crossbar, as is the case with the I/O bus and memory bus 6310260SAndrew.Bardsley@arm.com * in most system configurations. No snoops will, however, reach any 6410260SAndrew.Bardsley@arm.com * master on the non-coherent crossbar itself. 6510260SAndrew.Bardsley@arm.com * 6610260SAndrew.Bardsley@arm.com * The non-coherent crossbar can be used as a template for modelling 6711570SCurtis.Dunham@arm.com * PCIe, and non-coherent AMBA and OCP buses, and is typically used 6810260SAndrew.Bardsley@arm.com * for the I/O buses. 6910260SAndrew.Bardsley@arm.com */ 7010260SAndrew.Bardsley@arm.comclass NoncoherentXBar : public BaseXBar 7110260SAndrew.Bardsley@arm.com{ 7210260SAndrew.Bardsley@arm.com 7310260SAndrew.Bardsley@arm.com protected: 7410260SAndrew.Bardsley@arm.com 7510260SAndrew.Bardsley@arm.com /** 7610260SAndrew.Bardsley@arm.com * Declare the layers of this crossbar, one vector for requests 7710260SAndrew.Bardsley@arm.com * and one for responses. 7810260SAndrew.Bardsley@arm.com */ 7910260SAndrew.Bardsley@arm.com std::vector<ReqLayer*> reqLayers; 8010260SAndrew.Bardsley@arm.com std::vector<RespLayer*> respLayers; 8110260SAndrew.Bardsley@arm.com 8210260SAndrew.Bardsley@arm.com /** 8310260SAndrew.Bardsley@arm.com * Declaration of the non-coherent crossbar slave port type, one 8410260SAndrew.Bardsley@arm.com * will be instantiated for each of the master ports connecting to 8510260SAndrew.Bardsley@arm.com * the crossbar. 8610260SAndrew.Bardsley@arm.com */ 8710260SAndrew.Bardsley@arm.com class NoncoherentXBarSlavePort : public QueuedSlavePort 8810260SAndrew.Bardsley@arm.com { 8910260SAndrew.Bardsley@arm.com private: 9010260SAndrew.Bardsley@arm.com 9110260SAndrew.Bardsley@arm.com /** A reference to the crossbar to which this port belongs. */ 9210260SAndrew.Bardsley@arm.com NoncoherentXBar &xbar; 9310260SAndrew.Bardsley@arm.com 9410260SAndrew.Bardsley@arm.com /** A normal packet queue used to store responses. */ 9510260SAndrew.Bardsley@arm.com RespPacketQueue queue; 9610260SAndrew.Bardsley@arm.com 9710260SAndrew.Bardsley@arm.com public: 9810260SAndrew.Bardsley@arm.com 9910260SAndrew.Bardsley@arm.com NoncoherentXBarSlavePort(const std::string &_name, 10010260SAndrew.Bardsley@arm.com NoncoherentXBar &_xbar, PortID _id) 10110260SAndrew.Bardsley@arm.com : QueuedSlavePort(_name, &_xbar, queue, _id), xbar(_xbar), 10210260SAndrew.Bardsley@arm.com queue(_xbar, *this) 10310260SAndrew.Bardsley@arm.com { } 10410260SAndrew.Bardsley@arm.com 10510260SAndrew.Bardsley@arm.com protected: 10610260SAndrew.Bardsley@arm.com 10710260SAndrew.Bardsley@arm.com bool 10810260SAndrew.Bardsley@arm.com recvTimingReq(PacketPtr pkt) override 10910260SAndrew.Bardsley@arm.com { 11010260SAndrew.Bardsley@arm.com return xbar.recvTimingReq(pkt, id); 11110260SAndrew.Bardsley@arm.com } 11211570SCurtis.Dunham@arm.com 11311570SCurtis.Dunham@arm.com Tick 11411570SCurtis.Dunham@arm.com recvAtomic(PacketPtr pkt) override 11511570SCurtis.Dunham@arm.com { 11610260SAndrew.Bardsley@arm.com return xbar.recvAtomic(pkt, id); 11710260SAndrew.Bardsley@arm.com } 11810260SAndrew.Bardsley@arm.com 11910315Snilay@cs.wisc.edu void 12010260SAndrew.Bardsley@arm.com recvFunctional(PacketPtr pkt) override 12110260SAndrew.Bardsley@arm.com { 12211570SCurtis.Dunham@arm.com xbar.recvFunctional(pkt, id); 12310260SAndrew.Bardsley@arm.com } 12410260SAndrew.Bardsley@arm.com 12510260SAndrew.Bardsley@arm.com AddrRangeList 12610260SAndrew.Bardsley@arm.com getAddrRanges() const override 12710260SAndrew.Bardsley@arm.com { 12810260SAndrew.Bardsley@arm.com return xbar.getAddrRanges(); 12910900Snilay@cs.wisc.edu } 13010260SAndrew.Bardsley@arm.com }; 13110260SAndrew.Bardsley@arm.com 13210260SAndrew.Bardsley@arm.com /** 13310260SAndrew.Bardsley@arm.com * Declaration of the crossbar master port type, one will be 13410260SAndrew.Bardsley@arm.com * instantiated for each of the slave ports connecting to the 13510260SAndrew.Bardsley@arm.com * crossbar. 13610260SAndrew.Bardsley@arm.com */ 13710260SAndrew.Bardsley@arm.com class NoncoherentXBarMasterPort : public MasterPort 13811570SCurtis.Dunham@arm.com { 13911570SCurtis.Dunham@arm.com private: 14011570SCurtis.Dunham@arm.com 14111570SCurtis.Dunham@arm.com /** A reference to the crossbar to which this port belongs. */ 14211570SCurtis.Dunham@arm.com NoncoherentXBar &xbar; 14311570SCurtis.Dunham@arm.com 14410260SAndrew.Bardsley@arm.com public: 14510260SAndrew.Bardsley@arm.com 14610260SAndrew.Bardsley@arm.com NoncoherentXBarMasterPort(const std::string &_name, 14710260SAndrew.Bardsley@arm.com NoncoherentXBar &_xbar, PortID _id) 14810260SAndrew.Bardsley@arm.com : MasterPort(_name, &_xbar, _id), xbar(_xbar) 14911570SCurtis.Dunham@arm.com { } 15010260SAndrew.Bardsley@arm.com 15110260SAndrew.Bardsley@arm.com protected: 15211103Snilay@cs.wisc.edu 15310260SAndrew.Bardsley@arm.com bool 15411680SCurtis.Dunham@arm.com recvTimingResp(PacketPtr pkt) override 15510260SAndrew.Bardsley@arm.com { 15610260SAndrew.Bardsley@arm.com return xbar.recvTimingResp(pkt, id); 15711570SCurtis.Dunham@arm.com } 15811570SCurtis.Dunham@arm.com 15910753Sstever@gmail.com void 16010260SAndrew.Bardsley@arm.com recvRangeChange() override 16110260SAndrew.Bardsley@arm.com { 16210900Snilay@cs.wisc.edu xbar.recvRangeChange(id); 16310260SAndrew.Bardsley@arm.com } 16410260SAndrew.Bardsley@arm.com 16511570SCurtis.Dunham@arm.com void 16611570SCurtis.Dunham@arm.com recvReqRetry() override 16711570SCurtis.Dunham@arm.com { 16811570SCurtis.Dunham@arm.com xbar.recvReqRetry(id); 16910260SAndrew.Bardsley@arm.com } 17010260SAndrew.Bardsley@arm.com }; 17110260SAndrew.Bardsley@arm.com 17210260SAndrew.Bardsley@arm.com virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id); 17310260SAndrew.Bardsley@arm.com virtual bool recvTimingResp(PacketPtr pkt, PortID master_port_id); 17410260SAndrew.Bardsley@arm.com void recvReqRetry(PortID master_port_id); 17510260SAndrew.Bardsley@arm.com Tick recvAtomic(PacketPtr pkt, PortID slave_port_id); 17610260SAndrew.Bardsley@arm.com void recvFunctional(PacketPtr pkt, PortID slave_port_id); 17710260SAndrew.Bardsley@arm.com 17811570SCurtis.Dunham@arm.com public: 17910260SAndrew.Bardsley@arm.com 18010260SAndrew.Bardsley@arm.com NoncoherentXBar(const NoncoherentXBarParams *p); 18110260SAndrew.Bardsley@arm.com 18210260SAndrew.Bardsley@arm.com virtual ~NoncoherentXBar(); 18310260SAndrew.Bardsley@arm.com 18410260SAndrew.Bardsley@arm.com void regStats() override; 18510260SAndrew.Bardsley@arm.com Stats::Scalar totPktSize; 18610260SAndrew.Bardsley@arm.com}; 18711570SCurtis.Dunham@arm.com 18810260SAndrew.Bardsley@arm.com#endif //__MEM_NONCOHERENT_XBAR_HH__ 18910260SAndrew.Bardsley@arm.com