noncoherent_xbar.hh revision 10912:b99a6662d7c2
11689SN/A/* 21689SN/A * Copyright (c) 2011-2015 ARM Limited 39919Ssteve.reinhardt@amd.com * All rights reserved 41689SN/A * 51689SN/A * The license below extends only to copyright in the software and shall 61689SN/A * not be construed as granting a license to any other intellectual 71689SN/A * property including but not limited to intellectual property relating 81689SN/A * to a hardware implementation of the functionality of the software 91689SN/A * licensed hereunder. You may use the software subject to the license 101689SN/A * terms below provided that you ensure that this notice is replicated 111689SN/A * unmodified and in its entirety in all distributions of the software, 121689SN/A * modified or unmodified, in source code or in binary form. 131689SN/A * 141689SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 151689SN/A * All rights reserved. 161689SN/A * 171689SN/A * Redistribution and use in source and binary forms, with or without 181689SN/A * modification, are permitted provided that the following conditions are 191689SN/A * met: redistributions of source code must retain the above copyright 201689SN/A * notice, this list of conditions and the following disclaimer; 211689SN/A * redistributions in binary form must reproduce the above copyright 221689SN/A * notice, this list of conditions and the following disclaimer in the 231689SN/A * documentation and/or other materials provided with the distribution; 241689SN/A * neither the name of the copyright holders nor the names of its 251689SN/A * contributors may be used to endorse or promote products derived from 261689SN/A * this software without specific prior written permission. 271689SN/A * 282665Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292665Ssaidi@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 301689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 311689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 341060SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 351060SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 361060SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 371060SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382669Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 391684SN/A * 401717SN/A * Authors: Ron Dreslinski 419919Ssteve.reinhardt@amd.com * Ali Saidi 428232Snate@binkert.org * Andreas Hansson 431060SN/A * William Wang 441060SN/A */ 459919Ssteve.reinhardt@amd.com 469919Ssteve.reinhardt@amd.com/** 479919Ssteve.reinhardt@amd.com * @file 489919Ssteve.reinhardt@amd.com * Declaration of a non-coherent crossbar. 499919Ssteve.reinhardt@amd.com */ 509919Ssteve.reinhardt@amd.com 519919Ssteve.reinhardt@amd.com#ifndef __MEM_NONCOHERENT_XBAR_HH__ 529919Ssteve.reinhardt@amd.com#define __MEM_NONCOHERENT_XBAR_HH__ 539919Ssteve.reinhardt@amd.com 549919Ssteve.reinhardt@amd.com#include "mem/xbar.hh" 559919Ssteve.reinhardt@amd.com#include "params/NoncoherentXBar.hh" 569919Ssteve.reinhardt@amd.com 579919Ssteve.reinhardt@amd.com/** 589919Ssteve.reinhardt@amd.com * A non-coherent crossbar connects a number of non-snooping masters 599919Ssteve.reinhardt@amd.com * and slaves, and routes the request and response packets based on 609919Ssteve.reinhardt@amd.com * the address. The request packets issued by the master connected to 619919Ssteve.reinhardt@amd.com * a non-coherent crossbar could still snoop in caches attached to a 629919Ssteve.reinhardt@amd.com * coherent crossbar, as is the case with the I/O bus and memory bus 639919Ssteve.reinhardt@amd.com * in most system configurations. No snoops will, however, reach any 649919Ssteve.reinhardt@amd.com * master on the non-coherent crossbar itself. 659919Ssteve.reinhardt@amd.com * 669919Ssteve.reinhardt@amd.com * The non-coherent crossbar can be used as a template for modelling 679919Ssteve.reinhardt@amd.com * PCIe, and non-coherent AMBA and OCP buses, and is typically used 689919Ssteve.reinhardt@amd.com * for the I/O buses. 699919Ssteve.reinhardt@amd.com */ 709919Ssteve.reinhardt@amd.comclass NoncoherentXBar : public BaseXBar 719919Ssteve.reinhardt@amd.com{ 729919Ssteve.reinhardt@amd.com 739919Ssteve.reinhardt@amd.com protected: 749919Ssteve.reinhardt@amd.com 759919Ssteve.reinhardt@amd.com /** 769919Ssteve.reinhardt@amd.com * Declare the layers of this crossbar, one vector for requests 779919Ssteve.reinhardt@amd.com * and one for responses. 789919Ssteve.reinhardt@amd.com */ 799919Ssteve.reinhardt@amd.com std::vector<ReqLayer*> reqLayers; 809919Ssteve.reinhardt@amd.com std::vector<RespLayer*> respLayers; 819919Ssteve.reinhardt@amd.com 829919Ssteve.reinhardt@amd.com /** 831060SN/A * Declaration of the non-coherent crossbar slave port type, one 841060SN/A * will be instantiated for each of the master ports connecting to 851060SN/A * the crossbar. 861060SN/A */ 871060SN/A class NoncoherentXBarSlavePort : public QueuedSlavePort 881060SN/A { 891060SN/A private: 902292SN/A 912292SN/A /** A reference to the crossbar to which this port belongs. */ 922292SN/A NoncoherentXBar &xbar; 931060SN/A 941060SN/A /** A normal packet queue used to store responses. */ 959919Ssteve.reinhardt@amd.com RespPacketQueue queue; 961060SN/A 971060SN/A public: 989919Ssteve.reinhardt@amd.com 999919Ssteve.reinhardt@amd.com NoncoherentXBarSlavePort(const std::string &_name, 1009919Ssteve.reinhardt@amd.com NoncoherentXBar &_xbar, PortID _id) 1019919Ssteve.reinhardt@amd.com : QueuedSlavePort(_name, &_xbar, queue, _id), xbar(_xbar), 1029919Ssteve.reinhardt@amd.com queue(_xbar, *this) 1031060SN/A { } 1049919Ssteve.reinhardt@amd.com 1051060SN/A protected: 1061060SN/A 1079919Ssteve.reinhardt@amd.com /** 1081060SN/A * When receiving a timing request, pass it to the crossbar. 1099920Syasuko.eckert@amd.com */ 1109920Syasuko.eckert@amd.com virtual bool recvTimingReq(PacketPtr pkt) 1119920Syasuko.eckert@amd.com { return xbar.recvTimingReq(pkt, id); } 1129919Ssteve.reinhardt@amd.com 1139919Ssteve.reinhardt@amd.com /** 1149919Ssteve.reinhardt@amd.com * When receiving an atomic request, pass it to the crossbar. 1159919Ssteve.reinhardt@amd.com */ 1169919Ssteve.reinhardt@amd.com virtual Tick recvAtomic(PacketPtr pkt) 1171060SN/A { return xbar.recvAtomic(pkt, id); } 1189919Ssteve.reinhardt@amd.com 1199919Ssteve.reinhardt@amd.com /** 1209919Ssteve.reinhardt@amd.com * When receiving a functional request, pass it to the crossbar. 1219919Ssteve.reinhardt@amd.com */ 1229919Ssteve.reinhardt@amd.com virtual void recvFunctional(PacketPtr pkt) 1239919Ssteve.reinhardt@amd.com { xbar.recvFunctional(pkt, id); } 1241060SN/A 1251060SN/A /** 1262292SN/A * Return the union of all adress ranges seen by this crossbar. 1272292SN/A */ 1289919Ssteve.reinhardt@amd.com virtual AddrRangeList getAddrRanges() const 1299919Ssteve.reinhardt@amd.com { return xbar.getAddrRanges(); } 1302292SN/A 1319919Ssteve.reinhardt@amd.com }; 1329919Ssteve.reinhardt@amd.com 1332292SN/A /** 1349919Ssteve.reinhardt@amd.com * Declaration of the crossbar master port type, one will be 1351060SN/A * instantiated for each of the slave ports connecting to the 1362292SN/A * crossbar. 1379919Ssteve.reinhardt@amd.com */ 1382292SN/A class NoncoherentXBarMasterPort : public MasterPort 1399920Syasuko.eckert@amd.com { 1409920Syasuko.eckert@amd.com private: 1419920Syasuko.eckert@amd.com 1422292SN/A /** A reference to the crossbar to which this port belongs. */ 1439919Ssteve.reinhardt@amd.com NoncoherentXBar &xbar; 1441060SN/A 1452292SN/A public: 1469919Ssteve.reinhardt@amd.com 1471060SN/A NoncoherentXBarMasterPort(const std::string &_name, 1489920Syasuko.eckert@amd.com NoncoherentXBar &_xbar, PortID _id) 1499920Syasuko.eckert@amd.com : MasterPort(_name, &_xbar, _id), xbar(_xbar) 1509920Syasuko.eckert@amd.com { } 1512292SN/A 1529919Ssteve.reinhardt@amd.com protected: 1531060SN/A 1542292SN/A /** 1559919Ssteve.reinhardt@amd.com * When receiving a timing response, pass it to the crossbar. 1561060SN/A */ 1572292SN/A virtual bool recvTimingResp(PacketPtr pkt) 1589919Ssteve.reinhardt@amd.com { return xbar.recvTimingResp(pkt, id); } 1591060SN/A 1609920Syasuko.eckert@amd.com /** When reciving a range change from the peer port (at id), 1619920Syasuko.eckert@amd.com pass it to the crossbar. */ 1629920Syasuko.eckert@amd.com virtual void recvRangeChange() 1632292SN/A { xbar.recvRangeChange(id); } 1649919Ssteve.reinhardt@amd.com 1651060SN/A /** When reciving a retry from the peer port (at id), 1662292SN/A pass it to the crossbar. */ 1679919Ssteve.reinhardt@amd.com virtual void recvReqRetry() 1681060SN/A { xbar.recvReqRetry(id); } 1699920Syasuko.eckert@amd.com 1709920Syasuko.eckert@amd.com }; 1719920Syasuko.eckert@amd.com 1722292SN/A /** Function called by the port when the crossbar is recieving a Timing 1739919Ssteve.reinhardt@amd.com request packet.*/ 1741060SN/A virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id); 1752292SN/A 1769919Ssteve.reinhardt@amd.com /** Function called by the port when the crossbar is recieving a Timing 1779920Syasuko.eckert@amd.com response packet.*/ 1789920Syasuko.eckert@amd.com virtual bool recvTimingResp(PacketPtr pkt, PortID master_port_id); 1799920Syasuko.eckert@amd.com 1801060SN/A /** Timing function called by port when it is once again able to process 1811060SN/A * requests. */ 1821060SN/A void recvReqRetry(PortID master_port_id); 1839919Ssteve.reinhardt@amd.com 1841060SN/A /** Function called by the port when the crossbar is recieving a Atomic 1852292SN/A transaction.*/ 1861060SN/A Tick recvAtomic(PacketPtr pkt, PortID slave_port_id); 1871060SN/A 1889919Ssteve.reinhardt@amd.com /** Function called by the port when the crossbar is recieving a Functional 1899919Ssteve.reinhardt@amd.com transaction.*/ 1909920Syasuko.eckert@amd.com void recvFunctional(PacketPtr pkt, PortID slave_port_id); 1919920Syasuko.eckert@amd.com 1929919Ssteve.reinhardt@amd.com public: 1939920Syasuko.eckert@amd.com 1949920Syasuko.eckert@amd.com NoncoherentXBar(const NoncoherentXBarParams *p); 1951060SN/A 1965362Sksewell@umich.edu virtual ~NoncoherentXBar(); 1975364Sksewell@umich.edu 1985364Sksewell@umich.edu /** 1995364Sksewell@umich.edu * stats 2005364Sksewell@umich.edu */ 2015364Sksewell@umich.edu virtual void regStats(); 2025364Sksewell@umich.edu Stats::Scalar totPktSize; 2035364Sksewell@umich.edu}; 2045364Sksewell@umich.edu 2055364Sksewell@umich.edu#endif //__MEM_NONCOHERENT_XBAR_HH__ 2065364Sksewell@umich.edu