hmc_controller.hh revision 11184:07b0dacf27d6
1/* 2 * Copyright (c) 2011-2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2015 The University of Bologna 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Erfan Azarkhish 41 */ 42 43 44/** 45 * @file 46 * HMCController declaration 47 */ 48 49#ifndef __HMC_CONTROLLER__ 50#define __HMC_CONTROLLER__ 51 52#include "mem/noncoherent_xbar.hh" 53#include "mem/port.hh" 54#include "params/HMCController.hh" 55 56/** 57 * HMC Controller, in general, is responsible for translating the host 58 * protocol (AXI for example) to serial links protocol. Plus, it should have 59 * large internal buffers to hide the access latency of the cube. It is also 60 * inferred from the standard [1] and the literature [2] that serial links 61 * share the same address range and packets can travel over any of them, so a 62 * load distribution mechanism is required. 63 * This model simply queues the incoming transactions (using a Bridge) and 64 * schedules them to the serial links using a simple round robin mechanism to 65 * balance the load among them. More advanced global scheduling policies and 66 * reordering and steering of transactions can be added to this model if 67 * required [3]. 68 * [1] http://www.hybridmemorycube.org/specification-download/ 69 * [2] Low-Power Hybrid Memory Cubes With Link Power Manageme and Two-Level 70 * Prefetching (J. Ahn et. al) 71 * [3] The Open-Silicon HMC Controller IP 72 * http://www.open-silicon.com/open-silicon-ips/hmc/ 73 */ 74 75class HMCController : public NoncoherentXBar 76{ 77public: 78 79 HMCController(const HMCControllerParams *p); 80 81private: 82 83 // Receive range change only on one of the ports (because they all have 84 // the same range) 85 virtual void recvRangeChange(PortID master_port_id); 86 87 // Receive a request and distribute it among slave ports 88 // Simply forwards the packet to the next serial link based on a 89 // Round-robin counter 90 virtual bool recvTimingReq(PacketPtr pkt, PortID slave_port_id); 91 92 int n_master_ports; 93 94 // The round-robin counter 95 int rr_counter; 96 /** 97 * Function for rotating the round robin counter 98 * @return the next value of the counter 99 */ 100 int rotate_counter(); 101}; 102 103#endif //__HMC_CONTROLLER__ 104