fs_translating_port_proxy.cc revision 8996:8601533b6f70
12810SN/A/* 22810SN/A * Copyright (c) 2011 ARM Limited 32810SN/A * All rights reserved 42810SN/A * 52810SN/A * The license below extends only to copyright in the software and shall 62810SN/A * not be construed as granting a license to any other intellectual 72810SN/A * property including but not limited to intellectual property relating 82810SN/A * to a hardware implementation of the functionality of the software 92810SN/A * licensed hereunder. You may use the software subject to the license 102810SN/A * terms below provided that you ensure that this notice is replicated 112810SN/A * unmodified and in its entirety in all distributions of the software, 122810SN/A * modified or unmodified, in source code or in binary form. 132810SN/A * 142810SN/A * Copyright (c) 2006 The Regents of The University of Michigan 152810SN/A * All rights reserved. 162810SN/A * 172810SN/A * Redistribution and use in source and binary forms, with or without 182810SN/A * modification, are permitted provided that the following conditions are 192810SN/A * met: redistributions of source code must retain the above copyright 202810SN/A * notice, this list of conditions and the following disclaimer; 212810SN/A * redistributions in binary form must reproduce the above copyright 222810SN/A * notice, this list of conditions and the following disclaimer in the 232810SN/A * documentation and/or other materials provided with the distribution; 242810SN/A * neither the name of the copyright holders nor the names of its 252810SN/A * contributors may be used to endorse or promote products derived from 262810SN/A * this software without specific prior written permission. 272810SN/A * 282810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 375338Sstever@gmail.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 395338Sstever@gmail.com * 402810SN/A * Authors: Ali Saidi 412810SN/A * Andreas Hansson 422810SN/A */ 432810SN/A 442810SN/A/** 452810SN/A * @file 462810SN/A * Port object definitions. 472810SN/A */ 482810SN/A 492810SN/A#include "base/chunk_generator.hh" 502810SN/A#include "cpu/base.hh" 512810SN/A#include "cpu/thread_context.hh" 522810SN/A#include "mem/fs_translating_port_proxy.hh" 532810SN/A 542810SN/Ausing namespace TheISA; 552810SN/A 562810SN/AFSTranslatingPortProxy::FSTranslatingPortProxy(ThreadContext *tc) 572810SN/A : PortProxy(tc->getCpuPtr()->getDataPort()), _tc(tc) 582810SN/A{ 592810SN/A} 602810SN/A 612810SN/AFSTranslatingPortProxy::FSTranslatingPortProxy(MasterPort &port) 622810SN/A : PortProxy(port), _tc(NULL) 632810SN/A{ 642810SN/A} 652810SN/A 662810SN/AFSTranslatingPortProxy::~FSTranslatingPortProxy() 672810SN/A{ 682810SN/A} 692810SN/A 702810SN/Avoid 712810SN/AFSTranslatingPortProxy::readBlob(Addr addr, uint8_t *p, int size) const 722810SN/A{ 732810SN/A Addr paddr; 742810SN/A for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done(); 752810SN/A gen.next()) 762810SN/A { 772810SN/A if (_tc) 782810SN/A paddr = TheISA::vtophys(_tc,gen.addr()); 792810SN/A else 802810SN/A paddr = TheISA::vtophys(gen.addr()); 812810SN/A 822810SN/A PortProxy::readBlob(paddr, p, gen.size()); 832810SN/A p += gen.size(); 842810SN/A } 852810SN/A} 862810SN/A 872810SN/Avoid 882810SN/AFSTranslatingPortProxy::writeBlob(Addr addr, uint8_t *p, int size) const 892810SN/A{ 906978SLisa.Hsu@amd.com Addr paddr; 916978SLisa.Hsu@amd.com for (ChunkGenerator gen(addr, size, TheISA::PageBytes); !gen.done(); 926978SLisa.Hsu@amd.com gen.next()) 936978SLisa.Hsu@amd.com { 946978SLisa.Hsu@amd.com if (_tc) 956978SLisa.Hsu@amd.com paddr = TheISA::vtophys(_tc,gen.addr()); 966978SLisa.Hsu@amd.com else 976978SLisa.Hsu@amd.com paddr = TheISA::vtophys(gen.addr()); 986978SLisa.Hsu@amd.com 996978SLisa.Hsu@amd.com PortProxy::writeBlob(paddr, p, gen.size()); 1006978SLisa.Hsu@amd.com p += gen.size(); 1016978SLisa.Hsu@amd.com } 1026978SLisa.Hsu@amd.com} 1036978SLisa.Hsu@amd.com 1046978SLisa.Hsu@amd.comvoid 1052810SN/AFSTranslatingPortProxy::memsetBlob(Addr address, uint8_t v, int size) const 1062810SN/A{ 107 Addr paddr; 108 for (ChunkGenerator gen(address, size, TheISA::PageBytes); !gen.done(); 109 gen.next()) 110 { 111 if (_tc) 112 paddr = TheISA::vtophys(_tc,gen.addr()); 113 else 114 paddr = TheISA::vtophys(gen.addr()); 115 116 PortProxy::memsetBlob(paddr, v, gen.size()); 117 } 118} 119 120void 121CopyOut(ThreadContext *tc, void *dest, Addr src, size_t cplen) 122{ 123 uint8_t *dst = (uint8_t *)dest; 124 tc->getVirtProxy().readBlob(src, dst, cplen); 125} 126 127void 128CopyIn(ThreadContext *tc, Addr dest, void *source, size_t cplen) 129{ 130 uint8_t *src = (uint8_t *)source; 131 tc->getVirtProxy().writeBlob(dest, src, cplen); 132} 133 134void 135CopyStringOut(ThreadContext *tc, char *dst, Addr vaddr, size_t maxlen) 136{ 137 char *start = dst; 138 FSTranslatingPortProxy &vp = tc->getVirtProxy(); 139 140 bool foundNull = false; 141 while ((dst - start + 1) < maxlen && !foundNull) { 142 vp.readBlob(vaddr++, (uint8_t*)dst, 1); 143 if (*dst == '\0') 144 foundNull = true; 145 dst++; 146 } 147 148 if (!foundNull) 149 *dst = '\0'; 150} 151 152void 153CopyStringIn(ThreadContext *tc, char *src, Addr vaddr) 154{ 155 FSTranslatingPortProxy &vp = tc->getVirtProxy(); 156 for (ChunkGenerator gen(vaddr, strlen(src), TheISA::PageBytes); !gen.done(); 157 gen.next()) 158 { 159 vp.writeBlob(gen.addr(), (uint8_t*)src, gen.size()); 160 src += gen.size(); 161 } 162} 163