base_set_assoc.hh revision 12727:56c23b54bcb1
1/*
2 * Copyright (c) 2012-2014,2017 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
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26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Erik Hallnor
41 */
42
43/**
44 * @file
45 * Declaration of a base set associative tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
49#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
50
51#include <string>
52#include <vector>
53
54#include "base/logging.hh"
55#include "base/types.hh"
56#include "debug/CacheRepl.hh"
57#include "mem/cache/base.hh"
58#include "mem/cache/blk.hh"
59#include "mem/cache/replacement_policies/base.hh"
60#include "mem/cache/tags/base.hh"
61#include "mem/cache/tags/cacheset.hh"
62#include "mem/packet.hh"
63#include "params/BaseSetAssoc.hh"
64
65/**
66 * A BaseSetAssoc cache tag store.
67 * @sa  \ref gem5MemorySystem "gem5 Memory System"
68 *
69 * The BaseSetAssoc placement policy divides the cache into s sets of w
70 * cache lines (ways). A cache line is mapped onto a set, and can be placed
71 * into any of the ways of this set.
72 */
73class BaseSetAssoc : public BaseTags
74{
75  public:
76    /** Typedef the block type used in this tag store. */
77    typedef CacheBlk BlkType;
78    /** Typedef the set type used in this tag store. */
79    typedef CacheSet<CacheBlk> SetType;
80
81  protected:
82    /** The associativity of the cache. */
83    const unsigned assoc;
84    /** The allocatable associativity of the cache (alloc mask). */
85    unsigned allocAssoc;
86
87    /** The cache blocks. */
88    std::vector<BlkType> blks;
89
90    /** The number of sets in the cache. */
91    const unsigned numSets;
92
93    /** Whether tags and data are accessed sequentially. */
94    const bool sequentialAccess;
95
96    /** The cache sets. */
97    std::vector<SetType> sets;
98
99    /** The amount to shift the address to get the set. */
100    int setShift;
101    /** The amount to shift the address to get the tag. */
102    int tagShift;
103    /** Mask out all bits that aren't part of the set index. */
104    unsigned setMask;
105
106    /** Replacement policy */
107    BaseReplacementPolicy *replacementPolicy;
108
109  public:
110    /** Convenience typedef. */
111     typedef BaseSetAssocParams Params;
112
113    /**
114     * Construct and initialize this tag store.
115     */
116    BaseSetAssoc(const Params *p);
117
118    /**
119     * Destructor
120     */
121    virtual ~BaseSetAssoc() {};
122
123    /**
124     * This function updates the tags when a block is invalidated but does
125     * not invalidate the block itself. It also updates the replacement data.
126     *
127     * @param blk The block to invalidate.
128     */
129    void invalidate(CacheBlk *blk) override;
130
131    /**
132     * Find the cache block given set and way
133     * @param set The set of the block.
134     * @param way The way of the block.
135     * @return The cache block.
136     */
137    CacheBlk *findBlockBySetAndWay(int set, int way) const override;
138
139    /**
140     * Access block and update replacement data. May not succeed, in which case
141     * nullptr is returned. This has all the implications of a cache
142     * access and should only be used as such. Returns the access latency as a
143     * side effect.
144     * @param addr The address to find.
145     * @param is_secure True if the target memory space is secure.
146     * @param lat The access latency.
147     * @return Pointer to the cache block if found.
148     */
149    CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
150    {
151        BlkType *blk = findBlock(addr, is_secure);
152
153        // Access all tags in parallel, hence one in each way.  The data side
154        // either accesses all blocks in parallel, or one block sequentially on
155        // a hit.  Sequential access with a miss doesn't access data.
156        tagAccesses += allocAssoc;
157        if (sequentialAccess) {
158            if (blk != nullptr) {
159                dataAccesses += 1;
160            }
161        } else {
162            dataAccesses += allocAssoc;
163        }
164
165        if (blk != nullptr) {
166            // If a cache hit
167            lat = accessLatency;
168            // Check if the block to be accessed is available. If not,
169            // apply the accessLatency on top of block->whenReady.
170            if (blk->whenReady > curTick() &&
171                cache->ticksToCycles(blk->whenReady - curTick()) >
172                accessLatency) {
173                lat = cache->ticksToCycles(blk->whenReady - curTick()) +
174                accessLatency;
175            }
176
177            // Update number of references to accessed block
178            blk->refCount++;
179
180            // Update replacement data of accessed block
181            replacementPolicy->touch(blk->replacementData);
182        } else {
183            // If a cache miss
184            lat = lookupLatency;
185        }
186
187        return blk;
188    }
189
190    /**
191     * Finds the given address in the cache, do not update replacement data.
192     * i.e. This is a no-side-effect find of a block.
193     * @param addr The address to find.
194     * @param is_secure True if the target memory space is secure.
195     * @param asid The address space ID.
196     * @return Pointer to the cache block if found.
197     */
198    CacheBlk* findBlock(Addr addr, bool is_secure) const override;
199
200    /**
201     * Find replacement victim based on address.
202     *
203     * @param addr Address to find a victim for.
204     * @return Cache block to be replaced.
205     */
206    CacheBlk* findVictim(Addr addr) override
207    {
208        // Get possible locations for the victim block
209        std::vector<CacheBlk*> locations = getPossibleLocations(addr);
210
211        // Choose replacement victim from replacement candidates
212        CacheBlk* victim = static_cast<CacheBlk*>(replacementPolicy->getVictim(
213                               std::vector<ReplaceableEntry*>(
214                                   locations.begin(), locations.end())));
215
216        DPRINTF(CacheRepl, "set %x, way %x: selecting blk for replacement\n",
217            victim->set, victim->way);
218
219        return victim;
220    }
221
222    /**
223     * Find all possible block locations for insertion and replacement of
224     * an address. Should be called immediately before ReplacementPolicy's
225     * findVictim() not to break cache resizing.
226     * Returns blocks in all ways belonging to the set of the address.
227     *
228     * @param addr The addr to a find possible locations for.
229     * @return The possible locations.
230     */
231    const std::vector<CacheBlk*> getPossibleLocations(Addr addr)
232    {
233        return sets[extractSet(addr)].blks;
234    }
235
236    /**
237     * Insert the new block into the cache and update replacement data.
238     *
239     * @param pkt Packet holding the address to update
240     * @param blk The block to update.
241     */
242    void insertBlock(PacketPtr pkt, CacheBlk *blk) override
243    {
244        // Insert block
245        BaseTags::insertBlock(pkt, blk);
246
247        // Update replacement policy
248        replacementPolicy->reset(blk->replacementData);
249    }
250
251    /**
252     * Limit the allocation for the cache ways.
253     * @param ways The maximum number of ways available for replacement.
254     */
255    virtual void setWayAllocationMax(int ways) override
256    {
257        fatal_if(ways < 1, "Allocation limit must be greater than zero");
258        allocAssoc = ways;
259    }
260
261    /**
262     * Get the way allocation mask limit.
263     * @return The maximum number of ways available for replacement.
264     */
265    virtual int getWayAllocationMax() const override
266    {
267        return allocAssoc;
268    }
269
270    /**
271     * Generate the tag from the given address.
272     * @param addr The address to get the tag from.
273     * @return The tag of the address.
274     */
275    Addr extractTag(Addr addr) const override
276    {
277        return (addr >> tagShift);
278    }
279
280    /**
281     * Calculate the set index from the address.
282     * @param addr The address to get the set from.
283     * @return The set index of the address.
284     */
285    int extractSet(Addr addr) const override
286    {
287        return ((addr >> setShift) & setMask);
288    }
289
290    /**
291     * Regenerate the block address from the tag and set.
292     *
293     * @param block The block.
294     * @return the block address.
295     */
296    Addr regenerateBlkAddr(const CacheBlk* blk) const override
297    {
298        return ((blk->tag << tagShift) | ((Addr)blk->set << setShift));
299    }
300
301    /**
302     * Called at end of simulation to complete average block reference stats.
303     */
304    void cleanupRefs() override;
305
306    /**
307     * Print all tags used
308     */
309    std::string print() const override;
310
311    /**
312     * Called prior to dumping stats to compute task occupancy
313     */
314    void computeStats() override;
315
316    /**
317     * Visit each block in the tag store and apply a visitor to the
318     * block.
319     *
320     * The visitor should be a function (or object that behaves like a
321     * function) that takes a cache block reference as its parameter
322     * and returns a bool. A visitor can request the traversal to be
323     * stopped by returning false, returning true causes it to be
324     * called for the next block in the tag store.
325     *
326     * \param visitor Visitor to call on each block.
327     */
328    void forEachBlk(CacheBlkVisitor &visitor) override {
329        for (CacheBlk& blk : blks) {
330            if (!visitor(blk))
331                return;
332        }
333    }
334};
335
336#endif //__MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
337