base_set_assoc.hh revision 12679:6c416cb3ca06 
1/*
2 * Copyright (c) 2012-2014,2017 ARM Limited
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11 * unmodified and in its entirety in all distributions of the software,
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13 *
14 * Copyright (c) 2003-2005,2014 The Regents of The University of Michigan
15 * All rights reserved.
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18 * modification, are permitted provided that the following conditions are
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27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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39 *
40 * Authors: Erik Hallnor
41 */
42
43/**
44 * @file
45 * Declaration of a base set associative tag store.
46 */
47
48#ifndef __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
49#define __MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
50
51#include <cassert>
52#include <cstring>
53#include <memory>
54#include <vector>
55
56#include "mem/cache/base.hh"
57#include "mem/cache/blk.hh"
58#include "mem/cache/tags/base.hh"
59#include "mem/cache/tags/cacheset.hh"
60#include "mem/packet.hh"
61#include "params/BaseSetAssoc.hh"
62
63/**
64 * A BaseSetAssoc cache tag store.
65 * @sa  \ref gem5MemorySystem "gem5 Memory System"
66 *
67 * The BaseSetAssoc placement policy divides the cache into s sets of w
68 * cache lines (ways). A cache line is mapped onto a set, and can be placed
69 * into any of the ways of this set.
70 */
71class BaseSetAssoc : public BaseTags
72{
73  public:
74    /** Typedef the block type used in this tag store. */
75    typedef CacheBlk BlkType;
76    /** Typedef the set type used in this tag store. */
77    typedef CacheSet<CacheBlk> SetType;
78
79  protected:
80    /** The associativity of the cache. */
81    const unsigned assoc;
82    /** The allocatable associativity of the cache (alloc mask). */
83    unsigned allocAssoc;
84
85    /** The cache blocks. */
86    std::vector<BlkType> blks;
87
88    /** The number of sets in the cache. */
89    const unsigned numSets;
90
91    /** Whether tags and data are accessed sequentially. */
92    const bool sequentialAccess;
93
94    /** The cache sets. */
95    std::vector<SetType> sets;
96
97    /** The amount to shift the address to get the set. */
98    int setShift;
99    /** The amount to shift the address to get the tag. */
100    int tagShift;
101    /** Mask out all bits that aren't part of the set index. */
102    unsigned setMask;
103
104    /** Replacement policy */
105    BaseReplacementPolicy *replacementPolicy;
106
107  public:
108
109    /** Convenience typedef. */
110     typedef BaseSetAssocParams Params;
111
112    /**
113     * Construct and initialize this tag store.
114     */
115    BaseSetAssoc(const Params *p);
116
117    /**
118     * Destructor
119     */
120    virtual ~BaseSetAssoc() {};
121
122    /**
123     * Find the cache block given set and way
124     * @param set The set of the block.
125     * @param way The way of the block.
126     * @return The cache block.
127     */
128    CacheBlk *findBlockBySetAndWay(int set, int way) const override;
129
130    /**
131     * Access block and update replacement data. May not succeed, in which case
132     * nullptr is returned. This has all the implications of a cache
133     * access and should only be used as such. Returns the access latency as a
134     * side effect.
135     * @param addr The address to find.
136     * @param is_secure True if the target memory space is secure.
137     * @param lat The access latency.
138     * @return Pointer to the cache block if found.
139     */
140    CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) override
141    {
142        BlkType *blk = findBlock(addr, is_secure);
143
144        // Access all tags in parallel, hence one in each way.  The data side
145        // either accesses all blocks in parallel, or one block sequentially on
146        // a hit.  Sequential access with a miss doesn't access data.
147        tagAccesses += allocAssoc;
148        if (sequentialAccess) {
149            if (blk != nullptr) {
150                dataAccesses += 1;
151            }
152        } else {
153            dataAccesses += allocAssoc;
154        }
155
156        if (blk != nullptr) {
157            // If a cache hit
158            lat = accessLatency;
159            // Check if the block to be accessed is available. If not,
160            // apply the accessLatency on top of block->whenReady.
161            if (blk->whenReady > curTick() &&
162                cache->ticksToCycles(blk->whenReady - curTick()) >
163                accessLatency) {
164                lat = cache->ticksToCycles(blk->whenReady - curTick()) +
165                accessLatency;
166            }
167
168            // Update replacement data of accessed block
169            replacementPolicy->touch(blk);
170        } else {
171            // If a cache miss
172            lat = lookupLatency;
173        }
174
175        return blk;
176    }
177
178    /**
179     * Finds the given address in the cache, do not update replacement data.
180     * i.e. This is a no-side-effect find of a block.
181     * @param addr The address to find.
182     * @param is_secure True if the target memory space is secure.
183     * @param asid The address space ID.
184     * @return Pointer to the cache block if found.
185     */
186    CacheBlk* findBlock(Addr addr, bool is_secure) const override;
187
188    /**
189     * Find replacement victim based on address.
190     *
191     * @param addr Address to find a victim for.
192     * @return Cache block to be replaced.
193     */
194    CacheBlk* findVictim(Addr addr) override
195    {
196        // Choose replacement victim from replacement candidates
197        return replacementPolicy->getVictim(getPossibleLocations(addr));
198    }
199
200    /**
201     * Find all possible block locations for insertion and replacement of
202     * an address. Should be called immediately before ReplacementPolicy's
203     * findVictim() not to break cache resizing.
204     * Returns blocks in all ways belonging to the set of the address.
205     *
206     * @param addr The addr to a find possible locations for.
207     * @return The possible locations.
208     */
209    const std::vector<CacheBlk*> getPossibleLocations(Addr addr)
210    {
211        return sets[extractSet(addr)].blks;
212    }
213
214    /**
215     * Insert the new block into the cache and update replacement data.
216     *
217     * @param pkt Packet holding the address to update
218     * @param blk The block to update.
219     */
220    void insertBlock(PacketPtr pkt, CacheBlk *blk) override
221    {
222        // Insert block
223        BaseTags::insertBlock(pkt, blk);
224
225        // Update replacement policy
226        replacementPolicy->reset(blk);
227    }
228
229    /**
230     * Limit the allocation for the cache ways.
231     * @param ways The maximum number of ways available for replacement.
232     */
233    virtual void setWayAllocationMax(int ways) override
234    {
235        fatal_if(ways < 1, "Allocation limit must be greater than zero");
236        allocAssoc = ways;
237    }
238
239    /**
240     * Get the way allocation mask limit.
241     * @return The maximum number of ways available for replacement.
242     */
243    virtual int getWayAllocationMax() const override
244    {
245        return allocAssoc;
246    }
247
248    /**
249     * Generate the tag from the given address.
250     * @param addr The address to get the tag from.
251     * @return The tag of the address.
252     */
253    Addr extractTag(Addr addr) const override
254    {
255        return (addr >> tagShift);
256    }
257
258    /**
259     * Calculate the set index from the address.
260     * @param addr The address to get the set from.
261     * @return The set index of the address.
262     */
263    int extractSet(Addr addr) const override
264    {
265        return ((addr >> setShift) & setMask);
266    }
267
268    /**
269     * Regenerate the block address from the tag and set.
270     *
271     * @param block The block.
272     * @return the block address.
273     */
274    Addr regenerateBlkAddr(const CacheBlk* blk) const override
275    {
276        return ((blk->tag << tagShift) | ((Addr)blk->set << setShift));
277    }
278
279    /**
280     * Called at end of simulation to complete average block reference stats.
281     */
282    void cleanupRefs() override;
283
284    /**
285     * Print all tags used
286     */
287    std::string print() const override;
288
289    /**
290     * Called prior to dumping stats to compute task occupancy
291     */
292    void computeStats() override;
293
294    /**
295     * Visit each block in the tag store and apply a visitor to the
296     * block.
297     *
298     * The visitor should be a function (or object that behaves like a
299     * function) that takes a cache block reference as its parameter
300     * and returns a bool. A visitor can request the traversal to be
301     * stopped by returning false, returning true causes it to be
302     * called for the next block in the tag store.
303     *
304     * \param visitor Visitor to call on each block.
305     */
306    void forEachBlk(CacheBlkVisitor &visitor) override {
307        for (CacheBlk& blk : blks) {
308            if (!visitor(blk))
309                return;
310        }
311    }
312};
313
314#endif //__MEM_CACHE_TAGS_BASE_SET_ASSOC_HH__
315