base.hh revision 11893:3033b3e6a32a
1/* 2 * Copyright (c) 2012-2014,2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2003-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Erik Hallnor 41 * Ron Dreslinski 42 */ 43 44/** 45 * @file 46 * Declaration of a common base class for cache tagstore objects. 47 */ 48 49#ifndef __BASE_TAGS_HH__ 50#define __BASE_TAGS_HH__ 51 52#include <string> 53 54#include "base/callback.hh" 55#include "base/statistics.hh" 56#include "mem/cache/blk.hh" 57#include "params/BaseTags.hh" 58#include "sim/clocked_object.hh" 59 60class BaseCache; 61 62/** 63 * A common base class of Cache tagstore objects. 64 */ 65class BaseTags : public ClockedObject 66{ 67 protected: 68 /** The block size of the cache. */ 69 const unsigned blkSize; 70 /** Mask out all bits that aren't part of the block offset. */ 71 const Addr blkMask; 72 /** The size of the cache. */ 73 const unsigned size; 74 /** The tag lookup latency of the cache. */ 75 const Cycles lookupLatency; 76 /** 77 * The total access latency of the cache. This latency 78 * is different depending on the cache access mode 79 * (parallel or sequential) 80 */ 81 const Cycles accessLatency; 82 /** Pointer to the parent cache. */ 83 BaseCache *cache; 84 85 /** 86 * The number of tags that need to be touched to meet the warmup 87 * percentage. 88 */ 89 int warmupBound; 90 /** Marked true when the cache is warmed up. */ 91 bool warmedUp; 92 93 /** the number of blocks in the cache */ 94 unsigned numBlocks; 95 96 // Statistics 97 /** 98 * @addtogroup CacheStatistics 99 * @{ 100 */ 101 102 /** Number of replacements of valid blocks per thread. */ 103 Stats::Vector replacements; 104 /** Per cycle average of the number of tags that hold valid data. */ 105 Stats::Average tagsInUse; 106 107 /** The total number of references to a block before it is replaced. */ 108 Stats::Scalar totalRefs; 109 110 /** 111 * The number of reference counts sampled. This is different from 112 * replacements because we sample all the valid blocks when the simulator 113 * exits. 114 */ 115 Stats::Scalar sampledRefs; 116 117 /** 118 * Average number of references to a block before is was replaced. 119 * @todo This should change to an average stat once we have them. 120 */ 121 Stats::Formula avgRefs; 122 123 /** The cycle that the warmup percentage was hit. */ 124 Stats::Scalar warmupCycle; 125 126 /** Average occupancy of each requestor using the cache */ 127 Stats::AverageVector occupancies; 128 129 /** Average occ % of each requestor using the cache */ 130 Stats::Formula avgOccs; 131 132 /** Occupancy of each context/cpu using the cache */ 133 Stats::Vector occupanciesTaskId; 134 135 /** Occupancy of each context/cpu using the cache */ 136 Stats::Vector2d ageTaskId; 137 138 /** Occ % of each context/cpu using the cache */ 139 Stats::Formula percentOccsTaskId; 140 141 /** Number of tags consulted over all accesses. */ 142 Stats::Scalar tagAccesses; 143 /** Number of data blocks consulted over all accesses. */ 144 Stats::Scalar dataAccesses; 145 146 /** 147 * @} 148 */ 149 150 public: 151 typedef BaseTagsParams Params; 152 BaseTags(const Params *p); 153 154 /** 155 * Destructor. 156 */ 157 virtual ~BaseTags() {} 158 159 /** 160 * Set the parent cache back pointer. 161 * @param _cache Pointer to parent cache. 162 */ 163 void setCache(BaseCache *_cache); 164 165 /** 166 * Register local statistics. 167 */ 168 void regStats(); 169 170 /** 171 * Average in the reference count for valid blocks when the simulation 172 * exits. 173 */ 174 virtual void cleanupRefs() {} 175 176 /** 177 * Computes stats just prior to dump event 178 */ 179 virtual void computeStats() {} 180 181 /** 182 * Print all tags used 183 */ 184 virtual std::string print() const = 0; 185 186 /** 187 * Find a block using the memory address 188 */ 189 virtual CacheBlk * findBlock(Addr addr, bool is_secure) const = 0; 190 191 /** 192 * Align an address to the block size. 193 * @param addr the address to align. 194 * @return The block address. 195 */ 196 Addr blkAlign(Addr addr) const 197 { 198 return addr & ~blkMask; 199 } 200 201 /** 202 * Calculate the block offset of an address. 203 * @param addr the address to get the offset of. 204 * @return the block offset. 205 */ 206 int extractBlkOffset(Addr addr) const 207 { 208 return (addr & blkMask); 209 } 210 211 /** 212 * Find the cache block given set and way 213 * @param set The set of the block. 214 * @param way The way of the block. 215 * @return The cache block. 216 */ 217 virtual CacheBlk *findBlockBySetAndWay(int set, int way) const = 0; 218 219 /** 220 * Limit the allocation for the cache ways. 221 * @param ways The maximum number of ways available for replacement. 222 */ 223 virtual void setWayAllocationMax(int ways) 224 { 225 panic("This tag class does not implement way allocation limit!\n"); 226 } 227 228 /** 229 * Get the way allocation mask limit. 230 * @return The maximum number of ways available for replacement. 231 */ 232 virtual int getWayAllocationMax() const 233 { 234 panic("This tag class does not implement way allocation limit!\n"); 235 return -1; 236 } 237 238 virtual void invalidate(CacheBlk *blk) = 0; 239 240 virtual CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat) = 0; 241 242 virtual Addr extractTag(Addr addr) const = 0; 243 244 virtual void insertBlock(PacketPtr pkt, CacheBlk *blk) = 0; 245 246 virtual Addr regenerateBlkAddr(Addr tag, unsigned set) const = 0; 247 248 virtual CacheBlk* findVictim(Addr addr) = 0; 249 250 virtual int extractSet(Addr addr) const = 0; 251 252 virtual void forEachBlk(CacheBlkVisitor &visitor) = 0; 253}; 254 255class BaseTagsCallback : public Callback 256{ 257 BaseTags *tags; 258 public: 259 BaseTagsCallback(BaseTags *t) : tags(t) {} 260 virtual void process() { tags->cleanupRefs(); }; 261}; 262 263class BaseTagsDumpCallback : public Callback 264{ 265 BaseTags *tags; 266 public: 267 BaseTagsDumpCallback(BaseTags *t) : tags(t) {} 268 virtual void process() { tags->computeStats(); }; 269}; 270 271#endif //__BASE_TAGS_HH__ 272