base.hh revision 7612
12810SN/A/* 22810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 32810SN/A * All rights reserved. 42810SN/A * 52810SN/A * Redistribution and use in source and binary forms, with or without 62810SN/A * modification, are permitted provided that the following conditions are 72810SN/A * met: redistributions of source code must retain the above copyright 82810SN/A * notice, this list of conditions and the following disclaimer; 92810SN/A * redistributions in binary form must reproduce the above copyright 102810SN/A * notice, this list of conditions and the following disclaimer in the 112810SN/A * documentation and/or other materials provided with the distribution; 122810SN/A * neither the name of the copyright holders nor the names of its 132810SN/A * contributors may be used to endorse or promote products derived from 142810SN/A * this software without specific prior written permission. 152810SN/A * 162810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272810SN/A * 282810SN/A * Authors: Erik Hallnor 292810SN/A * Ron Dreslinski 302810SN/A */ 312810SN/A 322810SN/A/** 332810SN/A * @file 342810SN/A * Declaration of a common base class for cache tagstore objects. 352810SN/A */ 362810SN/A 372810SN/A#ifndef __BASE_TAGS_HH__ 382810SN/A#define __BASE_TAGS_HH__ 392810SN/A 402810SN/A#include <string> 412810SN/A#include "base/statistics.hh" 422810SN/A#include "base/callback.hh" 432810SN/A 442810SN/Aclass BaseCache; 452810SN/A 462810SN/A/** 472810SN/A * A common base class of Cache tagstore objects. 482810SN/A */ 492810SN/Aclass BaseTags 502810SN/A{ 512810SN/A protected: 522810SN/A /** Pointer to the parent cache. */ 532810SN/A BaseCache *cache; 542810SN/A 552810SN/A /** Local copy of the parent cache name. Used for DPRINTF. */ 562810SN/A std::string objName; 572810SN/A 582810SN/A /** 592810SN/A * The number of tags that need to be touched to meet the warmup 602810SN/A * percentage. 612810SN/A */ 622810SN/A int warmupBound; 632810SN/A /** Marked true when the cache is warmed up. */ 642810SN/A bool warmedUp; 652810SN/A 666978SLisa.Hsu@amd.com /** the number of blocks in the cache */ 676978SLisa.Hsu@amd.com unsigned numBlocks; 686978SLisa.Hsu@amd.com 692810SN/A // Statistics 702810SN/A /** 712810SN/A * @addtogroup CacheStatistics 722810SN/A * @{ 732810SN/A */ 742810SN/A 752810SN/A /** Number of replacements of valid blocks per thread. */ 765999Snate@binkert.org Stats::Vector replacements; 772810SN/A /** Per cycle average of the number of tags that hold valid data. */ 785999Snate@binkert.org Stats::Average tagsInUse; 792810SN/A 802810SN/A /** The total number of references to a block before it is replaced. */ 815999Snate@binkert.org Stats::Scalar totalRefs; 822810SN/A 832810SN/A /** 842810SN/A * The number of reference counts sampled. This is different from 852810SN/A * replacements because we sample all the valid blocks when the simulator 862810SN/A * exits. 872810SN/A */ 885999Snate@binkert.org Stats::Scalar sampledRefs; 892810SN/A 902810SN/A /** 912810SN/A * Average number of references to a block before is was replaced. 922810SN/A * @todo This should change to an average stat once we have them. 932810SN/A */ 942810SN/A Stats::Formula avgRefs; 952810SN/A 962810SN/A /** The cycle that the warmup percentage was hit. */ 975999Snate@binkert.org Stats::Scalar warmupCycle; 986978SLisa.Hsu@amd.com 996978SLisa.Hsu@amd.com /** Average occupancy of each context/cpu using the cache */ 1006978SLisa.Hsu@amd.com Stats::AverageVector occupancies; 1016978SLisa.Hsu@amd.com 1026978SLisa.Hsu@amd.com /** Average occ % of each context/cpu using the cache */ 1036978SLisa.Hsu@amd.com Stats::Formula avgOccs; 1046978SLisa.Hsu@amd.com 1052810SN/A /** 1062810SN/A * @} 1072810SN/A */ 1082810SN/A 1092810SN/A public: 1102810SN/A 1112810SN/A /** 1122810SN/A * Destructor. 1132810SN/A */ 1142810SN/A virtual ~BaseTags() {} 1152810SN/A 1162810SN/A /** 1172810SN/A * Set the parent cache back pointer. Also copies the cache name to 1182810SN/A * objName. 1192810SN/A * @param _cache Pointer to parent cache. 1202810SN/A */ 1212810SN/A void setCache(BaseCache *_cache); 1222810SN/A 1232810SN/A /** 1242810SN/A * Return the parent cache name. 1252810SN/A * @return the parent cache name. 1262810SN/A */ 1272810SN/A const std::string &name() const 1282810SN/A { 1292810SN/A return objName; 1302810SN/A } 1312810SN/A 1322810SN/A /** 1332810SN/A * Register local statistics. 1342810SN/A * @param name The name to preceed each statistic name. 1352810SN/A */ 1362810SN/A void regStats(const std::string &name); 1372810SN/A 1382810SN/A /** 1392810SN/A * Average in the reference count for valid blocks when the simulation 1402810SN/A * exits. 1412810SN/A */ 1422810SN/A virtual void cleanupRefs() {} 1437612SGene.Wu@arm.com 1447612SGene.Wu@arm.com /** 1457612SGene.Wu@arm.com *iterated through all blocks and clear all locks 1467612SGene.Wu@arm.com *Needed to clear all lock tracking at once 1477612SGene.Wu@arm.com */ 1487612SGene.Wu@arm.com virtual void clearLocks() {} 1492810SN/A}; 1502810SN/A 1512810SN/Aclass BaseTagsCallback : public Callback 1522810SN/A{ 1532810SN/A BaseTags *tags; 1542810SN/A public: 1552810SN/A BaseTagsCallback(BaseTags *t) : tags(t) {} 1562810SN/A virtual void process() { tags->cleanupRefs(); }; 1572810SN/A}; 1582810SN/A 1592810SN/A#endif //__BASE_TAGS_HH__ 160