base.hh revision 10025
12810SN/A/* 29796Sprakash.ramrakhyani@arm.com * Copyright (c) 2012-2013 ARM Limited 39347SAndreas.Sandberg@arm.com * All rights reserved. 49347SAndreas.Sandberg@arm.com * 59347SAndreas.Sandberg@arm.com * The license below extends only to copyright in the software and shall 69347SAndreas.Sandberg@arm.com * not be construed as granting a license to any other intellectual 79347SAndreas.Sandberg@arm.com * property including but not limited to intellectual property relating 89347SAndreas.Sandberg@arm.com * to a hardware implementation of the functionality of the software 99347SAndreas.Sandberg@arm.com * licensed hereunder. You may use the software subject to the license 109347SAndreas.Sandberg@arm.com * terms below provided that you ensure that this notice is replicated 119347SAndreas.Sandberg@arm.com * unmodified and in its entirety in all distributions of the software, 129347SAndreas.Sandberg@arm.com * modified or unmodified, in source code or in binary form. 139347SAndreas.Sandberg@arm.com * 142810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 152810SN/A * All rights reserved. 162810SN/A * 172810SN/A * Redistribution and use in source and binary forms, with or without 182810SN/A * modification, are permitted provided that the following conditions are 192810SN/A * met: redistributions of source code must retain the above copyright 202810SN/A * notice, this list of conditions and the following disclaimer; 212810SN/A * redistributions in binary form must reproduce the above copyright 222810SN/A * notice, this list of conditions and the following disclaimer in the 232810SN/A * documentation and/or other materials provided with the distribution; 242810SN/A * neither the name of the copyright holders nor the names of its 252810SN/A * contributors may be used to endorse or promote products derived from 262810SN/A * this software without specific prior written permission. 272810SN/A * 282810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392810SN/A * 402810SN/A * Authors: Erik Hallnor 412810SN/A * Ron Dreslinski 422810SN/A */ 432810SN/A 442810SN/A/** 452810SN/A * @file 462810SN/A * Declaration of a common base class for cache tagstore objects. 472810SN/A */ 482810SN/A 492810SN/A#ifndef __BASE_TAGS_HH__ 502810SN/A#define __BASE_TAGS_HH__ 512810SN/A 522810SN/A#include <string> 538229Snate@binkert.org 548229Snate@binkert.org#include "base/callback.hh" 552810SN/A#include "base/statistics.hh" 569796Sprakash.ramrakhyani@arm.com#include "params/BaseTags.hh" 579796Sprakash.ramrakhyani@arm.com#include "sim/clocked_object.hh" 582810SN/A 592810SN/Aclass BaseCache; 602810SN/A 612810SN/A/** 622810SN/A * A common base class of Cache tagstore objects. 632810SN/A */ 649796Sprakash.ramrakhyani@arm.comclass BaseTags : public ClockedObject 652810SN/A{ 662810SN/A protected: 679796Sprakash.ramrakhyani@arm.com /** The block size of the cache. */ 689796Sprakash.ramrakhyani@arm.com const unsigned blkSize; 699796Sprakash.ramrakhyani@arm.com /** The size of the cache. */ 709796Sprakash.ramrakhyani@arm.com const unsigned size; 719796Sprakash.ramrakhyani@arm.com /** The hit latency of the cache. */ 729796Sprakash.ramrakhyani@arm.com const Cycles hitLatency; 739796Sprakash.ramrakhyani@arm.com 742810SN/A /** Pointer to the parent cache. */ 752810SN/A BaseCache *cache; 762810SN/A 772810SN/A /** 782810SN/A * The number of tags that need to be touched to meet the warmup 792810SN/A * percentage. 802810SN/A */ 812810SN/A int warmupBound; 822810SN/A /** Marked true when the cache is warmed up. */ 832810SN/A bool warmedUp; 842810SN/A 856978SLisa.Hsu@amd.com /** the number of blocks in the cache */ 866978SLisa.Hsu@amd.com unsigned numBlocks; 876978SLisa.Hsu@amd.com 882810SN/A // Statistics 892810SN/A /** 902810SN/A * @addtogroup CacheStatistics 912810SN/A * @{ 922810SN/A */ 932810SN/A 942810SN/A /** Number of replacements of valid blocks per thread. */ 955999Snate@binkert.org Stats::Vector replacements; 962810SN/A /** Per cycle average of the number of tags that hold valid data. */ 975999Snate@binkert.org Stats::Average tagsInUse; 982810SN/A 992810SN/A /** The total number of references to a block before it is replaced. */ 1005999Snate@binkert.org Stats::Scalar totalRefs; 1012810SN/A 1022810SN/A /** 1032810SN/A * The number of reference counts sampled. This is different from 1042810SN/A * replacements because we sample all the valid blocks when the simulator 1052810SN/A * exits. 1062810SN/A */ 1075999Snate@binkert.org Stats::Scalar sampledRefs; 1082810SN/A 1092810SN/A /** 1102810SN/A * Average number of references to a block before is was replaced. 1112810SN/A * @todo This should change to an average stat once we have them. 1122810SN/A */ 1132810SN/A Stats::Formula avgRefs; 1142810SN/A 1152810SN/A /** The cycle that the warmup percentage was hit. */ 1165999Snate@binkert.org Stats::Scalar warmupCycle; 1176978SLisa.Hsu@amd.com 1188833Sdam.sunwoo@arm.com /** Average occupancy of each requestor using the cache */ 1196978SLisa.Hsu@amd.com Stats::AverageVector occupancies; 1206978SLisa.Hsu@amd.com 1218833Sdam.sunwoo@arm.com /** Average occ % of each requestor using the cache */ 1226978SLisa.Hsu@amd.com Stats::Formula avgOccs; 1236978SLisa.Hsu@amd.com 12410024Sdam.sunwoo@arm.com /** Occupancy of each context/cpu using the cache */ 12510024Sdam.sunwoo@arm.com Stats::Vector occupanciesTaskId; 12610024Sdam.sunwoo@arm.com 12710024Sdam.sunwoo@arm.com /** Occupancy of each context/cpu using the cache */ 12810024Sdam.sunwoo@arm.com Stats::Vector2d ageTaskId; 12910024Sdam.sunwoo@arm.com 13010024Sdam.sunwoo@arm.com /** Occ % of each context/cpu using the cache */ 13110024Sdam.sunwoo@arm.com Stats::Formula percentOccsTaskId; 13210024Sdam.sunwoo@arm.com 13310025Stimothy.jones@arm.com /** Number of tags consulted over all accesses. */ 13410025Stimothy.jones@arm.com Stats::Scalar tagAccesses; 13510025Stimothy.jones@arm.com /** Number of data blocks consulted over all accesses. */ 13610025Stimothy.jones@arm.com Stats::Scalar dataAccesses; 13710025Stimothy.jones@arm.com 1382810SN/A /** 1392810SN/A * @} 1402810SN/A */ 1412810SN/A 1422810SN/A public: 1439796Sprakash.ramrakhyani@arm.com typedef BaseTagsParams Params; 1449796Sprakash.ramrakhyani@arm.com BaseTags(const Params *p); 1452810SN/A 1462810SN/A /** 1472810SN/A * Destructor. 1482810SN/A */ 1492810SN/A virtual ~BaseTags() {} 1502810SN/A 1512810SN/A /** 1529796Sprakash.ramrakhyani@arm.com * Set the parent cache back pointer. 1532810SN/A * @param _cache Pointer to parent cache. 1542810SN/A */ 1552810SN/A void setCache(BaseCache *_cache); 1562810SN/A 1572810SN/A /** 1589796Sprakash.ramrakhyani@arm.com * Register local statistics. 1592810SN/A */ 1609796Sprakash.ramrakhyani@arm.com void regStats(); 1612810SN/A 1622810SN/A /** 1632810SN/A * Average in the reference count for valid blocks when the simulation 1642810SN/A * exits. 1652810SN/A */ 1662810SN/A virtual void cleanupRefs() {} 1677612SGene.Wu@arm.com 1687612SGene.Wu@arm.com /** 16910024Sdam.sunwoo@arm.com * Computes stats just prior to dump event 17010024Sdam.sunwoo@arm.com */ 17110024Sdam.sunwoo@arm.com virtual void computeStats() {} 17210024Sdam.sunwoo@arm.com 17310024Sdam.sunwoo@arm.com /** 1747612SGene.Wu@arm.com *iterated through all blocks and clear all locks 1757612SGene.Wu@arm.com *Needed to clear all lock tracking at once 1767612SGene.Wu@arm.com */ 1777612SGene.Wu@arm.com virtual void clearLocks() {} 1789663Suri.wiener@arm.com 1799663Suri.wiener@arm.com /** 1809663Suri.wiener@arm.com * Print all tags used 1819663Suri.wiener@arm.com */ 1829663Suri.wiener@arm.com virtual std::string print() const = 0; 1832810SN/A}; 1842810SN/A 1852810SN/Aclass BaseTagsCallback : public Callback 1862810SN/A{ 1872810SN/A BaseTags *tags; 1882810SN/A public: 1892810SN/A BaseTagsCallback(BaseTags *t) : tags(t) {} 1902810SN/A virtual void process() { tags->cleanupRefs(); }; 1912810SN/A}; 1922810SN/A 19310024Sdam.sunwoo@arm.comclass BaseTagsDumpCallback : public Callback 19410024Sdam.sunwoo@arm.com{ 19510024Sdam.sunwoo@arm.com BaseTags *tags; 19610024Sdam.sunwoo@arm.com public: 19710024Sdam.sunwoo@arm.com BaseTagsDumpCallback(BaseTags *t) : tags(t) {} 19810024Sdam.sunwoo@arm.com virtual void process() { tags->computeStats(); }; 19910024Sdam.sunwoo@arm.com}; 20010024Sdam.sunwoo@arm.com 2012810SN/A#endif //__BASE_TAGS_HH__ 202