base.cc revision 12703
15390SN/A/*
25443SN/A * Copyright (c) 2013,2016 ARM Limited
35390SN/A * All rights reserved.
45390SN/A *
55390SN/A * The license below extends only to copyright in the software and shall
65390SN/A * not be construed as granting a license to any other intellectual
75390SN/A * property including but not limited to intellectual property relating
85390SN/A * to a hardware implementation of the functionality of the software
95390SN/A * licensed hereunder.  You may use the software subject to the license
105390SN/A * terms below provided that you ensure that this notice is replicated
115390SN/A * unmodified and in its entirety in all distributions of the software,
125390SN/A * modified or unmodified, in source code or in binary form.
135390SN/A *
145390SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
155390SN/A * All rights reserved.
165390SN/A *
175390SN/A * Redistribution and use in source and binary forms, with or without
185390SN/A * modification, are permitted provided that the following conditions are
195390SN/A * met: redistributions of source code must retain the above copyright
205390SN/A * notice, this list of conditions and the following disclaimer;
215390SN/A * redistributions in binary form must reproduce the above copyright
225390SN/A * notice, this list of conditions and the following disclaimer in the
235390SN/A * documentation and/or other materials provided with the distribution;
245390SN/A * neither the name of the copyright holders nor the names of its
255390SN/A * contributors may be used to endorse or promote products derived from
265390SN/A * this software without specific prior written permission.
275390SN/A *
285390SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
295390SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
305390SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
3111793Sbrandon.potter@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
3211793Sbrandon.potter@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
336216Snate@binkert.org * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
345636SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
355446SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
365390SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
375390SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
385390SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
395636SN/A *
405636SN/A * Authors: Erik Hallnor
415643Sgblack@eecs.umich.edu *          Ron Dreslinski
425390SN/A */
435446SN/A
445638Sgblack@eecs.umich.edu/**
455446SN/A * @file
465446SN/A * Definitions of BaseTags.
475390SN/A */
485390SN/A
495390SN/A#include "mem/cache/tags/base.hh"
505390SN/A
515390SN/A#include "mem/cache/base.hh"
525390SN/A#include "sim/sim_exit.hh"
535390SN/A
54BaseTags::BaseTags(const Params *p)
55    : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1),
56      size(p->size),
57      lookupLatency(p->tag_latency),
58      accessLatency(p->sequential_access ?
59                    p->tag_latency + p->data_latency :
60                    std::max(p->tag_latency, p->data_latency)),
61      cache(nullptr),
62      warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)),
63      warmedUp(false), numBlocks(p->size / p->block_size),
64      dataBlks(new uint8_t[p->size]) // Allocate data storage in one big chunk
65{
66}
67
68void
69BaseTags::setCache(BaseCache *_cache)
70{
71    assert(!cache);
72    cache = _cache;
73}
74
75void
76BaseTags::insertBlock(PacketPtr pkt, CacheBlk *blk)
77{
78    // Get address
79    Addr addr = pkt->getAddr();
80
81    // If we're replacing a block that was previously valid update
82    // stats for it. This can't be done in findBlock() because a
83    // found block might not actually be replaced there if the
84    // coherence protocol says it can't be.
85    if (blk->isValid()) {
86        totalRefs += blk->refCount;
87        ++sampledRefs;
88
89        invalidate(blk);
90        blk->invalidate();
91    }
92
93    // Previous block, if existed, has been removed, and now we have
94    // to insert the new one
95
96    // Deal with what we are bringing in
97    MasterID master_id = pkt->req->masterId();
98    assert(master_id < cache->system->maxMasters());
99    occupancies[master_id]++;
100
101    // Insert block with tag, src master id and task id
102    blk->insert(extractTag(addr), pkt->isSecure(), master_id,
103                pkt->req->taskId());
104
105    tagsInUse++;
106    if (!warmedUp && tagsInUse.value() >= warmupBound) {
107        warmedUp = true;
108        warmupCycle = curTick();
109    }
110
111    // We only need to write into one tag and one data block.
112    tagAccesses += 1;
113    dataAccesses += 1;
114}
115
116void
117BaseTags::regStats()
118{
119    ClockedObject::regStats();
120
121    using namespace Stats;
122
123    tagsInUse
124        .name(name() + ".tagsinuse")
125        .desc("Cycle average of tags in use")
126        ;
127
128    totalRefs
129        .name(name() + ".total_refs")
130        .desc("Total number of references to valid blocks.")
131        ;
132
133    sampledRefs
134        .name(name() + ".sampled_refs")
135        .desc("Sample count of references to valid blocks.")
136        ;
137
138    avgRefs
139        .name(name() + ".avg_refs")
140        .desc("Average number of references to valid blocks.")
141        ;
142
143    avgRefs = totalRefs/sampledRefs;
144
145    warmupCycle
146        .name(name() + ".warmup_cycle")
147        .desc("Cycle when the warmup percentage was hit.")
148        ;
149
150    occupancies
151        .init(cache->system->maxMasters())
152        .name(name() + ".occ_blocks")
153        .desc("Average occupied blocks per requestor")
154        .flags(nozero | nonan)
155        ;
156    for (int i = 0; i < cache->system->maxMasters(); i++) {
157        occupancies.subname(i, cache->system->getMasterName(i));
158    }
159
160    avgOccs
161        .name(name() + ".occ_percent")
162        .desc("Average percentage of cache occupancy")
163        .flags(nozero | total)
164        ;
165    for (int i = 0; i < cache->system->maxMasters(); i++) {
166        avgOccs.subname(i, cache->system->getMasterName(i));
167    }
168
169    avgOccs = occupancies / Stats::constant(numBlocks);
170
171    occupanciesTaskId
172        .init(ContextSwitchTaskId::NumTaskId)
173        .name(name() + ".occ_task_id_blocks")
174        .desc("Occupied blocks per task id")
175        .flags(nozero | nonan)
176        ;
177
178    ageTaskId
179        .init(ContextSwitchTaskId::NumTaskId, 5)
180        .name(name() + ".age_task_id_blocks")
181        .desc("Occupied blocks per task id")
182        .flags(nozero | nonan)
183        ;
184
185    percentOccsTaskId
186        .name(name() + ".occ_task_id_percent")
187        .desc("Percentage of cache occupancy per task id")
188        .flags(nozero)
189        ;
190
191    percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks);
192
193    tagAccesses
194        .name(name() + ".tag_accesses")
195        .desc("Number of tag accesses")
196        ;
197
198    dataAccesses
199        .name(name() + ".data_accesses")
200        .desc("Number of data accesses")
201        ;
202
203    registerDumpCallback(new BaseTagsDumpCallback(this));
204    registerExitCallback(new BaseTagsCallback(this));
205}
206