base.cc revision 10024
12810SN/A/*
29796Sprakash.ramrakhyani@arm.com * Copyright (c) 2013 ARM Limited
39796Sprakash.ramrakhyani@arm.com * All rights reserved.
49796Sprakash.ramrakhyani@arm.com *
59796Sprakash.ramrakhyani@arm.com * The license below extends only to copyright in the software and shall
69796Sprakash.ramrakhyani@arm.com * not be construed as granting a license to any other intellectual
79796Sprakash.ramrakhyani@arm.com * property including but not limited to intellectual property relating
89796Sprakash.ramrakhyani@arm.com * to a hardware implementation of the functionality of the software
99796Sprakash.ramrakhyani@arm.com * licensed hereunder.  You may use the software subject to the license
109796Sprakash.ramrakhyani@arm.com * terms below provided that you ensure that this notice is replicated
119796Sprakash.ramrakhyani@arm.com * unmodified and in its entirety in all distributions of the software,
129796Sprakash.ramrakhyani@arm.com * modified or unmodified, in source code or in binary form.
139796Sprakash.ramrakhyani@arm.com *
142810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
152810SN/A * All rights reserved.
162810SN/A *
172810SN/A * Redistribution and use in source and binary forms, with or without
182810SN/A * modification, are permitted provided that the following conditions are
192810SN/A * met: redistributions of source code must retain the above copyright
202810SN/A * notice, this list of conditions and the following disclaimer;
212810SN/A * redistributions in binary form must reproduce the above copyright
222810SN/A * notice, this list of conditions and the following disclaimer in the
232810SN/A * documentation and/or other materials provided with the distribution;
242810SN/A * neither the name of the copyright holders nor the names of its
252810SN/A * contributors may be used to endorse or promote products derived from
262810SN/A * this software without specific prior written permission.
272810SN/A *
282810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
292810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
302810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
312810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
322810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
332810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
342810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
352810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
362810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
372810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
382810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
392810SN/A *
402810SN/A * Authors: Erik Hallnor
412810SN/A *          Ron Dreslinski
422810SN/A */
432810SN/A
442810SN/A/**
452810SN/A * @file
462810SN/A * Definitions of BaseTags.
472810SN/A */
482810SN/A
499850Sandreas.hansson@arm.com#include "config/the_isa.hh"
508229Snate@binkert.org#include "cpu/smt.hh" //maxThreadsPerCPU
515338Sstever@gmail.com#include "mem/cache/tags/base.hh"
525338Sstever@gmail.com#include "mem/cache/base.hh"
532810SN/A#include "sim/sim_exit.hh"
542810SN/A
552810SN/Ausing namespace std;
562810SN/A
579796Sprakash.ramrakhyani@arm.comBaseTags::BaseTags(const Params *p)
589796Sprakash.ramrakhyani@arm.com    : ClockedObject(p), blkSize(p->block_size), size(p->size),
599796Sprakash.ramrakhyani@arm.com      hitLatency(p->hit_latency)
609796Sprakash.ramrakhyani@arm.com{
619796Sprakash.ramrakhyani@arm.com}
629796Sprakash.ramrakhyani@arm.com
632810SN/Avoid
642810SN/ABaseTags::setCache(BaseCache *_cache)
652810SN/A{
662810SN/A    cache = _cache;
672810SN/A}
682810SN/A
692810SN/Avoid
709796Sprakash.ramrakhyani@arm.comBaseTags::regStats()
712810SN/A{
722810SN/A    using namespace Stats;
732810SN/A    replacements
742810SN/A        .init(maxThreadsPerCPU)
759796Sprakash.ramrakhyani@arm.com        .name(name() + ".replacements")
762810SN/A        .desc("number of replacements")
772810SN/A        .flags(total)
782810SN/A        ;
792810SN/A
802810SN/A    tagsInUse
819796Sprakash.ramrakhyani@arm.com        .name(name() + ".tagsinuse")
822810SN/A        .desc("Cycle average of tags in use")
832810SN/A        ;
842810SN/A
852810SN/A    totalRefs
869796Sprakash.ramrakhyani@arm.com        .name(name() + ".total_refs")
872810SN/A        .desc("Total number of references to valid blocks.")
882810SN/A        ;
892810SN/A
902810SN/A    sampledRefs
919796Sprakash.ramrakhyani@arm.com        .name(name() + ".sampled_refs")
922810SN/A        .desc("Sample count of references to valid blocks.")
932810SN/A        ;
942810SN/A
952810SN/A    avgRefs
969796Sprakash.ramrakhyani@arm.com        .name(name() + ".avg_refs")
972810SN/A        .desc("Average number of references to valid blocks.")
982810SN/A        ;
992810SN/A
1002810SN/A    avgRefs = totalRefs/sampledRefs;
1012810SN/A
1022810SN/A    warmupCycle
1039796Sprakash.ramrakhyani@arm.com        .name(name() + ".warmup_cycle")
1042810SN/A        .desc("Cycle when the warmup percentage was hit.")
1052810SN/A        ;
1062810SN/A
1076978SLisa.Hsu@amd.com    occupancies
1088833Sdam.sunwoo@arm.com        .init(cache->system->maxMasters())
1099796Sprakash.ramrakhyani@arm.com        .name(name() + ".occ_blocks")
1108833Sdam.sunwoo@arm.com        .desc("Average occupied blocks per requestor")
1116978SLisa.Hsu@amd.com        .flags(nozero | nonan)
1126978SLisa.Hsu@amd.com        ;
1138833Sdam.sunwoo@arm.com    for (int i = 0; i < cache->system->maxMasters(); i++) {
1148833Sdam.sunwoo@arm.com        occupancies.subname(i, cache->system->getMasterName(i));
1158833Sdam.sunwoo@arm.com    }
1166978SLisa.Hsu@amd.com
1176978SLisa.Hsu@amd.com    avgOccs
1189796Sprakash.ramrakhyani@arm.com        .name(name() + ".occ_percent")
1196978SLisa.Hsu@amd.com        .desc("Average percentage of cache occupancy")
1208833Sdam.sunwoo@arm.com        .flags(nozero | total)
1216978SLisa.Hsu@amd.com        ;
1228833Sdam.sunwoo@arm.com    for (int i = 0; i < cache->system->maxMasters(); i++) {
1238833Sdam.sunwoo@arm.com        avgOccs.subname(i, cache->system->getMasterName(i));
1248833Sdam.sunwoo@arm.com    }
1256978SLisa.Hsu@amd.com
1266978SLisa.Hsu@amd.com    avgOccs = occupancies / Stats::constant(numBlocks);
1276978SLisa.Hsu@amd.com
12810024Sdam.sunwoo@arm.com    occupanciesTaskId
12910024Sdam.sunwoo@arm.com        .init(ContextSwitchTaskId::NumTaskId)
13010024Sdam.sunwoo@arm.com        .name(name() + ".occ_task_id_blocks")
13110024Sdam.sunwoo@arm.com        .desc("Occupied blocks per task id")
13210024Sdam.sunwoo@arm.com        .flags(nozero | nonan)
13310024Sdam.sunwoo@arm.com        ;
13410024Sdam.sunwoo@arm.com
13510024Sdam.sunwoo@arm.com    ageTaskId
13610024Sdam.sunwoo@arm.com        .init(ContextSwitchTaskId::NumTaskId, 5)
13710024Sdam.sunwoo@arm.com        .name(name() + ".age_task_id_blocks")
13810024Sdam.sunwoo@arm.com        .desc("Occupied blocks per task id")
13910024Sdam.sunwoo@arm.com        .flags(nozero | nonan)
14010024Sdam.sunwoo@arm.com        ;
14110024Sdam.sunwoo@arm.com
14210024Sdam.sunwoo@arm.com    percentOccsTaskId
14310024Sdam.sunwoo@arm.com        .name(name() + ".occ_task_id_percent")
14410024Sdam.sunwoo@arm.com        .desc("Percentage of cache occupancy per task id")
14510024Sdam.sunwoo@arm.com        .flags(nozero)
14610024Sdam.sunwoo@arm.com        ;
14710024Sdam.sunwoo@arm.com
14810024Sdam.sunwoo@arm.com    percentOccsTaskId = occupanciesTaskId / Stats::constant(numBlocks);
14910024Sdam.sunwoo@arm.com
15010024Sdam.sunwoo@arm.com    registerDumpCallback(new BaseTagsDumpCallback(this));
1512810SN/A    registerExitCallback(new BaseTagsCallback(this));
1522810SN/A}
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