Tags.py revision 12513:4dfc54394b5a 
1# Copyright (c) 2012-2013 ARM Limited
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36# Authors: Prakash Ramrakhyani
37
38from m5.params import *
39from m5.proxy import *
40from ClockedObject import ClockedObject
41
42class BaseTags(ClockedObject):
43    type = 'BaseTags'
44    abstract = True
45    cxx_header = "mem/cache/tags/base.hh"
46    # Get the size from the parent (cache)
47    size = Param.MemorySize(Parent.size, "capacity in bytes")
48
49    # Get the block size from the parent (system)
50    block_size = Param.Int(Parent.cache_line_size, "block size in bytes")
51
52    # Get the tag lookup latency from the parent (cache)
53    tag_latency = Param.Cycles(Parent.tag_latency,
54                               "The tag lookup latency for this cache")
55
56    # Get the RAM access latency from the parent (cache)
57    data_latency = Param.Cycles(Parent.data_latency,
58                               "The data access latency for this cache")
59
60    # Get the warmup percentage from the parent (cache)
61    warmup_percentage = Param.Percent(Parent.warmup_percentage,
62        "Percentage of tags to be touched to warm up the cache")
63
64    sequential_access = Param.Bool(Parent.sequential_access,
65        "Whether to access tags and data sequentially")
66
67class BaseSetAssoc(BaseTags):
68    type = 'BaseSetAssoc'
69    abstract = True
70    cxx_header = "mem/cache/tags/base_set_assoc.hh"
71    assoc = Param.Int(Parent.assoc, "associativity")
72
73class LRU(BaseSetAssoc):
74    type = 'LRU'
75    cxx_class = 'LRU'
76    cxx_header = "mem/cache/tags/lru.hh"
77
78class RandomRepl(BaseSetAssoc):
79    type = 'RandomRepl'
80    cxx_class = 'RandomRepl'
81    cxx_header = "mem/cache/tags/random_repl.hh"
82
83class FALRU(BaseTags):
84    type = 'FALRU'
85    cxx_class = 'FALRU'
86    cxx_header = "mem/cache/tags/fa_lru.hh"
87