mshr_queue.hh revision 4626
12810SN/A/*
29725Sandreas.hansson@arm.com * Copyright (c) 2003-2005 The Regents of The University of Michigan
39347SAndreas.Sandberg@arm.com * All rights reserved.
49347SAndreas.Sandberg@arm.com *
59347SAndreas.Sandberg@arm.com * Redistribution and use in source and binary forms, with or without
69347SAndreas.Sandberg@arm.com * modification, are permitted provided that the following conditions are
79347SAndreas.Sandberg@arm.com * met: redistributions of source code must retain the above copyright
89347SAndreas.Sandberg@arm.com * notice, this list of conditions and the following disclaimer;
99347SAndreas.Sandberg@arm.com * redistributions in binary form must reproduce the above copyright
109347SAndreas.Sandberg@arm.com * notice, this list of conditions and the following disclaimer in the
119347SAndreas.Sandberg@arm.com * documentation and/or other materials provided with the distribution;
129347SAndreas.Sandberg@arm.com * neither the name of the copyright holders nor the names of its
139347SAndreas.Sandberg@arm.com * contributors may be used to endorse or promote products derived from
142810SN/A * this software without specific prior written permission.
152810SN/A *
162810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272810SN/A *
282810SN/A * Authors: Erik Hallnor
292810SN/A */
302810SN/A
312810SN/A/** @file
322810SN/A * Declaration of a structure to manage MSHRs.
332810SN/A */
342810SN/A
352810SN/A#ifndef __MEM__CACHE__MISS__MSHR_QUEUE_HH__
362810SN/A#define __MEM__CACHE__MISS__MSHR_QUEUE_HH__
372810SN/A
382810SN/A#include <vector>
392810SN/A
402810SN/A#include "mem/packet.hh"
419347SAndreas.Sandberg@arm.com#include "mem/cache/miss/mshr.hh"
422810SN/A
432810SN/A/**
442810SN/A * A Class for maintaining a list of pending and allocated memory requests.
452810SN/A */
462810SN/Aclass MSHRQueue
472810SN/A{
484626SN/A  private:
494626SN/A    /**  MSHR storage. */
502810SN/A    MSHR *registers;
512810SN/A    /** Holds pointers to all allocated entries. */
524626SN/A    MSHR::List allocatedList;
538229Snate@binkert.org    /** Holds pointers to entries that haven't been sent to the bus. */
544626SN/A    MSHR::List pendingList;
559347SAndreas.Sandberg@arm.com    /** Holds non allocated entries. */
562810SN/A    MSHR::List freeList;
572810SN/A
583374SN/A    // Parameters
592810SN/A    /**
609347SAndreas.Sandberg@arm.com     * The total number of entries in this queue. This number is set as the
614626SN/A     * number of entries requested plus (numReserve - 1). This allows for
622810SN/A     * the same number of effective entries while still maintaining the reserve.
635314SN/A     */
645314SN/A    const int numEntries;
655314SN/A
662810SN/A    /**
672810SN/A     * The number of entries to hold in reserve. This is needed because copy
684626SN/A     * operations can allocate upto 4 entries at one time.
694626SN/A     */
704626SN/A    const int numReserve;
712810SN/A
724626SN/A  public:
732810SN/A    /** The number of allocated entries. */
742810SN/A    int allocated;
754626SN/A    /** The number of entries that have been forwarded to the bus. */
764626SN/A    int inServiceEntries;
772810SN/A
782810SN/A    /**
792810SN/A     * Create a queue with a given number of entries.
8010622Smitch.hayenga@arm.com     * @param num_entrys The number of entries in this queue.
8110622Smitch.hayenga@arm.com     * @param reserve The minimum number of entries needed to satisfy
8210622Smitch.hayenga@arm.com     * any access.
8310622Smitch.hayenga@arm.com     */
8410622Smitch.hayenga@arm.com    MSHRQueue(int num_entries, int reserve = 1);
8510622Smitch.hayenga@arm.com
869725Sandreas.hansson@arm.com    /** Destructor */
879725Sandreas.hansson@arm.com    ~MSHRQueue();
889725Sandreas.hansson@arm.com
899725Sandreas.hansson@arm.com    /**
909725Sandreas.hansson@arm.com     * Find the first MSHR that matches the provided address.
919725Sandreas.hansson@arm.com     * @param addr The address to find.
929725Sandreas.hansson@arm.com     * @return Pointer to the matching MSHR, null if not found.
939725Sandreas.hansson@arm.com     */
949725Sandreas.hansson@arm.com    MSHR *findMatch(Addr addr) const;
959347SAndreas.Sandberg@arm.com
969347SAndreas.Sandberg@arm.com    /**
979347SAndreas.Sandberg@arm.com     * Find and return all the matching entries in the provided vector.
984666SN/A     * @param addr The address to find.
994666SN/A     * @param matches The vector to return pointers to the matching entries.
1004666SN/A     * @return True if any matches are found, false otherwise.
1012810SN/A     * @todo Typedef the vector??
1024626SN/A     */
1032810SN/A    bool findMatches(Addr addr, std::vector<MSHR*>& matches) const;
1044626SN/A
1054626SN/A    /**
1064628SN/A     * Find any pending requests that overlap the given request.
1074628SN/A     * @param pkt The request to find.
1084628SN/A     * @return A pointer to the earliest matching MSHR.
1092810SN/A     */
1102810SN/A    MSHR *findPending(Addr addr, int size) const;
1114626SN/A
1124626SN/A    /**
1134626SN/A     * Allocates a new MSHR for the request and size. This places the request
1144626SN/A     * as the first target in the MSHR.
11510622Smitch.hayenga@arm.com     * @param pkt The request to handle.
11610622Smitch.hayenga@arm.com     * @param size The number in bytes to fetch from memory.
1172810SN/A     * @return The a pointer to the MSHR allocated.
1185314SN/A     *
11910622Smitch.hayenga@arm.com     * @pre There are free entries.
1202810SN/A     */
1212810SN/A    MSHR *allocate(Addr addr, int size, PacketPtr &pkt, bool isFill);
1224626SN/A
1232810SN/A    /**
12410028SGiacomo.Gabrielli@arm.com     * Removes the given MSHR from the queue. This places the MSHR on the
1252810SN/A     * free list.
1262810SN/A     * @param mshr
12710028SGiacomo.Gabrielli@arm.com     */
1282810SN/A    void deallocate(MSHR *mshr);
1292810SN/A
1304626SN/A    /**
1312810SN/A     * Remove a MSHR from the queue. Returns an iterator into the
13210028SGiacomo.Gabrielli@arm.com     * allocatedList for faster squash implementation.
1334626SN/A     * @param mshr The MSHR to remove.
1342810SN/A     * @return An iterator to the next entry in the allocatedList.
1352810SN/A     */
1362810SN/A    MSHR::Iterator deallocateOne(MSHR *mshr);
13710028SGiacomo.Gabrielli@arm.com
13810028SGiacomo.Gabrielli@arm.com    /**
1392810SN/A     * Moves the MSHR to the front of the pending list if it is not
1402810SN/A     * in service.
1413374SN/A     * @param mshr The entry to move.
1422982SN/A     */
14310028SGiacomo.Gabrielli@arm.com    void moveToFront(MSHR *mshr);
1442810SN/A
1452810SN/A    /**
14610028SGiacomo.Gabrielli@arm.com     * Mark the given MSHR as in service. This removes the MSHR from the
1472810SN/A     * pendingList. Deallocates the MSHR if it does not expect a response.
1484920SN/A     * @param mshr The MSHR to mark in service.
1494920SN/A     */
1502810SN/A    void markInService(MSHR *mshr);
1513374SN/A
1522810SN/A    /**
1532982SN/A     * Mark an in service entry as pending, used to resend a request.
1542810SN/A     * @param mshr The MSHR to resend.
1552810SN/A     */
1562810SN/A    void markPending(MSHR *mshr);
1574626SN/A
1582810SN/A    /**
1594666SN/A     * Squash outstanding requests with the given thread number. If a request
1604666SN/A     * is in service, just squashes the targets.
1612810SN/A     * @param threadNum The thread to squash.
1622810SN/A     */
1632810SN/A    void squash(int threadNum);
1642810SN/A
1652810SN/A    /**
1662810SN/A     * Returns true if the pending list is not empty.
1674626SN/A     * @return True if there are outstanding requests.
1682810SN/A     */
1692810SN/A    bool havePending() const
1704626SN/A    {
1714626SN/A        return !pendingList.empty();
1722810SN/A    }
1732810SN/A
1742810SN/A    /**
1754626SN/A     * Returns true if there are no free entries.
1762810SN/A     * @return True if this queue is full.
1772810SN/A     */
1784626SN/A    bool isFull() const
1794626SN/A    {
1804626SN/A        return (allocated > numEntries - numReserve);
1812810SN/A    }
1822810SN/A
1832810SN/A    /**
1842810SN/A     * Returns the MSHR at the head of the pendingList.
1852810SN/A     * @return The next request to service.
18610679Sandreas.hansson@arm.com     */
18710679Sandreas.hansson@arm.com    MSHR *getNextMSHR() const
1882810SN/A    {
18910679Sandreas.hansson@arm.com        if (pendingList.empty()) {
19010679Sandreas.hansson@arm.com            return NULL;
1912810SN/A        }
19210679Sandreas.hansson@arm.com        return pendingList.front();
1932810SN/A    }
1942810SN/A};
1954626SN/A
1962810SN/A#endif //__MEM__CACHE__MISS__MSHR_QUEUE_HH__
1972810SN/A