mshr_queue.hh revision 10028
12810SN/A/*
29725Sandreas.hansson@arm.com * Copyright (c) 2012-2013 ARM Limited
39347SAndreas.Sandberg@arm.com * All rights reserved.
49347SAndreas.Sandberg@arm.com *
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129347SAndreas.Sandberg@arm.com * modified or unmodified, in source code or in binary form.
139347SAndreas.Sandberg@arm.com *
142810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
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162810SN/A *
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182810SN/A * modification, are permitted provided that the following conditions are
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202810SN/A * notice, this list of conditions and the following disclaimer;
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272810SN/A *
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392810SN/A *
402810SN/A * Authors: Erik Hallnor
419347SAndreas.Sandberg@arm.com *          Andreas Sandberg
422810SN/A */
432810SN/A
442810SN/A/** @file
452810SN/A * Declaration of a structure to manage MSHRs.
462810SN/A */
472810SN/A
484626SN/A#ifndef __MEM__CACHE__MISS__MSHR_QUEUE_HH__
494626SN/A#define __MEM__CACHE__MISS__MSHR_QUEUE_HH__
502810SN/A
512810SN/A#include <vector>
524626SN/A
538229Snate@binkert.org#include "mem/cache/mshr.hh"
544626SN/A#include "mem/packet.hh"
559347SAndreas.Sandberg@arm.com#include "sim/drain.hh"
562810SN/A
572810SN/A/**
583374SN/A * A Class for maintaining a list of pending and allocated memory requests.
592810SN/A */
609347SAndreas.Sandberg@arm.comclass MSHRQueue : public Drainable
614626SN/A{
622810SN/A  private:
635314SN/A    /** Local label (for functional print requests) */
645314SN/A    const std::string label;
655314SN/A
662810SN/A    // Parameters
672810SN/A    /**
684626SN/A     * The total number of entries in this queue. This number is set as the
694626SN/A     * number of entries requested plus (numReserve - 1). This allows for
704626SN/A     * the same number of effective entries while still maintaining the reserve.
712810SN/A     */
724626SN/A    const int numEntries;
732810SN/A
742810SN/A    /**
754626SN/A     * The number of entries to hold in reserve. This is needed because copy
764626SN/A     * operations can allocate upto 4 entries at one time.
772810SN/A     */
782810SN/A    const int numReserve;
792810SN/A
809725Sandreas.hansson@arm.com    /**  MSHR storage. */
819725Sandreas.hansson@arm.com    std::vector<MSHR> registers;
829725Sandreas.hansson@arm.com    /** Holds pointers to all allocated entries. */
839725Sandreas.hansson@arm.com    MSHR::List allocatedList;
849725Sandreas.hansson@arm.com    /** Holds pointers to entries that haven't been sent to the bus. */
859725Sandreas.hansson@arm.com    MSHR::List readyList;
869725Sandreas.hansson@arm.com    /** Holds non allocated entries. */
879725Sandreas.hansson@arm.com    MSHR::List freeList;
889725Sandreas.hansson@arm.com
899347SAndreas.Sandberg@arm.com    /** Drain manager to inform of a completed drain */
909347SAndreas.Sandberg@arm.com    DrainManager *drainManager;
919347SAndreas.Sandberg@arm.com
924666SN/A    MSHR::Iterator addToReadyList(MSHR *mshr);
934666SN/A
944666SN/A
952810SN/A  public:
964626SN/A    /** The number of allocated entries. */
972810SN/A    int allocated;
984626SN/A    /** The number of entries that have been forwarded to the bus. */
994626SN/A    int inServiceEntries;
1004628SN/A    /** The index of this queue within the cache (MSHR queue vs. write
1014628SN/A     * buffer). */
1024628SN/A    const int index;
1032810SN/A
1042810SN/A    /**
1054626SN/A     * Create a queue with a given number of entries.
1064626SN/A     * @param num_entrys The number of entries in this queue.
1074626SN/A     * @param reserve The minimum number of entries needed to satisfy
1084626SN/A     * any access.
1092810SN/A     */
1105314SN/A    MSHRQueue(const std::string &_label, int num_entries, int reserve,
1115314SN/A              int index);
1122810SN/A
1132810SN/A    /**
1144626SN/A     * Find the first MSHR that matches the provided address.
1152810SN/A     * @param addr The address to find.
11610028SGiacomo.Gabrielli@arm.com     * @param is_secure True if the target memory space is secure.
1172810SN/A     * @return Pointer to the matching MSHR, null if not found.
1182810SN/A     */
11910028SGiacomo.Gabrielli@arm.com    MSHR *findMatch(Addr addr, bool is_secure) const;
1202810SN/A
1212810SN/A    /**
1224626SN/A     * Find and return all the matching entries in the provided vector.
1232810SN/A     * @param addr The address to find.
12410028SGiacomo.Gabrielli@arm.com     * @param is_secure True if the target memory space is secure.
1254626SN/A     * @param matches The vector to return pointers to the matching entries.
1262810SN/A     * @return True if any matches are found, false otherwise.
1272810SN/A     * @todo Typedef the vector??
1282810SN/A     */
12910028SGiacomo.Gabrielli@arm.com    bool findMatches(Addr addr, bool is_secure,
13010028SGiacomo.Gabrielli@arm.com                     std::vector<MSHR*>& matches) const;
1312810SN/A
1322810SN/A    /**
1333374SN/A     * Find any pending requests that overlap the given request.
1342982SN/A     * @param pkt The request to find.
13510028SGiacomo.Gabrielli@arm.com     * @param is_secure True if the target memory space is secure.
1362810SN/A     * @return A pointer to the earliest matching MSHR.
1372810SN/A     */
13810028SGiacomo.Gabrielli@arm.com    MSHR *findPending(Addr addr, int size, bool is_secure) const;
1392810SN/A
1404920SN/A    bool checkFunctional(PacketPtr pkt, Addr blk_addr);
1414920SN/A
1422810SN/A    /**
1433374SN/A     * Allocates a new MSHR for the request and size. This places the request
1442810SN/A     * as the first target in the MSHR.
1452982SN/A     * @param pkt The request to handle.
1462810SN/A     * @param size The number in bytes to fetch from memory.
1472810SN/A     * @return The a pointer to the MSHR allocated.
1482810SN/A     *
1494626SN/A     * @pre There are free entries.
1502810SN/A     */
1514666SN/A    MSHR *allocate(Addr addr, int size, PacketPtr &pkt,
1524666SN/A                   Tick when, Counter order);
1532810SN/A
1542810SN/A    /**
1552810SN/A     * Removes the given MSHR from the queue. This places the MSHR on the
1562810SN/A     * free list.
1572810SN/A     * @param mshr
1582810SN/A     */
1594626SN/A    void deallocate(MSHR *mshr);
1602810SN/A
1612810SN/A    /**
1624626SN/A     * Remove a MSHR from the queue. Returns an iterator into the
1634626SN/A     * allocatedList for faster squash implementation.
1642810SN/A     * @param mshr The MSHR to remove.
1652810SN/A     * @return An iterator to the next entry in the allocatedList.
1662810SN/A     */
1674626SN/A    MSHR::Iterator deallocateOne(MSHR *mshr);
1682810SN/A
1692810SN/A    /**
1704626SN/A     * Moves the MSHR to the front of the pending list if it is not
1714626SN/A     * in service.
1724626SN/A     * @param mshr The entry to move.
1732810SN/A     */
1742810SN/A    void moveToFront(MSHR *mshr);
1752810SN/A
1762810SN/A    /**
1772810SN/A     * Mark the given MSHR as in service. This removes the MSHR from the
1784666SN/A     * readyList. Deallocates the MSHR if it does not expect a response.
1792810SN/A     * @param mshr The MSHR to mark in service.
1802810SN/A     */
1817667Ssteve.reinhardt@amd.com    void markInService(MSHR *mshr, PacketPtr pkt);
1822810SN/A
1832810SN/A    /**
1844626SN/A     * Mark an in service entry as pending, used to resend a request.
1852810SN/A     * @param mshr The MSHR to resend.
1862810SN/A     */
1874626SN/A    void markPending(MSHR *mshr);
1882810SN/A
1892810SN/A    /**
1903374SN/A     * Squash outstanding requests with the given thread number. If a request
1912810SN/A     * is in service, just squashes the targets.
1922982SN/A     * @param threadNum The thread to squash.
1932810SN/A     */
1942812SN/A    void squash(int threadNum);
1952810SN/A
1962810SN/A    /**
1972810SN/A     * Returns true if the pending list is not empty.
1983374SN/A     * @return True if there are outstanding requests.
1992810SN/A     */
2002810SN/A    bool havePending() const
2012810SN/A    {
2024666SN/A        return !readyList.empty();
2032810SN/A    }
2042810SN/A
2052810SN/A    /**
2064626SN/A     * Returns true if there are no free entries.
2072810SN/A     * @return True if this queue is full.
2082810SN/A     */
2092810SN/A    bool isFull() const
2102810SN/A    {
2114626SN/A        return (allocated > numEntries - numReserve);
2122810SN/A    }
2132810SN/A
2142810SN/A    /**
2154666SN/A     * Returns the MSHR at the head of the readyList.
2163374SN/A     * @return The next request to service.
2172810SN/A     */
2184626SN/A    MSHR *getNextMSHR() const
2192810SN/A    {
2207823Ssteve.reinhardt@amd.com        if (readyList.empty() || readyList.front()->readyTime > curTick()) {
2212810SN/A            return NULL;
2222810SN/A        }
2234666SN/A        return readyList.front();
2244666SN/A    }
2254666SN/A
2264871SN/A    Tick nextMSHRReadyTime() const
2274666SN/A    {
2284871SN/A        return readyList.empty() ? MaxTick : readyList.front()->readyTime;
2292810SN/A    }
2309347SAndreas.Sandberg@arm.com
2319347SAndreas.Sandberg@arm.com    unsigned int drain(DrainManager *dm);
2322810SN/A};
2332810SN/A
2344626SN/A#endif //__MEM__CACHE__MISS__MSHR_QUEUE_HH__
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