mshr_queue.cc revision 12727
15390SN/A/* 25445SN/A * Copyright (c) 2012-2013, 2015-2016 ARM Limited 35390SN/A * All rights reserved. 45390SN/A * 55390SN/A * The license below extends only to copyright in the software and shall 65390SN/A * not be construed as granting a license to any other intellectual 75390SN/A * property including but not limited to intellectual property relating 85390SN/A * to a hardware implementation of the functionality of the software 95390SN/A * licensed hereunder. You may use the software subject to the license 105390SN/A * terms below provided that you ensure that this notice is replicated 115390SN/A * unmodified and in its entirety in all distributions of the software, 125390SN/A * modified or unmodified, in source code or in binary form. 135390SN/A * 145390SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan 155390SN/A * All rights reserved. 165390SN/A * 175390SN/A * Redistribution and use in source and binary forms, with or without 185390SN/A * modification, are permitted provided that the following conditions are 195390SN/A * met: redistributions of source code must retain the above copyright 205390SN/A * notice, this list of conditions and the following disclaimer; 215390SN/A * redistributions in binary form must reproduce the above copyright 225390SN/A * notice, this list of conditions and the following disclaimer in the 235390SN/A * documentation and/or other materials provided with the distribution; 245390SN/A * neither the name of the copyright holders nor the names of its 255390SN/A * contributors may be used to endorse or promote products derived from 265390SN/A * this software without specific prior written permission. 275390SN/A * 285390SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 295390SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 305390SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3111793Sbrandon.potter@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3211793Sbrandon.potter@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 335390SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 345445SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 358232Snate@binkert.org * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 365636Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 375636Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 385390SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 395390SN/A * 405390SN/A * Authors: Erik Hallnor 415390SN/A * Andreas Sandberg 425390SN/A */ 435636Sgblack@eecs.umich.edu 445390SN/A/** @file 455636Sgblack@eecs.umich.edu * Definition of MSHRQueue class functions. 465636Sgblack@eecs.umich.edu */ 475445SN/A 485445SN/A#include "mem/cache/mshr_queue.hh" 495445SN/A 505445SN/A#include <cassert> 5113229Sgabeblack@google.com 525898Sgblack@eecs.umich.edu#include "mem/cache/mshr.hh" 535390SN/A 545390SN/AMSHRQueue::MSHRQueue(const std::string &_label, 555390SN/A int num_entries, int reserve, int demand_reserve) 565390SN/A : Queue<MSHR>(_label, num_entries, reserve), 575390SN/A demandReserve(demand_reserve) 585390SN/A{} 595636Sgblack@eecs.umich.edu 605390SN/AMSHR * 6113229Sgabeblack@google.comMSHRQueue::allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt, 625445SN/A Tick when_ready, Counter order, bool alloc_on_fill) 635445SN/A{ 645445SN/A assert(!freeList.empty()); 655445SN/A MSHR *mshr = freeList.front(); 665445SN/A assert(mshr->getNumTargets() == 0); 675445SN/A freeList.pop_front(); 685445SN/A 695445SN/A mshr->allocate(blk_addr, blk_size, pkt, when_ready, order, alloc_on_fill); 705445SN/A mshr->allocIter = allocatedList.insert(allocatedList.end(), mshr); 715636Sgblack@eecs.umich.edu mshr->readyIter = addToReadyList(mshr); 725445SN/A 735898Sgblack@eecs.umich.edu allocated += 1; 745390SN/A return mshr; 755390SN/A} 765636Sgblack@eecs.umich.edu 777903Shestness@cs.utexas.eduvoid 7810905Sandreas.sandberg@arm.comMSHRQueue::moveToFront(MSHR *mshr) 797903Shestness@cs.utexas.edu{ 8012450Sgabeblack@google.com if (!mshr->inService) { 817903Shestness@cs.utexas.edu assert(mshr == *(mshr->readyIter)); 827903Shestness@cs.utexas.edu readyList.erase(mshr->readyIter); 837903Shestness@cs.utexas.edu mshr->readyIter = readyList.insert(readyList.begin(), mshr); 8410905Sandreas.sandberg@arm.com } 857903Shestness@cs.utexas.edu} 8612450Sgabeblack@google.com 877903Shestness@cs.utexas.eduvoid 887903Shestness@cs.utexas.eduMSHRQueue::markInService(MSHR *mshr, bool pending_modified_resp) 895636Sgblack@eecs.umich.edu{ 905636Sgblack@eecs.umich.edu mshr->markInService(pending_modified_resp); 915636Sgblack@eecs.umich.edu readyList.erase(mshr->readyIter); 925636Sgblack@eecs.umich.edu _numInService += 1; 935636Sgblack@eecs.umich.edu} 94 95void 96MSHRQueue::markPending(MSHR *mshr) 97{ 98 assert(mshr->inService); 99 mshr->inService = false; 100 --_numInService; 101 /** 102 * @ todo might want to add rerequests to front of pending list for 103 * performance. 104 */ 105 mshr->readyIter = addToReadyList(mshr); 106} 107 108bool 109MSHRQueue::forceDeallocateTarget(MSHR *mshr) 110{ 111 bool was_full = isFull(); 112 assert(mshr->hasTargets()); 113 // Pop the prefetch off of the target list 114 mshr->popTarget(); 115 // Delete mshr if no remaining targets 116 if (!mshr->hasTargets() && !mshr->promoteDeferredTargets()) { 117 deallocate(mshr); 118 } 119 120 // Notify if MSHR queue no longer full 121 return was_full && !isFull(); 122} 123