mshr.hh revision 7667:aa8fd8f6a495
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Erik Hallnor 29 */ 30 31/** 32 * @file 33 * Miss Status and Handling Register (MSHR) declaration. 34 */ 35 36#ifndef __MSHR_HH__ 37#define __MSHR_HH__ 38 39#include <list> 40 41#include "base/printable.hh" 42#include "mem/packet.hh" 43 44class CacheBlk; 45class MSHRQueue; 46 47/** 48 * Miss Status and handling Register. This class keeps all the information 49 * needed to handle a cache miss including a list of target requests. 50 */ 51class MSHR : public Packet::SenderState, public Printable 52{ 53 54 public: 55 56 class Target { 57 public: 58 59 enum Source { 60 FromCPU, 61 FromSnoop, 62 FromPrefetcher 63 }; 64 65 Tick recvTime; //!< Time when request was received (for stats) 66 Tick readyTime; //!< Time when request is ready to be serviced 67 Counter order; //!< Global order (for memory consistency mgmt) 68 PacketPtr pkt; //!< Pending request packet. 69 Source source; //!< Did request come from cpu, memory, or prefetcher? 70 bool markedPending; //!< Did we mark upstream MSHR 71 //!< as downstreamPending? 72 73 Target(PacketPtr _pkt, Tick _readyTime, Counter _order, 74 Source _source, bool _markedPending) 75 : recvTime(curTick), readyTime(_readyTime), order(_order), 76 pkt(_pkt), source(_source), markedPending(_markedPending) 77 {} 78 }; 79 80 class TargetList : public std::list<Target> { 81 /** Target list iterator. */ 82 typedef std::list<Target>::iterator Iterator; 83 typedef std::list<Target>::const_iterator ConstIterator; 84 85 public: 86 bool needsExclusive; 87 bool hasUpgrade; 88 89 TargetList(); 90 void resetFlags() { needsExclusive = hasUpgrade = false; } 91 bool isReset() { return !needsExclusive && !hasUpgrade; } 92 void add(PacketPtr pkt, Tick readyTime, Counter order, 93 Target::Source source, bool markPending); 94 void replaceUpgrades(); 95 void clearDownstreamPending(); 96 bool checkFunctional(PacketPtr pkt); 97 void print(std::ostream &os, int verbosity, 98 const std::string &prefix) const; 99 }; 100 101 /** A list of MSHRs. */ 102 typedef std::list<MSHR *> List; 103 /** MSHR list iterator. */ 104 typedef List::iterator Iterator; 105 /** MSHR list const_iterator. */ 106 typedef List::const_iterator ConstIterator; 107 108 /** Pointer to queue containing this MSHR. */ 109 MSHRQueue *queue; 110 111 /** Cycle when ready to issue */ 112 Tick readyTime; 113 114 /** Order number assigned by the miss queue. */ 115 Counter order; 116 117 /** Address of the request. */ 118 Addr addr; 119 120 /** Size of the request. */ 121 int size; 122 123 /** True if the request has been sent to the bus. */ 124 bool inService; 125 126 /** True if the request is just a simple forward from an upper level */ 127 bool isForward; 128 129 /** True if we need to get an exclusive copy of the block. */ 130 bool needsExclusive() const { return targets->needsExclusive; } 131 132 /** True if the request is uncacheable */ 133 bool _isUncacheable; 134 135 bool downstreamPending; 136 137 /** The pending* and post* flags are only valid if inService is 138 * true. Using the accessor functions lets us detect if these 139 * flags are accessed improperly. 140 */ 141 142 /** Will we have a dirty copy after this request? */ 143 bool pendingDirty; 144 bool isPendingDirty() const { 145 assert(inService); return pendingDirty; 146 } 147 148 /** Did we snoop an invalidate while waiting for data? */ 149 bool postInvalidate; 150 bool hasPostInvalidate() const { 151 assert(inService); return postInvalidate; 152 } 153 154 /** Did we snoop a read while waiting for data? */ 155 bool postDowngrade; 156 bool hasPostDowngrade() const { 157 assert(inService); return postDowngrade; 158 } 159 160 /** Thread number of the miss. */ 161 ThreadID threadNum; 162 /** The number of currently allocated targets. */ 163 unsigned short ntargets; 164 165 166 /** Data buffer (if needed). Currently used only for pending 167 * upgrade handling. */ 168 uint8_t *data; 169 170 /** 171 * Pointer to this MSHR on the ready list. 172 * @sa MissQueue, MSHRQueue::readyList 173 */ 174 Iterator readyIter; 175 176 /** 177 * Pointer to this MSHR on the allocated list. 178 * @sa MissQueue, MSHRQueue::allocatedList 179 */ 180 Iterator allocIter; 181 182private: 183 /** List of all requests that match the address */ 184 TargetList *targets; 185 186 TargetList *deferredTargets; 187 188public: 189 190 bool isUncacheable() { return _isUncacheable; } 191 192 /** 193 * Allocate a miss to this MSHR. 194 * @param cmd The requesting command. 195 * @param addr The address of the miss. 196 * @param asid The address space id of the miss. 197 * @param size The number of bytes to request. 198 * @param pkt The original miss. 199 */ 200 void allocate(Addr addr, int size, PacketPtr pkt, 201 Tick when, Counter _order); 202 203 bool markInService(PacketPtr pkt); 204 205 void clearDownstreamPending(); 206 207 /** 208 * Mark this MSHR as free. 209 */ 210 void deallocate(); 211 212 /** 213 * Add a request to the list of targets. 214 * @param target The target. 215 */ 216 void allocateTarget(PacketPtr target, Tick when, Counter order); 217 bool handleSnoop(PacketPtr target, Counter order); 218 219 /** A simple constructor. */ 220 MSHR(); 221 /** A simple destructor. */ 222 ~MSHR(); 223 224 /** 225 * Returns the current number of allocated targets. 226 * @return The current number of allocated targets. 227 */ 228 int getNumTargets() const { return ntargets; } 229 230 /** 231 * Returns a pointer to the target list. 232 * @return a pointer to the target list. 233 */ 234 TargetList *getTargetList() { return targets; } 235 236 /** 237 * Returns true if there are targets left. 238 * @return true if there are targets 239 */ 240 bool hasTargets() const { return !targets->empty(); } 241 242 /** 243 * Returns a reference to the first target. 244 * @return A pointer to the first target. 245 */ 246 Target *getTarget() const 247 { 248 assert(hasTargets()); 249 return &targets->front(); 250 } 251 252 /** 253 * Pop first target. 254 */ 255 void popTarget() 256 { 257 --ntargets; 258 targets->pop_front(); 259 } 260 261 bool isForwardNoResponse() const 262 { 263 if (getNumTargets() != 1) 264 return false; 265 Target *tgt = getTarget(); 266 return tgt->source == Target::FromCPU && !tgt->pkt->needsResponse(); 267 } 268 269 bool promoteDeferredTargets(); 270 271 void handleFill(Packet *pkt, CacheBlk *blk); 272 273 bool checkFunctional(PacketPtr pkt); 274 275 /** 276 * Prints the contents of this MSHR for debugging. 277 */ 278 void print(std::ostream &os, 279 int verbosity = 0, 280 const std::string &prefix = "") const; 281}; 282 283#endif //__MSHR_HH__ 284