mshr.hh revision 4671
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Erik Hallnor 29 */ 30 31/** 32 * @file 33 * Miss Status and Handling Register (MSHR) declaration. 34 */ 35 36#ifndef __MSHR_HH__ 37#define __MSHR_HH__ 38 39#include <list> 40 41#include "mem/packet.hh" 42 43class CacheBlk; 44class MSHRQueue; 45 46/** 47 * Miss Status and handling Register. This class keeps all the information 48 * needed to handle a cache miss including a list of target requests. 49 */ 50class MSHR : public Packet::SenderState 51{ 52 53 public: 54 55 class Target { 56 public: 57 Tick time; //!< Time when request was received (for stats) 58 Counter order; //!< Global order (for memory consistency mgmt) 59 PacketPtr pkt; //!< Pending request packet. 60 bool cpuSide; //!< Did request come from cpu side or mem side? 61 62 bool isCpuSide() { return cpuSide; } 63 64 Target(PacketPtr _pkt, Tick _time, Counter _order, bool _cpuSide) 65 : time(_time), order(_order), pkt(_pkt), cpuSide(_cpuSide) 66 {} 67 }; 68 69 /** Defines the Data structure of the MSHR targetlist. */ 70 typedef std::list<Target> TargetList; 71 /** Target list iterator. */ 72 typedef std::list<Target>::iterator TargetListIterator; 73 /** A list of MSHRs. */ 74 typedef std::list<MSHR *> List; 75 /** MSHR list iterator. */ 76 typedef List::iterator Iterator; 77 /** MSHR list const_iterator. */ 78 typedef List::const_iterator ConstIterator; 79 80 /** Pointer to queue containing this MSHR. */ 81 MSHRQueue *queue; 82 83 /** Cycle when ready to issue */ 84 Tick readyTick; 85 86 /** Order number assigned by the miss queue. */ 87 Counter order; 88 89 /** Address of the request. */ 90 Addr addr; 91 92 /** Size of the request. */ 93 int size; 94 95 /** True if the request has been sent to the bus. */ 96 bool inService; 97 98 /** True if we will be putting the returned block in the cache */ 99 bool isCacheFill; 100 /** True if we need to get an exclusive copy of the block. */ 101 bool needsExclusive; 102 103 /** True if the request is uncacheable */ 104 bool _isUncacheable; 105 106 bool deferredNeedsExclusive; 107 bool pendingInvalidate; 108 bool pendingShared; 109 110 /** Thread number of the miss. */ 111 short threadNum; 112 /** The number of currently allocated targets. */ 113 short ntargets; 114 115 116 /** Data buffer (if needed). Currently used only for pending 117 * upgrade handling. */ 118 uint8_t *data; 119 120 /** 121 * Pointer to this MSHR on the ready list. 122 * @sa MissQueue, MSHRQueue::readyList 123 */ 124 Iterator readyIter; 125 126 /** 127 * Pointer to this MSHR on the allocated list. 128 * @sa MissQueue, MSHRQueue::allocatedList 129 */ 130 Iterator allocIter; 131 132private: 133 /** List of all requests that match the address */ 134 TargetList targets; 135 136 TargetList deferredTargets; 137 138public: 139 140 bool isUncacheable() { return _isUncacheable; } 141 142 /** 143 * Allocate a miss to this MSHR. 144 * @param cmd The requesting command. 145 * @param addr The address of the miss. 146 * @param asid The address space id of the miss. 147 * @param size The number of bytes to request. 148 * @param pkt The original miss. 149 */ 150 void allocate(Addr addr, int size, PacketPtr pkt, 151 Tick when, Counter _order); 152 153 /** 154 * Mark this MSHR as free. 155 */ 156 void deallocate(); 157 158 /** 159 * Add a request to the list of targets. 160 * @param target The target. 161 */ 162 void allocateTarget(PacketPtr target, Tick when, Counter order); 163 void allocateSnoopTarget(PacketPtr target, Tick when, Counter order); 164 165 /** A simple constructor. */ 166 MSHR(); 167 /** A simple destructor. */ 168 ~MSHR(); 169 170 /** 171 * Returns the current number of allocated targets. 172 * @return The current number of allocated targets. 173 */ 174 int getNumTargets() { return ntargets; } 175 176 /** 177 * Returns a pointer to the target list. 178 * @return a pointer to the target list. 179 */ 180 TargetList* getTargetList() { return &targets; } 181 182 /** 183 * Returns a reference to the first target. 184 * @return A pointer to the first target. 185 */ 186 Target *getTarget() { return &targets.front(); } 187 188 /** 189 * Pop first target. 190 */ 191 void popTarget() 192 { 193 --ntargets; 194 targets.pop_front(); 195 } 196 197 /** 198 * Returns true if there are targets left. 199 * @return true if there are targets 200 */ 201 bool hasTargets() { return !targets.empty(); } 202 203 bool isSimpleForward() 204 { 205 if (getNumTargets() != 1) 206 return false; 207 Target *tgt = getTarget(); 208 return tgt->isCpuSide() && !tgt->pkt->needsResponse(); 209 } 210 211 bool promoteDeferredTargets(); 212 213 void handleFill(Packet *pkt, CacheBlk *blk); 214 215 /** 216 * Prints the contents of this MSHR to stderr. 217 */ 218 void dump(); 219}; 220 221#endif //__MSHR_HH__ 222