mshr.hh revision 10502:f2f1dbfd505e
1/* 2 * Copyright (c) 2012-2013 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Erik Hallnor 41 */ 42 43/** 44 * @file 45 * Miss Status and Handling Register (MSHR) declaration. 46 */ 47 48#ifndef __MSHR_HH__ 49#define __MSHR_HH__ 50 51#include <list> 52 53#include "base/printable.hh" 54#include "mem/packet.hh" 55 56class CacheBlk; 57class MSHRQueue; 58 59/** 60 * Miss Status and handling Register. This class keeps all the information 61 * needed to handle a cache miss including a list of target requests. 62 * @sa \ref gem5MemorySystem "gem5 Memory System" 63 */ 64class MSHR : public Packet::SenderState, public Printable 65{ 66 67 /** 68 * Consider the MSHRQueue a friend to avoid making everything public 69 */ 70 friend class MSHRQueue; 71 72 private: 73 74 /** Cycle when ready to issue */ 75 Tick readyTime; 76 77 /** True if the request is uncacheable */ 78 bool _isUncacheable; 79 80 /** Flag set by downstream caches */ 81 bool downstreamPending; 82 83 /** Will we have a dirty copy after this request? */ 84 bool pendingDirty; 85 86 /** Did we snoop an invalidate while waiting for data? */ 87 bool postInvalidate; 88 89 /** Did we snoop a read while waiting for data? */ 90 bool postDowngrade; 91 92 /** Did we get WriteInvalidate'd (and therefore obsoleted)? */ 93 bool _isObsolete; 94 95 public: 96 97 class Target { 98 public: 99 100 enum Source { 101 FromCPU, 102 FromSnoop, 103 FromPrefetcher 104 }; 105 106 Tick recvTime; //!< Time when request was received (for stats) 107 Tick readyTime; //!< Time when request is ready to be serviced 108 Counter order; //!< Global order (for memory consistency mgmt) 109 PacketPtr pkt; //!< Pending request packet. 110 Source source; //!< Did request come from cpu, memory, or prefetcher? 111 bool markedPending; //!< Did we mark upstream MSHR 112 //!< as downstreamPending? 113 114 Target(PacketPtr _pkt, Tick _readyTime, Counter _order, 115 Source _source, bool _markedPending) 116 : recvTime(curTick()), readyTime(_readyTime), order(_order), 117 pkt(_pkt), source(_source), markedPending(_markedPending) 118 {} 119 }; 120 121 class TargetList : public std::list<Target> { 122 /** Target list iterator. */ 123 typedef std::list<Target>::iterator Iterator; 124 typedef std::list<Target>::const_iterator ConstIterator; 125 126 public: 127 bool needsExclusive; 128 bool hasUpgrade; 129 130 TargetList(); 131 void resetFlags() { needsExclusive = hasUpgrade = false; } 132 bool isReset() { return !needsExclusive && !hasUpgrade; } 133 void add(PacketPtr pkt, Tick readyTime, Counter order, 134 Target::Source source, bool markPending); 135 void replaceUpgrades(); 136 void clearDownstreamPending(); 137 bool checkFunctional(PacketPtr pkt); 138 void print(std::ostream &os, int verbosity, 139 const std::string &prefix) const; 140 }; 141 142 /** A list of MSHRs. */ 143 typedef std::list<MSHR *> List; 144 /** MSHR list iterator. */ 145 typedef List::iterator Iterator; 146 /** MSHR list const_iterator. */ 147 typedef List::const_iterator ConstIterator; 148 149 /** Pointer to queue containing this MSHR. */ 150 MSHRQueue *queue; 151 152 /** Order number assigned by the miss queue. */ 153 Counter order; 154 155 /** Address of the request. */ 156 Addr addr; 157 158 /** Size of the request. */ 159 int size; 160 161 /** True if the request targets the secure memory space. */ 162 bool isSecure; 163 164 /** True if the request has been sent to the bus. */ 165 bool inService; 166 167 /** True if the request is just a simple forward from an upper level */ 168 bool isForward; 169 170 /** The pending* and post* flags are only valid if inService is 171 * true. Using the accessor functions lets us detect if these 172 * flags are accessed improperly. 173 */ 174 175 /** True if we need to get an exclusive copy of the block. */ 176 bool needsExclusive() const { return targets.needsExclusive; } 177 178 bool isPendingDirty() const { 179 assert(inService); return pendingDirty; 180 } 181 182 bool hasPostInvalidate() const { 183 assert(inService); return postInvalidate; 184 } 185 186 bool hasPostDowngrade() const { 187 assert(inService); return postDowngrade; 188 } 189 190 /** Thread number of the miss. */ 191 ThreadID threadNum; 192 193 private: 194 195 /** Data buffer (if needed). Currently used only for pending 196 * upgrade handling. */ 197 uint8_t *data; 198 199 /** 200 * Pointer to this MSHR on the ready list. 201 * @sa MissQueue, MSHRQueue::readyList 202 */ 203 Iterator readyIter; 204 205 /** 206 * Pointer to this MSHR on the allocated list. 207 * @sa MissQueue, MSHRQueue::allocatedList 208 */ 209 Iterator allocIter; 210 211 /** List of all requests that match the address */ 212 TargetList targets; 213 214 TargetList deferredTargets; 215 216 public: 217 218 bool isUncacheable() const { return _isUncacheable; } 219 220 bool isObsolete() const { return _isObsolete; } 221 222 /** 223 * Allocate a miss to this MSHR. 224 * @param cmd The requesting command. 225 * @param addr The address of the miss. 226 * @param asid The address space id of the miss. 227 * @param size The number of bytes to request. 228 * @param pkt The original miss. 229 */ 230 void allocate(Addr addr, int size, PacketPtr pkt, 231 Tick when, Counter _order); 232 233 bool markInService(PacketPtr pkt); 234 235 void clearDownstreamPending(); 236 237 /** 238 * Mark this MSHR as free. 239 */ 240 void deallocate(); 241 242 /** 243 * Add a request to the list of targets. 244 * @param target The target. 245 */ 246 void allocateTarget(PacketPtr target, Tick when, Counter order); 247 bool handleSnoop(PacketPtr target, Counter order); 248 249 /** A simple constructor. */ 250 MSHR(); 251 252 /** 253 * Returns the current number of allocated targets. 254 * @return The current number of allocated targets. 255 */ 256 int getNumTargets() const 257 { return targets.size() + deferredTargets.size(); } 258 259 /** 260 * Returns true if there are targets left. 261 * @return true if there are targets 262 */ 263 bool hasTargets() const { return !targets.empty(); } 264 265 /** 266 * Returns a reference to the first target. 267 * @return A pointer to the first target. 268 */ 269 Target *getTarget() 270 { 271 assert(hasTargets()); 272 return &targets.front(); 273 } 274 275 /** 276 * Pop first target. 277 */ 278 void popTarget() 279 { 280 targets.pop_front(); 281 } 282 283 bool isForwardNoResponse() const 284 { 285 if (getNumTargets() != 1) 286 return false; 287 const Target *tgt = &targets.front(); 288 return tgt->source == Target::FromCPU && !tgt->pkt->needsResponse(); 289 } 290 291 bool promoteDeferredTargets(); 292 293 void handleFill(Packet *pkt, CacheBlk *blk); 294 295 bool checkFunctional(PacketPtr pkt); 296 297 /** Mark this MSHR as tracking a transaction with obsoleted data. It still 298 * needs to complete its lifecycle, but should not modify the cache. */ 299 void markObsolete() { 300 _isObsolete = true; 301 } 302 303 /** 304 * Prints the contents of this MSHR for debugging. 305 */ 306 void print(std::ostream &os, 307 int verbosity = 0, 308 const std::string &prefix = "") const; 309 /** 310 * A no-args wrapper of print(std::ostream...) meant to be 311 * invoked from DPRINTFs avoiding string overheads in fast mode 312 * 313 * @return string with mshr fields + [deferred]targets 314 */ 315 std::string print() const; 316}; 317 318#endif //__MSHR_HH__ 319