cache_blk.hh revision 4626:ed8aacb19c03 
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Erik Hallnor
29 */
30
31/** @file
32 * Definitions of a simple cache block class.
33 */
34
35#ifndef __CACHE_BLK_HH__
36#define __CACHE_BLK_HH__
37
38#include <list>
39
40#include "sim/core.hh"		// for Tick
41#include "arch/isa_traits.hh"	// for Addr
42#include "mem/packet.hh"
43#include "mem/request.hh"
44
45/**
46 * Cache block status bit assignments
47 */
48enum CacheBlkStatusBits {
49    /** valid, readable */
50    BlkValid =		0x01,
51    /** write permission */
52    BlkWritable =	0x02,
53    /** dirty (modified) */
54    BlkDirty =		0x04,
55    /** block was referenced */
56    BlkReferenced =	0x10,
57    /** block was a hardware prefetch yet unaccessed*/
58    BlkHWPrefetched =	0x20
59};
60
61/**
62 * A Basic Cache block.
63 * Contains the tag, status, and a pointer to data.
64 */
65class CacheBlk
66{
67  public:
68    /** The address space ID of this block. */
69    int asid;
70    /** Data block tag value. */
71    Addr tag;
72    /**
73     * Contains a copy of the data in this block for easy access. This is used
74     * for efficient execution when the data could be actually stored in
75     * another format (COW, compressed, sub-blocked, etc). In all cases the
76     * data stored here should be kept consistant with the actual data
77     * referenced by this block.
78     */
79    uint8_t *data;
80    /** the number of bytes stored in this block. */
81    int size;
82
83    /** block state: OR of CacheBlkStatusBit */
84    typedef unsigned State;
85
86    /** The current status of this block. @sa CacheBlockStatusBits */
87    State status;
88
89    /** Which curTick will this block be accessable */
90    Tick whenReady;
91
92    /**
93     * The set this block belongs to.
94     * @todo Move this into subclasses when we fix CacheTags to use them.
95     */
96    int set;
97
98    /** Number of references to this block since it was brought in. */
99    int refCount;
100
101  protected:
102    /**
103     * Represents that the indicated thread context has a "lock" on
104     * the block, in the LL/SC sense.
105     */
106    class Lock {
107      public:
108        int cpuNum;	// locking CPU
109        int threadNum;	// locking thread ID within CPU
110
111        // check for matching execution context
112        bool matchesContext(Request *req)
113        {
114            return (cpuNum == req->getCpuNum() &&
115                    threadNum == req->getThreadNum());
116        }
117
118        Lock(Request *req)
119            : cpuNum(req->getCpuNum()), threadNum(req->getThreadNum())
120        {
121        }
122    };
123
124    /** List of thread contexts that have performed a load-locked (LL)
125     * on the block since the last store. */
126    std::list<Lock> lockList;
127
128  public:
129
130    CacheBlk()
131        : asid(-1), tag(0), data(0) ,size(0), status(0), whenReady(0),
132          set(-1), refCount(0)
133    {}
134
135    /**
136     * Copy the state of the given block into this one.
137     * @param rhs The block to copy.
138     * @return a const reference to this block.
139     */
140    const CacheBlk& operator=(const CacheBlk& rhs)
141    {
142        asid = rhs.asid;
143        tag = rhs.tag;
144        data = rhs.data;
145        size = rhs.size;
146        status = rhs.status;
147        whenReady = rhs.whenReady;
148        set = rhs.set;
149        refCount = rhs.refCount;
150        return *this;
151    }
152
153    /**
154     * Checks the write permissions of this block.
155     * @return True if the block is writable.
156     */
157    bool isWritable() const
158    {
159        const int needed_bits = BlkWritable | BlkValid;
160        return (status & needed_bits) == needed_bits;
161    }
162
163    /**
164     * Checks that a block is valid (readable).
165     * @return True if the block is valid.
166     */
167    bool isValid() const
168    {
169        return (status & BlkValid) != 0;
170    }
171
172    /**
173     * Check to see if a block has been written.
174     * @return True if the block is dirty.
175     */
176    bool isDirty() const
177    {
178        return (status & BlkDirty) != 0;
179    }
180
181    /**
182     * Check if this block has been referenced.
183     * @return True if the block has been referenced.
184     */
185    bool isReferenced() const
186    {
187        return (status & BlkReferenced) != 0;
188    }
189
190    /**
191     * Check if this block was the result of a hardware prefetch, yet to
192     * be touched.
193     * @return True if the block was a hardware prefetch, unaccesed.
194     */
195    bool isPrefetch() const
196    {
197        return (status & BlkHWPrefetched) != 0;
198    }
199
200    /**
201     * Track the fact that a local locked was issued to the block.  If
202     * multiple LLs get issued from the same context we could have
203     * redundant records on the list, but that's OK, as they'll all
204     * get blown away at the next store.
205     */
206    void trackLoadLocked(PacketPtr pkt)
207    {
208        assert(pkt->isLocked());
209        lockList.push_front(Lock(pkt->req));
210    }
211
212    /**
213     * Clear the list of valid load locks.  Should be called whenever
214     * block is written to or invalidated.
215     */
216    void clearLoadLocks() { lockList.clear(); }
217
218    /**
219     * Handle interaction of load-locked operations and stores.
220     * @return True if write should proceed, false otherwise.  Returns
221     * false only in the case of a failed store conditional.
222     */
223    bool checkWrite(PacketPtr pkt)
224    {
225        Request *req = pkt->req;
226        if (pkt->isLocked()) {
227            // it's a store conditional... have to check for matching
228            // load locked.
229            bool success = false;
230
231            for (std::list<Lock>::iterator i = lockList.begin();
232                 i != lockList.end(); ++i)
233            {
234                if (i->matchesContext(req)) {
235                    // it's a store conditional, and as far as the memory
236                    // system can tell, the requesting context's lock is
237                    // still valid.
238                    success = true;
239                    break;
240                }
241            }
242
243            req->setExtraData(success ? 1 : 0);
244            clearLoadLocks();
245            return success;
246        } else {
247            // for *all* stores (conditional or otherwise) we have to
248            // clear the list of load-locks as they're all invalid now.
249            clearLoadLocks();
250            return true;
251        }
252    }
253};
254
255#endif //__CACHE_BLK_HH__
256