cache.cc revision 11333:c41d552d6f2e
1/* 2 * Copyright (c) 2010-2015 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc. 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Erik Hallnor 42 * Dave Greene 43 * Nathan Binkert 44 * Steve Reinhardt 45 * Ron Dreslinski 46 * Andreas Sandberg 47 */ 48 49/** 50 * @file 51 * Cache definitions. 52 */ 53 54#include "mem/cache/cache.hh" 55 56#include "base/misc.hh" 57#include "base/types.hh" 58#include "debug/Cache.hh" 59#include "debug/CachePort.hh" 60#include "debug/CacheTags.hh" 61#include "debug/CacheVerbose.hh" 62#include "mem/cache/blk.hh" 63#include "mem/cache/mshr.hh" 64#include "mem/cache/prefetch/base.hh" 65#include "sim/sim_exit.hh" 66 67Cache::Cache(const CacheParams *p) 68 : BaseCache(p, p->system->cacheLineSize()), 69 tags(p->tags), 70 prefetcher(p->prefetcher), 71 doFastWrites(true), 72 prefetchOnAccess(p->prefetch_on_access), 73 clusivity(p->clusivity), 74 writebackClean(p->writeback_clean), 75 tempBlockWriteback(nullptr), 76 writebackTempBlockAtomicEvent(this, false, 77 EventBase::Delayed_Writeback_Pri) 78{ 79 tempBlock = new CacheBlk(); 80 tempBlock->data = new uint8_t[blkSize]; 81 82 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this, 83 "CpuSidePort"); 84 memSidePort = new MemSidePort(p->name + ".mem_side", this, 85 "MemSidePort"); 86 87 tags->setCache(this); 88 if (prefetcher) 89 prefetcher->setCache(this); 90} 91 92Cache::~Cache() 93{ 94 delete [] tempBlock->data; 95 delete tempBlock; 96 97 delete cpuSidePort; 98 delete memSidePort; 99} 100 101void 102Cache::regStats() 103{ 104 BaseCache::regStats(); 105} 106 107void 108Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt) 109{ 110 assert(pkt->isRequest()); 111 112 uint64_t overwrite_val; 113 bool overwrite_mem; 114 uint64_t condition_val64; 115 uint32_t condition_val32; 116 117 int offset = tags->extractBlkOffset(pkt->getAddr()); 118 uint8_t *blk_data = blk->data + offset; 119 120 assert(sizeof(uint64_t) >= pkt->getSize()); 121 122 overwrite_mem = true; 123 // keep a copy of our possible write value, and copy what is at the 124 // memory address into the packet 125 pkt->writeData((uint8_t *)&overwrite_val); 126 pkt->setData(blk_data); 127 128 if (pkt->req->isCondSwap()) { 129 if (pkt->getSize() == sizeof(uint64_t)) { 130 condition_val64 = pkt->req->getExtraData(); 131 overwrite_mem = !std::memcmp(&condition_val64, blk_data, 132 sizeof(uint64_t)); 133 } else if (pkt->getSize() == sizeof(uint32_t)) { 134 condition_val32 = (uint32_t)pkt->req->getExtraData(); 135 overwrite_mem = !std::memcmp(&condition_val32, blk_data, 136 sizeof(uint32_t)); 137 } else 138 panic("Invalid size for conditional read/write\n"); 139 } 140 141 if (overwrite_mem) { 142 std::memcpy(blk_data, &overwrite_val, pkt->getSize()); 143 blk->status |= BlkDirty; 144 } 145} 146 147 148void 149Cache::satisfyCpuSideRequest(PacketPtr pkt, CacheBlk *blk, 150 bool deferred_response, bool pending_downgrade) 151{ 152 assert(pkt->isRequest()); 153 154 assert(blk && blk->isValid()); 155 // Occasionally this is not true... if we are a lower-level cache 156 // satisfying a string of Read and ReadEx requests from 157 // upper-level caches, a Read will mark the block as shared but we 158 // can satisfy a following ReadEx anyway since we can rely on the 159 // Read requester(s) to have buffered the ReadEx snoop and to 160 // invalidate their blocks after receiving them. 161 // assert(!pkt->needsWritable() || blk->isWritable()); 162 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize); 163 164 // Check RMW operations first since both isRead() and 165 // isWrite() will be true for them 166 if (pkt->cmd == MemCmd::SwapReq) { 167 cmpAndSwap(blk, pkt); 168 } else if (pkt->isWrite()) { 169 // we have the block in a writable state and can go ahead, 170 // note that the line may be also be considered writable in 171 // downstream caches along the path to memory, but always 172 // Exclusive, and never Modified 173 assert(blk->isWritable()); 174 // Write or WriteLine at the first cache with block in writable state 175 if (blk->checkWrite(pkt)) { 176 pkt->writeDataToBlock(blk->data, blkSize); 177 } 178 // Always mark the line as dirty (and thus transition to the 179 // Modified state) even if we are a failed StoreCond so we 180 // supply data to any snoops that have appended themselves to 181 // this cache before knowing the store will fail. 182 blk->status |= BlkDirty; 183 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (write)\n", 184 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 185 } else if (pkt->isRead()) { 186 if (pkt->isLLSC()) { 187 blk->trackLoadLocked(pkt); 188 } 189 190 // all read responses have a data payload 191 assert(pkt->hasRespData()); 192 pkt->setDataFromBlock(blk->data, blkSize); 193 194 // determine if this read is from a (coherent) cache, or not 195 // by looking at the command type; we could potentially add a 196 // packet attribute such as 'FromCache' to make this check a 197 // bit cleaner 198 if (pkt->cmd == MemCmd::ReadExReq || 199 pkt->cmd == MemCmd::ReadSharedReq || 200 pkt->cmd == MemCmd::ReadCleanReq || 201 pkt->cmd == MemCmd::SCUpgradeFailReq) { 202 assert(pkt->getSize() == blkSize); 203 // special handling for coherent block requests from 204 // upper-level caches 205 if (pkt->needsWritable()) { 206 // sanity check 207 assert(pkt->cmd == MemCmd::ReadExReq || 208 pkt->cmd == MemCmd::SCUpgradeFailReq); 209 210 // if we have a dirty copy, make sure the recipient 211 // keeps it marked dirty (in the modified state) 212 if (blk->isDirty()) { 213 pkt->setCacheResponding(); 214 } 215 // on ReadExReq we give up our copy unconditionally, 216 // even if this cache is mostly inclusive, we may want 217 // to revisit this 218 invalidateBlock(blk); 219 } else if (blk->isWritable() && !pending_downgrade && 220 !pkt->hasSharers() && 221 pkt->cmd != MemCmd::ReadCleanReq) { 222 // we can give the requester a writable copy on a read 223 // request if: 224 // - we have a writable copy at this level (& below) 225 // - we don't have a pending snoop from below 226 // signaling another read request 227 // - no other cache above has a copy (otherwise it 228 // would have set hasSharers flag when 229 // snooping the packet) 230 // - the read has explicitly asked for a clean 231 // copy of the line 232 if (blk->isDirty()) { 233 // special considerations if we're owner: 234 if (!deferred_response) { 235 // respond with the line in Modified state 236 // (cacheResponding set, hasSharers not set) 237 pkt->setCacheResponding(); 238 239 if (clusivity == Enums::mostly_excl) { 240 // if this cache is mostly exclusive with 241 // respect to the cache above, drop the 242 // block, no need to first unset the dirty 243 // bit 244 invalidateBlock(blk); 245 } else { 246 // if this cache is mostly inclusive, we 247 // keep the block in the Exclusive state, 248 // and pass it upwards as Modified 249 // (writable and dirty), hence we have 250 // multiple caches, all on the same path 251 // towards memory, all considering the 252 // same block writable, but only one 253 // considering it Modified 254 255 // we get away with multiple caches (on 256 // the same path to memory) considering 257 // the block writeable as we always enter 258 // the cache hierarchy through a cache, 259 // and first snoop upwards in all other 260 // branches 261 blk->status &= ~BlkDirty; 262 } 263 } else { 264 // if we're responding after our own miss, 265 // there's a window where the recipient didn't 266 // know it was getting ownership and may not 267 // have responded to snoops correctly, so we 268 // have to respond with a shared line 269 pkt->setHasSharers(); 270 } 271 } 272 } else { 273 // otherwise only respond with a shared copy 274 pkt->setHasSharers(); 275 } 276 } 277 } else { 278 // Upgrade or Invalidate 279 assert(pkt->isUpgrade() || pkt->isInvalidate()); 280 281 // for invalidations we could be looking at the temp block 282 // (for upgrades we always allocate) 283 invalidateBlock(blk); 284 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d (invalidation)\n", 285 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 286 } 287} 288 289 290///////////////////////////////////////////////////// 291// 292// MSHR helper functions 293// 294///////////////////////////////////////////////////// 295 296 297void 298Cache::markInService(MSHR *mshr, bool pending_modified_resp) 299{ 300 markInServiceInternal(mshr, pending_modified_resp); 301} 302 303///////////////////////////////////////////////////// 304// 305// Access path: requests coming in from the CPU side 306// 307///////////////////////////////////////////////////// 308 309bool 310Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, 311 PacketList &writebacks) 312{ 313 // sanity check 314 assert(pkt->isRequest()); 315 316 chatty_assert(!(isReadOnly && pkt->isWrite()), 317 "Should never see a write in a read-only cache %s\n", 318 name()); 319 320 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__, 321 pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 322 323 if (pkt->req->isUncacheable()) { 324 DPRINTF(Cache, "%s%s addr %#llx uncacheable\n", pkt->cmdString(), 325 pkt->req->isInstFetch() ? " (ifetch)" : "", 326 pkt->getAddr()); 327 328 // flush and invalidate any existing block 329 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure())); 330 if (old_blk && old_blk->isValid()) { 331 if (old_blk->isDirty() || writebackClean) 332 writebacks.push_back(writebackBlk(old_blk)); 333 else 334 writebacks.push_back(cleanEvictBlk(old_blk)); 335 tags->invalidate(old_blk); 336 old_blk->invalidate(); 337 } 338 339 blk = NULL; 340 // lookupLatency is the latency in case the request is uncacheable. 341 lat = lookupLatency; 342 return false; 343 } 344 345 ContextID id = pkt->req->hasContextId() ? 346 pkt->req->contextId() : InvalidContextID; 347 // Here lat is the value passed as parameter to accessBlock() function 348 // that can modify its value. 349 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat, id); 350 351 DPRINTF(Cache, "%s%s addr %#llx size %d (%s) %s\n", pkt->cmdString(), 352 pkt->req->isInstFetch() ? " (ifetch)" : "", 353 pkt->getAddr(), pkt->getSize(), pkt->isSecure() ? "s" : "ns", 354 blk ? "hit " + blk->print() : "miss"); 355 356 357 if (pkt->isEviction()) { 358 // We check for presence of block in above caches before issuing 359 // Writeback or CleanEvict to write buffer. Therefore the only 360 // possible cases can be of a CleanEvict packet coming from above 361 // encountering a Writeback generated in this cache peer cache and 362 // waiting in the write buffer. Cases of upper level peer caches 363 // generating CleanEvict and Writeback or simply CleanEvict and 364 // CleanEvict almost simultaneously will be caught by snoops sent out 365 // by crossbar. 366 std::vector<MSHR *> outgoing; 367 if (writeBuffer.findMatches(pkt->getAddr(), pkt->isSecure(), 368 outgoing)) { 369 assert(outgoing.size() == 1); 370 MSHR *wb_entry = outgoing[0]; 371 assert(wb_entry->getNumTargets() == 1); 372 PacketPtr wbPkt = wb_entry->getTarget()->pkt; 373 assert(wbPkt->isWriteback()); 374 375 if (pkt->isCleanEviction()) { 376 // The CleanEvict and WritebackClean snoops into other 377 // peer caches of the same level while traversing the 378 // crossbar. If a copy of the block is found, the 379 // packet is deleted in the crossbar. Hence, none of 380 // the other upper level caches connected to this 381 // cache have the block, so we can clear the 382 // BLOCK_CACHED flag in the Writeback if set and 383 // discard the CleanEvict by returning true. 384 wbPkt->clearBlockCached(); 385 return true; 386 } else { 387 assert(pkt->cmd == MemCmd::WritebackDirty); 388 // Dirty writeback from above trumps our clean 389 // writeback... discard here 390 // Note: markInService will remove entry from writeback buffer. 391 markInService(wb_entry, false); 392 delete wbPkt; 393 } 394 } 395 } 396 397 // Writeback handling is special case. We can write the block into 398 // the cache without having a writeable copy (or any copy at all). 399 if (pkt->isWriteback()) { 400 assert(blkSize == pkt->getSize()); 401 402 // we could get a clean writeback while we are having 403 // outstanding accesses to a block, do the simple thing for 404 // now and drop the clean writeback so that we do not upset 405 // any ordering/decisions about ownership already taken 406 if (pkt->cmd == MemCmd::WritebackClean && 407 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) { 408 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, " 409 "dropping\n", pkt->getAddr()); 410 return true; 411 } 412 413 if (blk == NULL) { 414 // need to do a replacement 415 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks); 416 if (blk == NULL) { 417 // no replaceable block available: give up, fwd to next level. 418 incMissCount(pkt); 419 return false; 420 } 421 tags->insertBlock(pkt, blk); 422 423 blk->status = (BlkValid | BlkReadable); 424 if (pkt->isSecure()) { 425 blk->status |= BlkSecure; 426 } 427 } 428 // only mark the block dirty if we got a writeback command, 429 // and leave it as is for a clean writeback 430 if (pkt->cmd == MemCmd::WritebackDirty) { 431 blk->status |= BlkDirty; 432 } 433 // if the packet does not have sharers, it is passing 434 // writable, and we got the writeback in Modified or Exclusive 435 // state, if not we are in the Owned or Shared state 436 if (!pkt->hasSharers()) { 437 blk->status |= BlkWritable; 438 } 439 // nothing else to do; writeback doesn't expect response 440 assert(!pkt->needsResponse()); 441 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize); 442 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print()); 443 incHitCount(pkt); 444 return true; 445 } else if (pkt->cmd == MemCmd::CleanEvict) { 446 if (blk != NULL) { 447 // Found the block in the tags, need to stop CleanEvict from 448 // propagating further down the hierarchy. Returning true will 449 // treat the CleanEvict like a satisfied write request and delete 450 // it. 451 return true; 452 } 453 // We didn't find the block here, propagate the CleanEvict further 454 // down the memory hierarchy. Returning false will treat the CleanEvict 455 // like a Writeback which could not find a replaceable block so has to 456 // go to next level. 457 return false; 458 } else if ((blk != NULL) && 459 (pkt->needsWritable() ? blk->isWritable() : blk->isReadable())) { 460 // OK to satisfy access 461 incHitCount(pkt); 462 satisfyCpuSideRequest(pkt, blk); 463 return true; 464 } 465 466 // Can't satisfy access normally... either no block (blk == NULL) 467 // or have block but need writable 468 469 incMissCount(pkt); 470 471 if (blk == NULL && pkt->isLLSC() && pkt->isWrite()) { 472 // complete miss on store conditional... just give up now 473 pkt->req->setExtraData(0); 474 return true; 475 } 476 477 return false; 478} 479 480void 481Cache::doWritebacks(PacketList& writebacks, Tick forward_time) 482{ 483 while (!writebacks.empty()) { 484 PacketPtr wbPkt = writebacks.front(); 485 // We use forwardLatency here because we are copying writebacks to 486 // write buffer. Call isCachedAbove for both Writebacks and 487 // CleanEvicts. If isCachedAbove returns true we set BLOCK_CACHED flag 488 // in Writebacks and discard CleanEvicts. 489 if (isCachedAbove(wbPkt)) { 490 if (wbPkt->cmd == MemCmd::CleanEvict) { 491 // Delete CleanEvict because cached copies exist above. The 492 // packet destructor will delete the request object because 493 // this is a non-snoop request packet which does not require a 494 // response. 495 delete wbPkt; 496 } else if (wbPkt->cmd == MemCmd::WritebackClean) { 497 // clean writeback, do not send since the block is 498 // still cached above 499 assert(writebackClean); 500 delete wbPkt; 501 } else { 502 assert(wbPkt->cmd == MemCmd::WritebackDirty); 503 // Set BLOCK_CACHED flag in Writeback and send below, so that 504 // the Writeback does not reset the bit corresponding to this 505 // address in the snoop filter below. 506 wbPkt->setBlockCached(); 507 allocateWriteBuffer(wbPkt, forward_time); 508 } 509 } else { 510 // If the block is not cached above, send packet below. Both 511 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will 512 // reset the bit corresponding to this address in the snoop filter 513 // below. 514 allocateWriteBuffer(wbPkt, forward_time); 515 } 516 writebacks.pop_front(); 517 } 518} 519 520void 521Cache::doWritebacksAtomic(PacketList& writebacks) 522{ 523 while (!writebacks.empty()) { 524 PacketPtr wbPkt = writebacks.front(); 525 // Call isCachedAbove for both Writebacks and CleanEvicts. If 526 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks 527 // and discard CleanEvicts. 528 if (isCachedAbove(wbPkt, false)) { 529 if (wbPkt->cmd == MemCmd::WritebackDirty) { 530 // Set BLOCK_CACHED flag in Writeback and send below, 531 // so that the Writeback does not reset the bit 532 // corresponding to this address in the snoop filter 533 // below. We can discard CleanEvicts because cached 534 // copies exist above. Atomic mode isCachedAbove 535 // modifies packet to set BLOCK_CACHED flag 536 memSidePort->sendAtomic(wbPkt); 537 } 538 } else { 539 // If the block is not cached above, send packet below. Both 540 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will 541 // reset the bit corresponding to this address in the snoop filter 542 // below. 543 memSidePort->sendAtomic(wbPkt); 544 } 545 writebacks.pop_front(); 546 // In case of CleanEvicts, the packet destructor will delete the 547 // request object because this is a non-snoop request packet which 548 // does not require a response. 549 delete wbPkt; 550 } 551} 552 553 554void 555Cache::recvTimingSnoopResp(PacketPtr pkt) 556{ 557 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__, 558 pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 559 560 assert(pkt->isResponse()); 561 assert(!system->bypassCaches()); 562 563 // determine if the response is from a snoop request we created 564 // (in which case it should be in the outstandingSnoop), or if we 565 // merely forwarded someone else's snoop request 566 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) == 567 outstandingSnoop.end(); 568 569 if (!forwardAsSnoop) { 570 // the packet came from this cache, so sink it here and do not 571 // forward it 572 assert(pkt->cmd == MemCmd::HardPFResp); 573 574 outstandingSnoop.erase(pkt->req); 575 576 DPRINTF(Cache, "Got prefetch response from above for addr " 577 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns"); 578 recvTimingResp(pkt); 579 return; 580 } 581 582 // forwardLatency is set here because there is a response from an 583 // upper level cache. 584 // To pay the delay that occurs if the packet comes from the bus, 585 // we charge also headerDelay. 586 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay; 587 // Reset the timing of the packet. 588 pkt->headerDelay = pkt->payloadDelay = 0; 589 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time); 590} 591 592void 593Cache::promoteWholeLineWrites(PacketPtr pkt) 594{ 595 // Cache line clearing instructions 596 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) && 597 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) { 598 pkt->cmd = MemCmd::WriteLineReq; 599 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n"); 600 } 601} 602 603bool 604Cache::recvTimingReq(PacketPtr pkt) 605{ 606 DPRINTF(CacheTags, "%s tags: %s\n", __func__, tags->print()); 607 608 assert(pkt->isRequest()); 609 610 // Just forward the packet if caches are disabled. 611 if (system->bypassCaches()) { 612 // @todo This should really enqueue the packet rather 613 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt); 614 assert(success); 615 return true; 616 } 617 618 promoteWholeLineWrites(pkt); 619 620 if (pkt->cacheResponding()) { 621 // a cache above us (but not where the packet came from) is 622 // responding to the request, in other words it has the line 623 // in Modified or Owned state 624 DPRINTF(Cache, "Cache above responding to %#llx (%s): " 625 "not responding\n", 626 pkt->getAddr(), pkt->isSecure() ? "s" : "ns"); 627 628 // if the packet needs the block to be writable, and the cache 629 // that has promised to respond (setting the cache responding 630 // flag) is not providing writable (it is in Owned rather than 631 // the Modified state), we know that there may be other Shared 632 // copies in the system; go out and invalidate them all 633 if (pkt->needsWritable() && !pkt->responderHadWritable()) { 634 // an upstream cache that had the line in Owned state 635 // (dirty, but not writable), is responding and thus 636 // transferring the dirty line from one branch of the 637 // cache hierarchy to another 638 639 // send out an express snoop and invalidate all other 640 // copies (snooping a packet that needs writable is the 641 // same as an invalidation), thus turning the Owned line 642 // into a Modified line, note that we don't invalidate the 643 // block in the current cache or any other cache on the 644 // path to memory 645 646 // create a downstream express snoop with cleared packet 647 // flags, there is no need to allocate any data as the 648 // packet is merely used to co-ordinate state transitions 649 Packet *snoop_pkt = new Packet(pkt, true, false); 650 651 // also reset the bus time that the original packet has 652 // not yet paid for 653 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0; 654 655 // make this an instantaneous express snoop, and let the 656 // other caches in the system know that the another cache 657 // is responding, because we have found the authorative 658 // copy (Modified or Owned) that will supply the right 659 // data 660 snoop_pkt->setExpressSnoop(); 661 snoop_pkt->setCacheResponding(); 662 663 // this express snoop travels towards the memory, and at 664 // every crossbar it is snooped upwards thus reaching 665 // every cache in the system 666 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt); 667 // express snoops always succeed 668 assert(success); 669 670 // main memory will delete the snoop packet 671 } 672 673 // queue for deletion, as opposed to immediate deletion, as 674 // the sending cache is still relying on the packet 675 pendingDelete.reset(pkt); 676 677 // no need to take any action in this particular cache as an 678 // upstream cache has already committed to responding, and 679 // either the packet does not need writable (and we can let 680 // the cache that set the cache responding flag pass on the 681 // line without any need for intervention), or if the packet 682 // needs writable it is provided, or we have already sent out 683 // any express snoops in the section above 684 return true; 685 } 686 687 // anything that is merely forwarded pays for the forward latency and 688 // the delay provided by the crossbar 689 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 690 691 // We use lookupLatency here because it is used to specify the latency 692 // to access. 693 Cycles lat = lookupLatency; 694 CacheBlk *blk = NULL; 695 bool satisfied = false; 696 { 697 PacketList writebacks; 698 // Note that lat is passed by reference here. The function 699 // access() calls accessBlock() which can modify lat value. 700 satisfied = access(pkt, blk, lat, writebacks); 701 702 // copy writebacks to write buffer here to ensure they logically 703 // proceed anything happening below 704 doWritebacks(writebacks, forward_time); 705 } 706 707 // Here we charge the headerDelay that takes into account the latencies 708 // of the bus, if the packet comes from it. 709 // The latency charged it is just lat that is the value of lookupLatency 710 // modified by access() function, or if not just lookupLatency. 711 // In case of a hit we are neglecting response latency. 712 // In case of a miss we are neglecting forward latency. 713 Tick request_time = clockEdge(lat) + pkt->headerDelay; 714 // Here we reset the timing of the packet. 715 pkt->headerDelay = pkt->payloadDelay = 0; 716 717 // track time of availability of next prefetch, if any 718 Tick next_pf_time = MaxTick; 719 720 bool needsResponse = pkt->needsResponse(); 721 722 if (satisfied) { 723 // should never be satisfying an uncacheable access as we 724 // flush and invalidate any existing block as part of the 725 // lookup 726 assert(!pkt->req->isUncacheable()); 727 728 // hit (for all other request types) 729 730 if (prefetcher && (prefetchOnAccess || (blk && blk->wasPrefetched()))) { 731 if (blk) 732 blk->status &= ~BlkHWPrefetched; 733 734 // Don't notify on SWPrefetch 735 if (!pkt->cmd.isSWPrefetch()) 736 next_pf_time = prefetcher->notify(pkt); 737 } 738 739 if (needsResponse) { 740 pkt->makeTimingResponse(); 741 // @todo: Make someone pay for this 742 pkt->headerDelay = pkt->payloadDelay = 0; 743 744 // In this case we are considering request_time that takes 745 // into account the delay of the xbar, if any, and just 746 // lat, neglecting responseLatency, modelling hit latency 747 // just as lookupLatency or or the value of lat overriden 748 // by access(), that calls accessBlock() function. 749 cpuSidePort->schedTimingResp(pkt, request_time, true); 750 } else { 751 DPRINTF(Cache, "%s satisfied %s addr %#llx, no response needed\n", 752 __func__, pkt->cmdString(), pkt->getAddr(), 753 pkt->getSize()); 754 755 // queue the packet for deletion, as the sending cache is 756 // still relying on it; if the block is found in access(), 757 // CleanEvict and Writeback messages will be deleted 758 // here as well 759 pendingDelete.reset(pkt); 760 } 761 } else { 762 // miss 763 764 Addr blk_addr = blockAlign(pkt->getAddr()); 765 766 // ignore any existing MSHR if we are dealing with an 767 // uncacheable request 768 MSHR *mshr = pkt->req->isUncacheable() ? nullptr : 769 mshrQueue.findMatch(blk_addr, pkt->isSecure()); 770 771 // Software prefetch handling: 772 // To keep the core from waiting on data it won't look at 773 // anyway, send back a response with dummy data. Miss handling 774 // will continue asynchronously. Unfortunately, the core will 775 // insist upon freeing original Packet/Request, so we have to 776 // create a new pair with a different lifecycle. Note that this 777 // processing happens before any MSHR munging on the behalf of 778 // this request because this new Request will be the one stored 779 // into the MSHRs, not the original. 780 if (pkt->cmd.isSWPrefetch()) { 781 assert(needsResponse); 782 assert(pkt->req->hasPaddr()); 783 assert(!pkt->req->isUncacheable()); 784 785 // There's no reason to add a prefetch as an additional target 786 // to an existing MSHR. If an outstanding request is already 787 // in progress, there is nothing for the prefetch to do. 788 // If this is the case, we don't even create a request at all. 789 PacketPtr pf = nullptr; 790 791 if (!mshr) { 792 // copy the request and create a new SoftPFReq packet 793 RequestPtr req = new Request(pkt->req->getPaddr(), 794 pkt->req->getSize(), 795 pkt->req->getFlags(), 796 pkt->req->masterId()); 797 pf = new Packet(req, pkt->cmd); 798 pf->allocate(); 799 assert(pf->getAddr() == pkt->getAddr()); 800 assert(pf->getSize() == pkt->getSize()); 801 } 802 803 pkt->makeTimingResponse(); 804 805 // request_time is used here, taking into account lat and the delay 806 // charged if the packet comes from the xbar. 807 cpuSidePort->schedTimingResp(pkt, request_time, true); 808 809 // If an outstanding request is in progress (we found an 810 // MSHR) this is set to null 811 pkt = pf; 812 } 813 814 if (mshr) { 815 /// MSHR hit 816 /// @note writebacks will be checked in getNextMSHR() 817 /// for any conflicting requests to the same block 818 819 //@todo remove hw_pf here 820 821 // Coalesce unless it was a software prefetch (see above). 822 if (pkt) { 823 assert(!pkt->isWriteback()); 824 // CleanEvicts corresponding to blocks which have 825 // outstanding requests in MSHRs are simply sunk here 826 if (pkt->cmd == MemCmd::CleanEvict) { 827 pendingDelete.reset(pkt); 828 } else { 829 DPRINTF(Cache, "%s coalescing MSHR for %s addr %#llx size %d\n", 830 __func__, pkt->cmdString(), pkt->getAddr(), 831 pkt->getSize()); 832 833 assert(pkt->req->masterId() < system->maxMasters()); 834 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 835 // We use forward_time here because it is the same 836 // considering new targets. We have multiple 837 // requests for the same address here. It 838 // specifies the latency to allocate an internal 839 // buffer and to schedule an event to the queued 840 // port and also takes into account the additional 841 // delay of the xbar. 842 mshr->allocateTarget(pkt, forward_time, order++, 843 allocOnFill(pkt->cmd)); 844 if (mshr->getNumTargets() == numTarget) { 845 noTargetMSHR = mshr; 846 setBlocked(Blocked_NoTargets); 847 // need to be careful with this... if this mshr isn't 848 // ready yet (i.e. time > curTick()), we don't want to 849 // move it ahead of mshrs that are ready 850 // mshrQueue.moveToFront(mshr); 851 } 852 } 853 // We should call the prefetcher reguardless if the request is 854 // satisfied or not, reguardless if the request is in the MSHR or 855 // not. The request could be a ReadReq hit, but still not 856 // satisfied (potentially because of a prior write to the same 857 // cache line. So, even when not satisfied, tehre is an MSHR 858 // already allocated for this, we need to let the prefetcher know 859 // about the request 860 if (prefetcher) { 861 // Don't notify on SWPrefetch 862 if (!pkt->cmd.isSWPrefetch()) 863 next_pf_time = prefetcher->notify(pkt); 864 } 865 } 866 } else { 867 // no MSHR 868 assert(pkt->req->masterId() < system->maxMasters()); 869 if (pkt->req->isUncacheable()) { 870 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++; 871 } else { 872 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++; 873 } 874 875 if (pkt->isEviction() || 876 (pkt->req->isUncacheable() && pkt->isWrite())) { 877 // We use forward_time here because there is an 878 // uncached memory write, forwarded to WriteBuffer. 879 allocateWriteBuffer(pkt, forward_time); 880 } else { 881 if (blk && blk->isValid()) { 882 // should have flushed and have no valid block 883 assert(!pkt->req->isUncacheable()); 884 885 // If we have a write miss to a valid block, we 886 // need to mark the block non-readable. Otherwise 887 // if we allow reads while there's an outstanding 888 // write miss, the read could return stale data 889 // out of the cache block... a more aggressive 890 // system could detect the overlap (if any) and 891 // forward data out of the MSHRs, but we don't do 892 // that yet. Note that we do need to leave the 893 // block valid so that it stays in the cache, in 894 // case we get an upgrade response (and hence no 895 // new data) when the write miss completes. 896 // As long as CPUs do proper store/load forwarding 897 // internally, and have a sufficiently weak memory 898 // model, this is probably unnecessary, but at some 899 // point it must have seemed like we needed it... 900 assert(pkt->needsWritable()); 901 assert(!blk->isWritable()); 902 blk->status &= ~BlkReadable; 903 } 904 // Here we are using forward_time, modelling the latency of 905 // a miss (outbound) just as forwardLatency, neglecting the 906 // lookupLatency component. 907 allocateMissBuffer(pkt, forward_time); 908 } 909 910 if (prefetcher) { 911 // Don't notify on SWPrefetch 912 if (!pkt->cmd.isSWPrefetch()) 913 next_pf_time = prefetcher->notify(pkt); 914 } 915 } 916 } 917 918 if (next_pf_time != MaxTick) 919 schedMemSideSendEvent(next_pf_time); 920 921 return true; 922} 923 924 925// See comment in cache.hh. 926PacketPtr 927Cache::getBusPacket(PacketPtr cpu_pkt, CacheBlk *blk, 928 bool needsWritable) const 929{ 930 bool blkValid = blk && blk->isValid(); 931 932 if (cpu_pkt->req->isUncacheable()) { 933 // note that at the point we see the uncacheable request we 934 // flush any block, but there could be an outstanding MSHR, 935 // and the cache could have filled again before we actually 936 // send out the forwarded uncacheable request (blk could thus 937 // be non-null) 938 return NULL; 939 } 940 941 if (!blkValid && 942 (cpu_pkt->isUpgrade() || 943 cpu_pkt->isEviction())) { 944 // Writebacks that weren't allocated in access() and upgrades 945 // from upper-level caches that missed completely just go 946 // through. 947 return NULL; 948 } 949 950 assert(cpu_pkt->needsResponse()); 951 952 MemCmd cmd; 953 // @TODO make useUpgrades a parameter. 954 // Note that ownership protocols require upgrade, otherwise a 955 // write miss on a shared owned block will generate a ReadExcl, 956 // which will clobber the owned copy. 957 const bool useUpgrades = true; 958 if (blkValid && useUpgrades) { 959 // only reason to be here is that blk is read only and we need 960 // it to be writable 961 assert(needsWritable); 962 assert(!blk->isWritable()); 963 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq; 964 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq || 965 cpu_pkt->cmd == MemCmd::StoreCondFailReq) { 966 // Even though this SC will fail, we still need to send out the 967 // request and get the data to supply it to other snoopers in the case 968 // where the determination the StoreCond fails is delayed due to 969 // all caches not being on the same local bus. 970 cmd = MemCmd::SCUpgradeFailReq; 971 } else if (cpu_pkt->cmd == MemCmd::WriteLineReq) { 972 // forward as invalidate to all other caches, this gives us 973 // the line in Exclusive state, and invalidates all other 974 // copies 975 cmd = MemCmd::InvalidateReq; 976 } else { 977 // block is invalid 978 cmd = needsWritable ? MemCmd::ReadExReq : 979 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq); 980 } 981 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize); 982 983 // if there are upstream caches that have already marked the 984 // packet as having sharers (not passing writable), pass that info 985 // downstream 986 if (cpu_pkt->hasSharers()) { 987 // note that cpu_pkt may have spent a considerable time in the 988 // MSHR queue and that the information could possibly be out 989 // of date, however, there is no harm in conservatively 990 // assuming the block has sharers 991 pkt->setHasSharers(); 992 DPRINTF(Cache, "%s passing hasSharers from %s to %s addr %#llx " 993 "size %d\n", 994 __func__, cpu_pkt->cmdString(), pkt->cmdString(), 995 pkt->getAddr(), pkt->getSize()); 996 } 997 998 // the packet should be block aligned 999 assert(pkt->getAddr() == blockAlign(pkt->getAddr())); 1000 1001 pkt->allocate(); 1002 DPRINTF(Cache, "%s created %s from %s for addr %#llx size %d\n", 1003 __func__, pkt->cmdString(), cpu_pkt->cmdString(), pkt->getAddr(), 1004 pkt->getSize()); 1005 return pkt; 1006} 1007 1008 1009Tick 1010Cache::recvAtomic(PacketPtr pkt) 1011{ 1012 // We are in atomic mode so we pay just for lookupLatency here. 1013 Cycles lat = lookupLatency; 1014 1015 // Forward the request if the system is in cache bypass mode. 1016 if (system->bypassCaches()) 1017 return ticksToCycles(memSidePort->sendAtomic(pkt)); 1018 1019 promoteWholeLineWrites(pkt); 1020 1021 // follow the same flow as in recvTimingReq, and check if a cache 1022 // above us is responding 1023 if (pkt->cacheResponding()) { 1024 DPRINTF(Cache, "Cache above responding to %#llx (%s): " 1025 "not responding\n", 1026 pkt->getAddr(), pkt->isSecure() ? "s" : "ns"); 1027 1028 // if a cache is responding, and it had the line in Owned 1029 // rather than Modified state, we need to invalidate any 1030 // copies that are not on the same path to memory 1031 if (pkt->needsWritable() && !pkt->responderHadWritable()) { 1032 lat += ticksToCycles(memSidePort->sendAtomic(pkt)); 1033 } 1034 1035 return lat * clockPeriod(); 1036 } 1037 1038 // should assert here that there are no outstanding MSHRs or 1039 // writebacks... that would mean that someone used an atomic 1040 // access in timing mode 1041 1042 CacheBlk *blk = NULL; 1043 PacketList writebacks; 1044 bool satisfied = access(pkt, blk, lat, writebacks); 1045 1046 // handle writebacks resulting from the access here to ensure they 1047 // logically proceed anything happening below 1048 doWritebacksAtomic(writebacks); 1049 1050 if (!satisfied) { 1051 // MISS 1052 1053 PacketPtr bus_pkt = getBusPacket(pkt, blk, pkt->needsWritable()); 1054 1055 bool is_forward = (bus_pkt == NULL); 1056 1057 if (is_forward) { 1058 // just forwarding the same request to the next level 1059 // no local cache operation involved 1060 bus_pkt = pkt; 1061 } 1062 1063 DPRINTF(Cache, "Sending an atomic %s for %#llx (%s)\n", 1064 bus_pkt->cmdString(), bus_pkt->getAddr(), 1065 bus_pkt->isSecure() ? "s" : "ns"); 1066 1067#if TRACING_ON 1068 CacheBlk::State old_state = blk ? blk->status : 0; 1069#endif 1070 1071 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt)); 1072 1073 // We are now dealing with the response handling 1074 DPRINTF(Cache, "Receive response: %s for addr %#llx (%s) in state %i\n", 1075 bus_pkt->cmdString(), bus_pkt->getAddr(), 1076 bus_pkt->isSecure() ? "s" : "ns", 1077 old_state); 1078 1079 // If packet was a forward, the response (if any) is already 1080 // in place in the bus_pkt == pkt structure, so we don't need 1081 // to do anything. Otherwise, use the separate bus_pkt to 1082 // generate response to pkt and then delete it. 1083 if (!is_forward) { 1084 if (pkt->needsResponse()) { 1085 assert(bus_pkt->isResponse()); 1086 if (bus_pkt->isError()) { 1087 pkt->makeAtomicResponse(); 1088 pkt->copyError(bus_pkt); 1089 } else if (pkt->cmd == MemCmd::InvalidateReq) { 1090 if (blk) { 1091 // invalidate response to a cache that received 1092 // an invalidate request 1093 satisfyCpuSideRequest(pkt, blk); 1094 } 1095 } else if (pkt->cmd == MemCmd::WriteLineReq) { 1096 // note the use of pkt, not bus_pkt here. 1097 1098 // write-line request to the cache that promoted 1099 // the write to a whole line 1100 blk = handleFill(pkt, blk, writebacks, 1101 allocOnFill(pkt->cmd)); 1102 satisfyCpuSideRequest(pkt, blk); 1103 } else if (bus_pkt->isRead() || 1104 bus_pkt->cmd == MemCmd::UpgradeResp) { 1105 // we're updating cache state to allow us to 1106 // satisfy the upstream request from the cache 1107 blk = handleFill(bus_pkt, blk, writebacks, 1108 allocOnFill(pkt->cmd)); 1109 satisfyCpuSideRequest(pkt, blk); 1110 } else { 1111 // we're satisfying the upstream request without 1112 // modifying cache state, e.g., a write-through 1113 pkt->makeAtomicResponse(); 1114 } 1115 } 1116 delete bus_pkt; 1117 } 1118 } 1119 1120 // Note that we don't invoke the prefetcher at all in atomic mode. 1121 // It's not clear how to do it properly, particularly for 1122 // prefetchers that aggressively generate prefetch candidates and 1123 // rely on bandwidth contention to throttle them; these will tend 1124 // to pollute the cache in atomic mode since there is no bandwidth 1125 // contention. If we ever do want to enable prefetching in atomic 1126 // mode, though, this is the place to do it... see timingAccess() 1127 // for an example (though we'd want to issue the prefetch(es) 1128 // immediately rather than calling requestMemSideBus() as we do 1129 // there). 1130 1131 // do any writebacks resulting from the response handling 1132 doWritebacksAtomic(writebacks); 1133 1134 // if we used temp block, check to see if its valid and if so 1135 // clear it out, but only do so after the call to recvAtomic is 1136 // finished so that any downstream observers (such as a snoop 1137 // filter), first see the fill, and only then see the eviction 1138 if (blk == tempBlock && tempBlock->isValid()) { 1139 // the atomic CPU calls recvAtomic for fetch and load/store 1140 // sequentuially, and we may already have a tempBlock 1141 // writeback from the fetch that we have not yet sent 1142 if (tempBlockWriteback) { 1143 // if that is the case, write the prevoius one back, and 1144 // do not schedule any new event 1145 writebackTempBlockAtomic(); 1146 } else { 1147 // the writeback/clean eviction happens after the call to 1148 // recvAtomic has finished (but before any successive 1149 // calls), so that the response handling from the fill is 1150 // allowed to happen first 1151 schedule(writebackTempBlockAtomicEvent, curTick()); 1152 } 1153 1154 tempBlockWriteback = (blk->isDirty() || writebackClean) ? 1155 writebackBlk(blk) : cleanEvictBlk(blk); 1156 blk->invalidate(); 1157 } 1158 1159 if (pkt->needsResponse()) { 1160 pkt->makeAtomicResponse(); 1161 } 1162 1163 return lat * clockPeriod(); 1164} 1165 1166 1167void 1168Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide) 1169{ 1170 if (system->bypassCaches()) { 1171 // Packets from the memory side are snoop request and 1172 // shouldn't happen in bypass mode. 1173 assert(fromCpuSide); 1174 1175 // The cache should be flushed if we are in cache bypass mode, 1176 // so we don't need to check if we need to update anything. 1177 memSidePort->sendFunctional(pkt); 1178 return; 1179 } 1180 1181 Addr blk_addr = blockAlign(pkt->getAddr()); 1182 bool is_secure = pkt->isSecure(); 1183 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); 1184 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure); 1185 1186 pkt->pushLabel(name()); 1187 1188 CacheBlkPrintWrapper cbpw(blk); 1189 1190 // Note that just because an L2/L3 has valid data doesn't mean an 1191 // L1 doesn't have a more up-to-date modified copy that still 1192 // needs to be found. As a result we always update the request if 1193 // we have it, but only declare it satisfied if we are the owner. 1194 1195 // see if we have data at all (owned or otherwise) 1196 bool have_data = blk && blk->isValid() 1197 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize, 1198 blk->data); 1199 1200 // data we have is dirty if marked as such or if we have an 1201 // in-service MSHR that is pending a modified line 1202 bool have_dirty = 1203 have_data && (blk->isDirty() || 1204 (mshr && mshr->inService && mshr->isPendingModified())); 1205 1206 bool done = have_dirty 1207 || cpuSidePort->checkFunctional(pkt) 1208 || mshrQueue.checkFunctional(pkt, blk_addr) 1209 || writeBuffer.checkFunctional(pkt, blk_addr) 1210 || memSidePort->checkFunctional(pkt); 1211 1212 DPRINTF(CacheVerbose, "functional %s %#llx (%s) %s%s%s\n", 1213 pkt->cmdString(), pkt->getAddr(), is_secure ? "s" : "ns", 1214 (blk && blk->isValid()) ? "valid " : "", 1215 have_data ? "data " : "", done ? "done " : ""); 1216 1217 // We're leaving the cache, so pop cache->name() label 1218 pkt->popLabel(); 1219 1220 if (done) { 1221 pkt->makeResponse(); 1222 } else { 1223 // if it came as a request from the CPU side then make sure it 1224 // continues towards the memory side 1225 if (fromCpuSide) { 1226 memSidePort->sendFunctional(pkt); 1227 } else if (forwardSnoops && cpuSidePort->isSnooping()) { 1228 // if it came from the memory side, it must be a snoop request 1229 // and we should only forward it if we are forwarding snoops 1230 cpuSidePort->sendFunctionalSnoop(pkt); 1231 } 1232 } 1233} 1234 1235 1236///////////////////////////////////////////////////// 1237// 1238// Response handling: responses from the memory side 1239// 1240///////////////////////////////////////////////////// 1241 1242 1243void 1244Cache::recvTimingResp(PacketPtr pkt) 1245{ 1246 assert(pkt->isResponse()); 1247 1248 // all header delay should be paid for by the crossbar, unless 1249 // this is a prefetch response from above 1250 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp, 1251 "%s saw a non-zero packet delay\n", name()); 1252 1253 MSHR *mshr = dynamic_cast<MSHR*>(pkt->senderState); 1254 bool is_error = pkt->isError(); 1255 1256 assert(mshr); 1257 1258 if (is_error) { 1259 DPRINTF(Cache, "Cache received packet with error for addr %#llx (%s), " 1260 "cmd: %s\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns", 1261 pkt->cmdString()); 1262 } 1263 1264 DPRINTF(Cache, "Handling response %s for addr %#llx size %d (%s)\n", 1265 pkt->cmdString(), pkt->getAddr(), pkt->getSize(), 1266 pkt->isSecure() ? "s" : "ns"); 1267 1268 MSHRQueue *mq = mshr->queue; 1269 bool wasFull = mq->isFull(); 1270 1271 if (mshr == noTargetMSHR) { 1272 // we always clear at least one target 1273 clearBlocked(Blocked_NoTargets); 1274 noTargetMSHR = NULL; 1275 } 1276 1277 // Initial target is used just for stats 1278 MSHR::Target *initial_tgt = mshr->getTarget(); 1279 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex(); 1280 Tick miss_latency = curTick() - initial_tgt->recvTime; 1281 PacketList writebacks; 1282 // We need forward_time here because we have a call of 1283 // allocateWriteBuffer() that need this parameter to specify the 1284 // time to request the bus. In this case we use forward latency 1285 // because there is a writeback. We pay also here for headerDelay 1286 // that is charged of bus latencies if the packet comes from the 1287 // bus. 1288 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 1289 1290 if (pkt->req->isUncacheable()) { 1291 assert(pkt->req->masterId() < system->maxMasters()); 1292 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] += 1293 miss_latency; 1294 } else { 1295 assert(pkt->req->masterId() < system->maxMasters()); 1296 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] += 1297 miss_latency; 1298 } 1299 1300 // upgrade deferred targets if the response has no sharers, and is 1301 // thus passing writable 1302 if (!pkt->hasSharers()) { 1303 mshr->promoteWritable(); 1304 } 1305 1306 bool is_fill = !mshr->isForward && 1307 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp); 1308 1309 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); 1310 1311 if (is_fill && !is_error) { 1312 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n", 1313 pkt->getAddr()); 1314 1315 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill); 1316 assert(blk != NULL); 1317 } 1318 1319 // allow invalidation responses originating from write-line 1320 // requests to be discarded 1321 bool is_invalidate = pkt->isInvalidate(); 1322 1323 // First offset for critical word first calculations 1324 int initial_offset = initial_tgt->pkt->getOffset(blkSize); 1325 1326 while (mshr->hasTargets()) { 1327 MSHR::Target *target = mshr->getTarget(); 1328 Packet *tgt_pkt = target->pkt; 1329 1330 switch (target->source) { 1331 case MSHR::Target::FromCPU: 1332 Tick completion_time; 1333 // Here we charge on completion_time the delay of the xbar if the 1334 // packet comes from it, charged on headerDelay. 1335 completion_time = pkt->headerDelay; 1336 1337 // Software prefetch handling for cache closest to core 1338 if (tgt_pkt->cmd.isSWPrefetch()) { 1339 // a software prefetch would have already been ack'd immediately 1340 // with dummy data so the core would be able to retire it. 1341 // this request completes right here, so we deallocate it. 1342 delete tgt_pkt->req; 1343 delete tgt_pkt; 1344 break; // skip response 1345 } 1346 1347 // unlike the other packet flows, where data is found in other 1348 // caches or memory and brought back, write-line requests always 1349 // have the data right away, so the above check for "is fill?" 1350 // cannot actually be determined until examining the stored MSHR 1351 // state. We "catch up" with that logic here, which is duplicated 1352 // from above. 1353 if (tgt_pkt->cmd == MemCmd::WriteLineReq) { 1354 assert(!is_error); 1355 // we got the block in a writable state, so promote 1356 // any deferred targets if possible 1357 mshr->promoteWritable(); 1358 // NB: we use the original packet here and not the response! 1359 blk = handleFill(tgt_pkt, blk, writebacks, mshr->allocOnFill); 1360 assert(blk != NULL); 1361 1362 // treat as a fill, and discard the invalidation 1363 // response 1364 is_fill = true; 1365 is_invalidate = false; 1366 } 1367 1368 if (is_fill) { 1369 satisfyCpuSideRequest(tgt_pkt, blk, 1370 true, mshr->hasPostDowngrade()); 1371 1372 // How many bytes past the first request is this one 1373 int transfer_offset = 1374 tgt_pkt->getOffset(blkSize) - initial_offset; 1375 if (transfer_offset < 0) { 1376 transfer_offset += blkSize; 1377 } 1378 1379 // If not critical word (offset) return payloadDelay. 1380 // responseLatency is the latency of the return path 1381 // from lower level caches/memory to an upper level cache or 1382 // the core. 1383 completion_time += clockEdge(responseLatency) + 1384 (transfer_offset ? pkt->payloadDelay : 0); 1385 1386 assert(!tgt_pkt->req->isUncacheable()); 1387 1388 assert(tgt_pkt->req->masterId() < system->maxMasters()); 1389 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] += 1390 completion_time - target->recvTime; 1391 } else if (pkt->cmd == MemCmd::UpgradeFailResp) { 1392 // failed StoreCond upgrade 1393 assert(tgt_pkt->cmd == MemCmd::StoreCondReq || 1394 tgt_pkt->cmd == MemCmd::StoreCondFailReq || 1395 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq); 1396 // responseLatency is the latency of the return path 1397 // from lower level caches/memory to an upper level cache or 1398 // the core. 1399 completion_time += clockEdge(responseLatency) + 1400 pkt->payloadDelay; 1401 tgt_pkt->req->setExtraData(0); 1402 } else { 1403 // not a cache fill, just forwarding response 1404 // responseLatency is the latency of the return path 1405 // from lower level cahces/memory to the core. 1406 completion_time += clockEdge(responseLatency) + 1407 pkt->payloadDelay; 1408 if (pkt->isRead() && !is_error) { 1409 // sanity check 1410 assert(pkt->getAddr() == tgt_pkt->getAddr()); 1411 assert(pkt->getSize() >= tgt_pkt->getSize()); 1412 1413 tgt_pkt->setData(pkt->getConstPtr<uint8_t>()); 1414 } 1415 } 1416 tgt_pkt->makeTimingResponse(); 1417 // if this packet is an error copy that to the new packet 1418 if (is_error) 1419 tgt_pkt->copyError(pkt); 1420 if (tgt_pkt->cmd == MemCmd::ReadResp && 1421 (is_invalidate || mshr->hasPostInvalidate())) { 1422 // If intermediate cache got ReadRespWithInvalidate, 1423 // propagate that. Response should not have 1424 // isInvalidate() set otherwise. 1425 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate; 1426 DPRINTF(Cache, "%s updated cmd to %s for addr %#llx\n", 1427 __func__, tgt_pkt->cmdString(), tgt_pkt->getAddr()); 1428 } 1429 // Reset the bus additional time as it is now accounted for 1430 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0; 1431 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true); 1432 break; 1433 1434 case MSHR::Target::FromPrefetcher: 1435 assert(tgt_pkt->cmd == MemCmd::HardPFReq); 1436 if (blk) 1437 blk->status |= BlkHWPrefetched; 1438 delete tgt_pkt->req; 1439 delete tgt_pkt; 1440 break; 1441 1442 case MSHR::Target::FromSnoop: 1443 // I don't believe that a snoop can be in an error state 1444 assert(!is_error); 1445 // response to snoop request 1446 DPRINTF(Cache, "processing deferred snoop...\n"); 1447 assert(!(is_invalidate && !mshr->hasPostInvalidate())); 1448 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate()); 1449 break; 1450 1451 default: 1452 panic("Illegal target->source enum %d\n", target->source); 1453 } 1454 1455 mshr->popTarget(); 1456 } 1457 1458 if (blk && blk->isValid()) { 1459 // an invalidate response stemming from a write line request 1460 // should not invalidate the block, so check if the 1461 // invalidation should be discarded 1462 if (is_invalidate || mshr->hasPostInvalidate()) { 1463 invalidateBlock(blk); 1464 } else if (mshr->hasPostDowngrade()) { 1465 blk->status &= ~BlkWritable; 1466 } 1467 } 1468 1469 if (mshr->promoteDeferredTargets()) { 1470 // avoid later read getting stale data while write miss is 1471 // outstanding.. see comment in timingAccess() 1472 if (blk) { 1473 blk->status &= ~BlkReadable; 1474 } 1475 mq = mshr->queue; 1476 mq->markPending(mshr); 1477 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay); 1478 } else { 1479 mq->deallocate(mshr); 1480 if (wasFull && !mq->isFull()) { 1481 clearBlocked((BlockedCause)mq->index); 1482 } 1483 1484 // Request the bus for a prefetch if this deallocation freed enough 1485 // MSHRs for a prefetch to take place 1486 if (prefetcher && mq == &mshrQueue && mshrQueue.canPrefetch()) { 1487 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(), 1488 clockEdge()); 1489 if (next_pf_time != MaxTick) 1490 schedMemSideSendEvent(next_pf_time); 1491 } 1492 } 1493 // reset the xbar additional timinig as it is now accounted for 1494 pkt->headerDelay = pkt->payloadDelay = 0; 1495 1496 // copy writebacks to write buffer 1497 doWritebacks(writebacks, forward_time); 1498 1499 // if we used temp block, check to see if its valid and then clear it out 1500 if (blk == tempBlock && tempBlock->isValid()) { 1501 // We use forwardLatency here because we are copying 1502 // Writebacks/CleanEvicts to write buffer. It specifies the latency to 1503 // allocate an internal buffer and to schedule an event to the 1504 // queued port. 1505 if (blk->isDirty() || writebackClean) { 1506 PacketPtr wbPkt = writebackBlk(blk); 1507 allocateWriteBuffer(wbPkt, forward_time); 1508 // Set BLOCK_CACHED flag if cached above. 1509 if (isCachedAbove(wbPkt)) 1510 wbPkt->setBlockCached(); 1511 } else { 1512 PacketPtr wcPkt = cleanEvictBlk(blk); 1513 // Check to see if block is cached above. If not allocate 1514 // write buffer 1515 if (isCachedAbove(wcPkt)) 1516 delete wcPkt; 1517 else 1518 allocateWriteBuffer(wcPkt, forward_time); 1519 } 1520 blk->invalidate(); 1521 } 1522 1523 DPRINTF(CacheVerbose, "Leaving %s with %s for addr %#llx\n", __func__, 1524 pkt->cmdString(), pkt->getAddr()); 1525 delete pkt; 1526} 1527 1528PacketPtr 1529Cache::writebackBlk(CacheBlk *blk) 1530{ 1531 chatty_assert(!isReadOnly || writebackClean, 1532 "Writeback from read-only cache"); 1533 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean)); 1534 1535 writebacks[Request::wbMasterId]++; 1536 1537 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set), 1538 blkSize, 0, Request::wbMasterId); 1539 if (blk->isSecure()) 1540 req->setFlags(Request::SECURE); 1541 1542 req->taskId(blk->task_id); 1543 blk->task_id= ContextSwitchTaskId::Unknown; 1544 blk->tickInserted = curTick(); 1545 1546 PacketPtr pkt = 1547 new Packet(req, blk->isDirty() ? 1548 MemCmd::WritebackDirty : MemCmd::WritebackClean); 1549 1550 DPRINTF(Cache, "Create Writeback %#llx writable: %d, dirty: %d\n", 1551 pkt->getAddr(), blk->isWritable(), blk->isDirty()); 1552 1553 if (blk->isWritable()) { 1554 // not asserting shared means we pass the block in modified 1555 // state, mark our own block non-writeable 1556 blk->status &= ~BlkWritable; 1557 } else { 1558 // we are in the Owned state, tell the receiver 1559 pkt->setHasSharers(); 1560 } 1561 1562 // make sure the block is not marked dirty 1563 blk->status &= ~BlkDirty; 1564 1565 pkt->allocate(); 1566 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize); 1567 1568 return pkt; 1569} 1570 1571PacketPtr 1572Cache::cleanEvictBlk(CacheBlk *blk) 1573{ 1574 assert(!writebackClean); 1575 assert(blk && blk->isValid() && !blk->isDirty()); 1576 // Creating a zero sized write, a message to the snoop filter 1577 Request *req = 1578 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0, 1579 Request::wbMasterId); 1580 if (blk->isSecure()) 1581 req->setFlags(Request::SECURE); 1582 1583 req->taskId(blk->task_id); 1584 blk->task_id = ContextSwitchTaskId::Unknown; 1585 blk->tickInserted = curTick(); 1586 1587 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict); 1588 pkt->allocate(); 1589 DPRINTF(Cache, "%s%s %x Create CleanEvict\n", pkt->cmdString(), 1590 pkt->req->isInstFetch() ? " (ifetch)" : "", 1591 pkt->getAddr()); 1592 1593 return pkt; 1594} 1595 1596void 1597Cache::memWriteback() 1598{ 1599 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor); 1600 tags->forEachBlk(visitor); 1601} 1602 1603void 1604Cache::memInvalidate() 1605{ 1606 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor); 1607 tags->forEachBlk(visitor); 1608} 1609 1610bool 1611Cache::isDirty() const 1612{ 1613 CacheBlkIsDirtyVisitor visitor; 1614 tags->forEachBlk(visitor); 1615 1616 return visitor.isDirty(); 1617} 1618 1619bool 1620Cache::writebackVisitor(CacheBlk &blk) 1621{ 1622 if (blk.isDirty()) { 1623 assert(blk.isValid()); 1624 1625 Request request(tags->regenerateBlkAddr(blk.tag, blk.set), 1626 blkSize, 0, Request::funcMasterId); 1627 request.taskId(blk.task_id); 1628 1629 Packet packet(&request, MemCmd::WriteReq); 1630 packet.dataStatic(blk.data); 1631 1632 memSidePort->sendFunctional(&packet); 1633 1634 blk.status &= ~BlkDirty; 1635 } 1636 1637 return true; 1638} 1639 1640bool 1641Cache::invalidateVisitor(CacheBlk &blk) 1642{ 1643 1644 if (blk.isDirty()) 1645 warn_once("Invalidating dirty cache lines. Expect things to break.\n"); 1646 1647 if (blk.isValid()) { 1648 assert(!blk.isDirty()); 1649 tags->invalidate(&blk); 1650 blk.invalidate(); 1651 } 1652 1653 return true; 1654} 1655 1656CacheBlk* 1657Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks) 1658{ 1659 CacheBlk *blk = tags->findVictim(addr); 1660 1661 // It is valid to return NULL if there is no victim 1662 if (!blk) 1663 return nullptr; 1664 1665 if (blk->isValid()) { 1666 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set); 1667 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure()); 1668 if (repl_mshr) { 1669 // must be an outstanding upgrade request 1670 // on a block we're about to replace... 1671 assert(!blk->isWritable() || blk->isDirty()); 1672 assert(repl_mshr->needsWritable()); 1673 // too hard to replace block with transient state 1674 // allocation failed, block not inserted 1675 return NULL; 1676 } else { 1677 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx (%s): %s\n", 1678 repl_addr, blk->isSecure() ? "s" : "ns", 1679 addr, is_secure ? "s" : "ns", 1680 blk->isDirty() ? "writeback" : "clean"); 1681 1682 // Will send up Writeback/CleanEvict snoops via isCachedAbove 1683 // when pushing this writeback list into the write buffer. 1684 if (blk->isDirty() || writebackClean) { 1685 // Save writeback packet for handling by caller 1686 writebacks.push_back(writebackBlk(blk)); 1687 } else { 1688 writebacks.push_back(cleanEvictBlk(blk)); 1689 } 1690 } 1691 } 1692 1693 return blk; 1694} 1695 1696void 1697Cache::invalidateBlock(CacheBlk *blk) 1698{ 1699 if (blk != tempBlock) 1700 tags->invalidate(blk); 1701 blk->invalidate(); 1702} 1703 1704// Note that the reason we return a list of writebacks rather than 1705// inserting them directly in the write buffer is that this function 1706// is called by both atomic and timing-mode accesses, and in atomic 1707// mode we don't mess with the write buffer (we just perform the 1708// writebacks atomically once the original request is complete). 1709CacheBlk* 1710Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, 1711 bool allocate) 1712{ 1713 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq); 1714 Addr addr = pkt->getAddr(); 1715 bool is_secure = pkt->isSecure(); 1716#if TRACING_ON 1717 CacheBlk::State old_state = blk ? blk->status : 0; 1718#endif 1719 1720 // When handling a fill, discard any CleanEvicts for the 1721 // same address in write buffer. 1722 Addr M5_VAR_USED blk_addr = blockAlign(pkt->getAddr()); 1723 std::vector<MSHR *> M5_VAR_USED wbs; 1724 assert (!writeBuffer.findMatches(blk_addr, is_secure, wbs)); 1725 1726 if (blk == NULL) { 1727 // better have read new data... 1728 assert(pkt->hasData()); 1729 1730 // only read responses and write-line requests have data; 1731 // note that we don't write the data here for write-line - that 1732 // happens in the subsequent satisfyCpuSideRequest. 1733 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq); 1734 1735 // need to do a replacement if allocating, otherwise we stick 1736 // with the temporary storage 1737 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : NULL; 1738 1739 if (blk == NULL) { 1740 // No replaceable block or a mostly exclusive 1741 // cache... just use temporary storage to complete the 1742 // current request and then get rid of it 1743 assert(!tempBlock->isValid()); 1744 blk = tempBlock; 1745 tempBlock->set = tags->extractSet(addr); 1746 tempBlock->tag = tags->extractTag(addr); 1747 // @todo: set security state as well... 1748 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr, 1749 is_secure ? "s" : "ns"); 1750 } else { 1751 tags->insertBlock(pkt, blk); 1752 } 1753 1754 // we should never be overwriting a valid block 1755 assert(!blk->isValid()); 1756 } else { 1757 // existing block... probably an upgrade 1758 assert(blk->tag == tags->extractTag(addr)); 1759 // either we're getting new data or the block should already be valid 1760 assert(pkt->hasData() || blk->isValid()); 1761 // don't clear block status... if block is already dirty we 1762 // don't want to lose that 1763 } 1764 1765 if (is_secure) 1766 blk->status |= BlkSecure; 1767 blk->status |= BlkValid | BlkReadable; 1768 1769 // sanity check for whole-line writes, which should always be 1770 // marked as writable as part of the fill, and then later marked 1771 // dirty as part of satisfyCpuSideRequest 1772 if (pkt->cmd == MemCmd::WriteLineReq) { 1773 assert(!pkt->hasSharers()); 1774 // at the moment other caches do not respond to the 1775 // invalidation requests corresponding to a whole-line write 1776 assert(!pkt->cacheResponding()); 1777 } 1778 1779 // here we deal with setting the appropriate state of the line, 1780 // and we start by looking at the hasSharers flag, and ignore the 1781 // cacheResponding flag (normally signalling dirty data) if the 1782 // packet has sharers, thus the line is never allocated as Owned 1783 // (dirty but not writable), and always ends up being either 1784 // Shared, Exclusive or Modified, see Packet::setCacheResponding 1785 // for more details 1786 if (!pkt->hasSharers()) { 1787 // we could get a writable line from memory (rather than a 1788 // cache) even in a read-only cache, note that we set this bit 1789 // even for a read-only cache, possibly revisit this decision 1790 blk->status |= BlkWritable; 1791 1792 // check if we got this via cache-to-cache transfer (i.e., from a 1793 // cache that had the block in Modified or Owned state) 1794 if (pkt->cacheResponding()) { 1795 // we got the block in Modified state, and invalidated the 1796 // owners copy 1797 blk->status |= BlkDirty; 1798 1799 chatty_assert(!isReadOnly, "Should never see dirty snoop response " 1800 "in read-only cache %s\n", name()); 1801 } 1802 } 1803 1804 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n", 1805 addr, is_secure ? "s" : "ns", old_state, blk->print()); 1806 1807 // if we got new data, copy it in (checking for a read response 1808 // and a response that has data is the same in the end) 1809 if (pkt->isRead()) { 1810 // sanity checks 1811 assert(pkt->hasData()); 1812 assert(pkt->getSize() == blkSize); 1813 1814 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize); 1815 } 1816 // We pay for fillLatency here. 1817 blk->whenReady = clockEdge() + fillLatency * clockPeriod() + 1818 pkt->payloadDelay; 1819 1820 return blk; 1821} 1822 1823 1824///////////////////////////////////////////////////// 1825// 1826// Snoop path: requests coming in from the memory side 1827// 1828///////////////////////////////////////////////////// 1829 1830void 1831Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data, 1832 bool already_copied, bool pending_inval) 1833{ 1834 // sanity check 1835 assert(req_pkt->isRequest()); 1836 assert(req_pkt->needsResponse()); 1837 1838 DPRINTF(Cache, "%s for %s addr %#llx size %d\n", __func__, 1839 req_pkt->cmdString(), req_pkt->getAddr(), req_pkt->getSize()); 1840 // timing-mode snoop responses require a new packet, unless we 1841 // already made a copy... 1842 PacketPtr pkt = req_pkt; 1843 if (!already_copied) 1844 // do not clear flags, and allocate space for data if the 1845 // packet needs it (the only packets that carry data are read 1846 // responses) 1847 pkt = new Packet(req_pkt, false, req_pkt->isRead()); 1848 1849 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() || 1850 pkt->hasSharers()); 1851 pkt->makeTimingResponse(); 1852 if (pkt->isRead()) { 1853 pkt->setDataFromBlock(blk_data, blkSize); 1854 } 1855 if (pkt->cmd == MemCmd::ReadResp && pending_inval) { 1856 // Assume we defer a response to a read from a far-away cache 1857 // A, then later defer a ReadExcl from a cache B on the same 1858 // bus as us. We'll assert cacheResponding in both cases, but 1859 // in the latter case cacheResponding will keep the 1860 // invalidation from reaching cache A. This special response 1861 // tells cache A that it gets the block to satisfy its read, 1862 // but must immediately invalidate it. 1863 pkt->cmd = MemCmd::ReadRespWithInvalidate; 1864 } 1865 // Here we consider forward_time, paying for just forward latency and 1866 // also charging the delay provided by the xbar. 1867 // forward_time is used as send_time in next allocateWriteBuffer(). 1868 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 1869 // Here we reset the timing of the packet. 1870 pkt->headerDelay = pkt->payloadDelay = 0; 1871 DPRINTF(CacheVerbose, 1872 "%s created response: %s addr %#llx size %d tick: %lu\n", 1873 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize(), 1874 forward_time); 1875 memSidePort->schedTimingSnoopResp(pkt, forward_time, true); 1876} 1877 1878uint32_t 1879Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing, 1880 bool is_deferred, bool pending_inval) 1881{ 1882 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__, 1883 pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 1884 // deferred snoops can only happen in timing mode 1885 assert(!(is_deferred && !is_timing)); 1886 // pending_inval only makes sense on deferred snoops 1887 assert(!(pending_inval && !is_deferred)); 1888 assert(pkt->isRequest()); 1889 1890 // the packet may get modified if we or a forwarded snooper 1891 // responds in atomic mode, so remember a few things about the 1892 // original packet up front 1893 bool invalidate = pkt->isInvalidate(); 1894 bool M5_VAR_USED needs_writable = pkt->needsWritable(); 1895 1896 // at the moment we could get an uncacheable write which does not 1897 // have the invalidate flag, and we need a suitable way of dealing 1898 // with this case 1899 panic_if(invalidate && pkt->req->isUncacheable(), 1900 "%s got an invalidating uncacheable snoop request %s to %#llx", 1901 name(), pkt->cmdString(), pkt->getAddr()); 1902 1903 uint32_t snoop_delay = 0; 1904 1905 if (forwardSnoops) { 1906 // first propagate snoop upward to see if anyone above us wants to 1907 // handle it. save & restore packet src since it will get 1908 // rewritten to be relative to cpu-side bus (if any) 1909 bool alreadyResponded = pkt->cacheResponding(); 1910 if (is_timing) { 1911 // copy the packet so that we can clear any flags before 1912 // forwarding it upwards, we also allocate data (passing 1913 // the pointer along in case of static data), in case 1914 // there is a snoop hit in upper levels 1915 Packet snoopPkt(pkt, true, true); 1916 snoopPkt.setExpressSnoop(); 1917 // the snoop packet does not need to wait any additional 1918 // time 1919 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0; 1920 cpuSidePort->sendTimingSnoopReq(&snoopPkt); 1921 1922 // add the header delay (including crossbar and snoop 1923 // delays) of the upward snoop to the snoop delay for this 1924 // cache 1925 snoop_delay += snoopPkt.headerDelay; 1926 1927 if (snoopPkt.cacheResponding()) { 1928 // cache-to-cache response from some upper cache 1929 assert(!alreadyResponded); 1930 pkt->setCacheResponding(); 1931 } 1932 // upstream cache has the block, or has an outstanding 1933 // MSHR, pass the flag on 1934 if (snoopPkt.hasSharers()) { 1935 pkt->setHasSharers(); 1936 } 1937 // If this request is a prefetch or clean evict and an upper level 1938 // signals block present, make sure to propagate the block 1939 // presence to the requester. 1940 if (snoopPkt.isBlockCached()) { 1941 pkt->setBlockCached(); 1942 } 1943 } else { 1944 cpuSidePort->sendAtomicSnoop(pkt); 1945 if (!alreadyResponded && pkt->cacheResponding()) { 1946 // cache-to-cache response from some upper cache: 1947 // forward response to original requester 1948 assert(pkt->isResponse()); 1949 } 1950 } 1951 } 1952 1953 if (!blk || !blk->isValid()) { 1954 DPRINTF(CacheVerbose, "%s snoop miss for %s addr %#llx size %d\n", 1955 __func__, pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 1956 return snoop_delay; 1957 } else { 1958 DPRINTF(Cache, "%s snoop hit for %s addr %#llx size %d, " 1959 "old state is %s\n", __func__, pkt->cmdString(), 1960 pkt->getAddr(), pkt->getSize(), blk->print()); 1961 } 1962 1963 chatty_assert(!(isReadOnly && blk->isDirty()), 1964 "Should never have a dirty block in a read-only cache %s\n", 1965 name()); 1966 1967 // We may end up modifying both the block state and the packet (if 1968 // we respond in atomic mode), so just figure out what to do now 1969 // and then do it later. If we find dirty data while snooping for 1970 // an invalidate, we don't need to send a response. The 1971 // invalidation itself is taken care of below. 1972 bool respond = blk->isDirty() && pkt->needsResponse() && 1973 pkt->cmd != MemCmd::InvalidateReq; 1974 bool have_writable = blk->isWritable(); 1975 1976 // Invalidate any prefetch's from below that would strip write permissions 1977 // MemCmd::HardPFReq is only observed by upstream caches. After missing 1978 // above and in it's own cache, a new MemCmd::ReadReq is created that 1979 // downstream caches observe. 1980 if (pkt->mustCheckAbove()) { 1981 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s from" 1982 " lower cache\n", pkt->getAddr(), pkt->cmdString()); 1983 pkt->setBlockCached(); 1984 return snoop_delay; 1985 } 1986 1987 if (pkt->isRead() && !invalidate) { 1988 // reading without requiring the line in a writable state 1989 assert(!needs_writable); 1990 pkt->setHasSharers(); 1991 1992 // if the requesting packet is uncacheable, retain the line in 1993 // the current state, otherwhise unset the writable flag, 1994 // which means we go from Modified to Owned (and will respond 1995 // below), remain in Owned (and will respond below), from 1996 // Exclusive to Shared, or remain in Shared 1997 if (!pkt->req->isUncacheable()) 1998 blk->status &= ~BlkWritable; 1999 } 2000 2001 if (respond) { 2002 // prevent anyone else from responding, cache as well as 2003 // memory, and also prevent any memory from even seeing the 2004 // request 2005 pkt->setCacheResponding(); 2006 if (have_writable) { 2007 // inform the cache hierarchy that this cache had the line 2008 // in the Modified state so that we avoid unnecessary 2009 // invalidations (see Packet::setResponderHadWritable) 2010 pkt->setResponderHadWritable(); 2011 2012 // in the case of an uncacheable request there is no point 2013 // in setting the responderHadWritable flag, but since the 2014 // recipient does not care there is no harm in doing so 2015 } else { 2016 // if the packet has needsWritable set we invalidate our 2017 // copy below and all other copies will be invalidates 2018 // through express snoops, and if needsWritable is not set 2019 // we already called setHasSharers above 2020 } 2021 2022 // if we are returning a writable and dirty (Modified) line, 2023 // we should be invalidating the line 2024 panic_if(!invalidate && !pkt->hasSharers(), 2025 "%s is passing a Modified line through %s to %#llx, " 2026 "but keeping the block", 2027 name(), pkt->cmdString(), pkt->getAddr()); 2028 2029 if (is_timing) { 2030 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval); 2031 } else { 2032 pkt->makeAtomicResponse(); 2033 // packets such as upgrades do not actually have any data 2034 // payload 2035 if (pkt->hasData()) 2036 pkt->setDataFromBlock(blk->data, blkSize); 2037 } 2038 } 2039 2040 if (!respond && is_timing && is_deferred) { 2041 // if it's a deferred timing snoop to which we are not 2042 // responding, then we've made a copy of both the request and 2043 // the packet, delete them here 2044 assert(pkt->needsResponse()); 2045 delete pkt->req; 2046 delete pkt; 2047 } 2048 2049 // Do this last in case it deallocates block data or something 2050 // like that 2051 if (invalidate) { 2052 invalidateBlock(blk); 2053 } 2054 2055 DPRINTF(Cache, "new state is %s\n", blk->print()); 2056 2057 return snoop_delay; 2058} 2059 2060 2061void 2062Cache::recvTimingSnoopReq(PacketPtr pkt) 2063{ 2064 DPRINTF(CacheVerbose, "%s for %s addr %#llx size %d\n", __func__, 2065 pkt->cmdString(), pkt->getAddr(), pkt->getSize()); 2066 2067 // Snoops shouldn't happen when bypassing caches 2068 assert(!system->bypassCaches()); 2069 2070 // no need to snoop requests that are not in range 2071 if (!inRange(pkt->getAddr())) { 2072 return; 2073 } 2074 2075 bool is_secure = pkt->isSecure(); 2076 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); 2077 2078 Addr blk_addr = blockAlign(pkt->getAddr()); 2079 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure); 2080 2081 // Update the latency cost of the snoop so that the crossbar can 2082 // account for it. Do not overwrite what other neighbouring caches 2083 // have already done, rather take the maximum. The update is 2084 // tentative, for cases where we return before an upward snoop 2085 // happens below. 2086 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, 2087 lookupLatency * clockPeriod()); 2088 2089 // Inform request(Prefetch, CleanEvict or Writeback) from below of 2090 // MSHR hit, set setBlockCached. 2091 if (mshr && pkt->mustCheckAbove()) { 2092 DPRINTF(Cache, "Setting block cached for %s from" 2093 "lower cache on mshr hit %#x\n", 2094 pkt->cmdString(), pkt->getAddr()); 2095 pkt->setBlockCached(); 2096 return; 2097 } 2098 2099 // Let the MSHR itself track the snoop and decide whether we want 2100 // to go ahead and do the regular cache snoop 2101 if (mshr && mshr->handleSnoop(pkt, order++)) { 2102 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)." 2103 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns", 2104 mshr->print()); 2105 2106 if (mshr->getNumTargets() > numTarget) 2107 warn("allocating bonus target for snoop"); //handle later 2108 return; 2109 } 2110 2111 //We also need to check the writeback buffers and handle those 2112 std::vector<MSHR *> writebacks; 2113 if (writeBuffer.findMatches(blk_addr, is_secure, writebacks)) { 2114 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n", 2115 pkt->getAddr(), is_secure ? "s" : "ns"); 2116 2117 // Look through writebacks for any cachable writes. 2118 // We should only ever find a single match 2119 assert(writebacks.size() == 1); 2120 MSHR *wb_entry = writebacks[0]; 2121 // Expect to see only Writebacks and/or CleanEvicts here, both of 2122 // which should not be generated for uncacheable data. 2123 assert(!wb_entry->isUncacheable()); 2124 // There should only be a single request responsible for generating 2125 // Writebacks/CleanEvicts. 2126 assert(wb_entry->getNumTargets() == 1); 2127 PacketPtr wb_pkt = wb_entry->getTarget()->pkt; 2128 assert(wb_pkt->isEviction()); 2129 2130 if (pkt->isEviction()) { 2131 // if the block is found in the write queue, set the BLOCK_CACHED 2132 // flag for Writeback/CleanEvict snoop. On return the snoop will 2133 // propagate the BLOCK_CACHED flag in Writeback packets and prevent 2134 // any CleanEvicts from travelling down the memory hierarchy. 2135 pkt->setBlockCached(); 2136 DPRINTF(Cache, "Squashing %s from lower cache on writequeue hit" 2137 " %#x\n", pkt->cmdString(), pkt->getAddr()); 2138 return; 2139 } 2140 2141 // conceptually writebacks are no different to other blocks in 2142 // this cache, so the behaviour is modelled after handleSnoop, 2143 // the difference being that instead of querying the block 2144 // state to determine if it is dirty and writable, we use the 2145 // command and fields of the writeback packet 2146 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty && 2147 pkt->needsResponse() && pkt->cmd != MemCmd::InvalidateReq; 2148 bool have_writable = !wb_pkt->hasSharers(); 2149 bool invalidate = pkt->isInvalidate(); 2150 2151 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) { 2152 assert(!pkt->needsWritable()); 2153 pkt->setHasSharers(); 2154 wb_pkt->setHasSharers(); 2155 } 2156 2157 if (respond) { 2158 pkt->setCacheResponding(); 2159 2160 if (have_writable) { 2161 pkt->setResponderHadWritable(); 2162 } 2163 2164 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(), 2165 false, false); 2166 } 2167 2168 if (invalidate) { 2169 // Invalidation trumps our writeback... discard here 2170 // Note: markInService will remove entry from writeback buffer. 2171 markInService(wb_entry, false); 2172 delete wb_pkt; 2173 } 2174 } 2175 2176 // If this was a shared writeback, there may still be 2177 // other shared copies above that require invalidation. 2178 // We could be more selective and return here if the 2179 // request is non-exclusive or if the writeback is 2180 // exclusive. 2181 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false); 2182 2183 // Override what we did when we first saw the snoop, as we now 2184 // also have the cost of the upwards snoops to account for 2185 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay + 2186 lookupLatency * clockPeriod()); 2187} 2188 2189bool 2190Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt) 2191{ 2192 // Express snoop responses from master to slave, e.g., from L1 to L2 2193 cache->recvTimingSnoopResp(pkt); 2194 return true; 2195} 2196 2197Tick 2198Cache::recvAtomicSnoop(PacketPtr pkt) 2199{ 2200 // Snoops shouldn't happen when bypassing caches 2201 assert(!system->bypassCaches()); 2202 2203 // no need to snoop requests that are not in range. 2204 if (!inRange(pkt->getAddr())) { 2205 return 0; 2206 } 2207 2208 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); 2209 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false); 2210 return snoop_delay + lookupLatency * clockPeriod(); 2211} 2212 2213 2214MSHR * 2215Cache::getNextMSHR() 2216{ 2217 // Check both MSHR queue and write buffer for potential requests, 2218 // note that null does not mean there is no request, it could 2219 // simply be that it is not ready 2220 MSHR *miss_mshr = mshrQueue.getNextMSHR(); 2221 MSHR *write_mshr = writeBuffer.getNextMSHR(); 2222 2223 // If we got a write buffer request ready, first priority is a 2224 // full write buffer, otherwhise we favour the miss requests 2225 if (write_mshr && 2226 ((writeBuffer.isFull() && writeBuffer.inServiceEntries == 0) || 2227 !miss_mshr)) { 2228 // need to search MSHR queue for conflicting earlier miss. 2229 MSHR *conflict_mshr = 2230 mshrQueue.findPending(write_mshr->blkAddr, 2231 write_mshr->isSecure); 2232 2233 if (conflict_mshr && conflict_mshr->order < write_mshr->order) { 2234 // Service misses in order until conflict is cleared. 2235 return conflict_mshr; 2236 2237 // @todo Note that we ignore the ready time of the conflict here 2238 } 2239 2240 // No conflicts; issue write 2241 return write_mshr; 2242 } else if (miss_mshr) { 2243 // need to check for conflicting earlier writeback 2244 MSHR *conflict_mshr = 2245 writeBuffer.findPending(miss_mshr->blkAddr, 2246 miss_mshr->isSecure); 2247 if (conflict_mshr) { 2248 // not sure why we don't check order here... it was in the 2249 // original code but commented out. 2250 2251 // The only way this happens is if we are 2252 // doing a write and we didn't have permissions 2253 // then subsequently saw a writeback (owned got evicted) 2254 // We need to make sure to perform the writeback first 2255 // To preserve the dirty data, then we can issue the write 2256 2257 // should we return write_mshr here instead? I.e. do we 2258 // have to flush writes in order? I don't think so... not 2259 // for Alpha anyway. Maybe for x86? 2260 return conflict_mshr; 2261 2262 // @todo Note that we ignore the ready time of the conflict here 2263 } 2264 2265 // No conflicts; issue read 2266 return miss_mshr; 2267 } 2268 2269 // fall through... no pending requests. Try a prefetch. 2270 assert(!miss_mshr && !write_mshr); 2271 if (prefetcher && mshrQueue.canPrefetch()) { 2272 // If we have a miss queue slot, we can try a prefetch 2273 PacketPtr pkt = prefetcher->getPacket(); 2274 if (pkt) { 2275 Addr pf_addr = blockAlign(pkt->getAddr()); 2276 if (!tags->findBlock(pf_addr, pkt->isSecure()) && 2277 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) && 2278 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) { 2279 // Update statistic on number of prefetches issued 2280 // (hwpf_mshr_misses) 2281 assert(pkt->req->masterId() < system->maxMasters()); 2282 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++; 2283 2284 // allocate an MSHR and return it, note 2285 // that we send the packet straight away, so do not 2286 // schedule the send 2287 return allocateMissBuffer(pkt, curTick(), false); 2288 } else { 2289 // free the request and packet 2290 delete pkt->req; 2291 delete pkt; 2292 } 2293 } 2294 } 2295 2296 return NULL; 2297} 2298 2299bool 2300Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const 2301{ 2302 if (!forwardSnoops) 2303 return false; 2304 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and 2305 // Writeback snoops into upper level caches to check for copies of the 2306 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict 2307 // packet, the cache can inform the crossbar below of presence or absence 2308 // of the block. 2309 if (is_timing) { 2310 Packet snoop_pkt(pkt, true, false); 2311 snoop_pkt.setExpressSnoop(); 2312 // Assert that packet is either Writeback or CleanEvict and not a 2313 // prefetch request because prefetch requests need an MSHR and may 2314 // generate a snoop response. 2315 assert(pkt->isEviction()); 2316 snoop_pkt.senderState = NULL; 2317 cpuSidePort->sendTimingSnoopReq(&snoop_pkt); 2318 // Writeback/CleanEvict snoops do not generate a snoop response. 2319 assert(!(snoop_pkt.cacheResponding())); 2320 return snoop_pkt.isBlockCached(); 2321 } else { 2322 cpuSidePort->sendAtomicSnoop(pkt); 2323 return pkt->isBlockCached(); 2324 } 2325} 2326 2327PacketPtr 2328Cache::getTimingPacket() 2329{ 2330 MSHR *mshr = getNextMSHR(); 2331 2332 if (mshr == NULL) { 2333 return NULL; 2334 } 2335 2336 // use request from 1st target 2337 PacketPtr tgt_pkt = mshr->getTarget()->pkt; 2338 PacketPtr pkt = NULL; 2339 2340 DPRINTF(CachePort, "%s %s for addr %#llx size %d\n", __func__, 2341 tgt_pkt->cmdString(), tgt_pkt->getAddr(), tgt_pkt->getSize()); 2342 2343 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure); 2344 2345 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) { 2346 // We need to check the caches above us to verify that 2347 // they don't have a copy of this block in the dirty state 2348 // at the moment. Without this check we could get a stale 2349 // copy from memory that might get used in place of the 2350 // dirty one. 2351 Packet snoop_pkt(tgt_pkt, true, false); 2352 snoop_pkt.setExpressSnoop(); 2353 // We are sending this packet upwards, but if it hits we will 2354 // get a snoop response that we end up treating just like a 2355 // normal response, hence it needs the MSHR as its sender 2356 // state 2357 snoop_pkt.senderState = mshr; 2358 cpuSidePort->sendTimingSnoopReq(&snoop_pkt); 2359 2360 // Check to see if the prefetch was squashed by an upper cache (to 2361 // prevent us from grabbing the line) or if a Check to see if a 2362 // writeback arrived between the time the prefetch was placed in 2363 // the MSHRs and when it was selected to be sent or if the 2364 // prefetch was squashed by an upper cache. 2365 2366 // It is important to check cacheResponding before 2367 // prefetchSquashed. If another cache has committed to 2368 // responding, it will be sending a dirty response which will 2369 // arrive at the MSHR allocated for this request. Checking the 2370 // prefetchSquash first may result in the MSHR being 2371 // prematurely deallocated. 2372 if (snoop_pkt.cacheResponding()) { 2373 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req); 2374 assert(r.second); 2375 2376 // if we are getting a snoop response with no sharers it 2377 // will be allocated as Modified 2378 bool pending_modified_resp = !snoop_pkt.hasSharers(); 2379 markInService(mshr, pending_modified_resp); 2380 2381 DPRINTF(Cache, "Upward snoop of prefetch for addr" 2382 " %#x (%s) hit\n", 2383 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns"); 2384 return NULL; 2385 } 2386 2387 if (snoop_pkt.isBlockCached() || blk != NULL) { 2388 DPRINTF(Cache, "Block present, prefetch squashed by cache. " 2389 "Deallocating mshr target %#x.\n", 2390 mshr->blkAddr); 2391 // Deallocate the mshr target 2392 if (mshr->queue->forceDeallocateTarget(mshr)) { 2393 // Clear block if this deallocation resulted freed an 2394 // mshr when all had previously been utilized 2395 clearBlocked((BlockedCause)(mshr->queue->index)); 2396 } 2397 return NULL; 2398 } 2399 } 2400 2401 if (mshr->isForwardNoResponse()) { 2402 // no response expected, just forward packet as it is 2403 assert(tags->findBlock(mshr->blkAddr, mshr->isSecure) == NULL); 2404 pkt = tgt_pkt; 2405 } else { 2406 pkt = getBusPacket(tgt_pkt, blk, mshr->needsWritable()); 2407 2408 mshr->isForward = (pkt == NULL); 2409 2410 if (mshr->isForward) { 2411 // not a cache block request, but a response is expected 2412 // make copy of current packet to forward, keep current 2413 // copy for response handling 2414 pkt = new Packet(tgt_pkt, false, true); 2415 if (pkt->isWrite()) { 2416 pkt->setData(tgt_pkt->getConstPtr<uint8_t>()); 2417 } 2418 } 2419 } 2420 2421 assert(pkt != NULL); 2422 // play it safe and append (rather than set) the sender state, as 2423 // forwarded packets may already have existing state 2424 pkt->pushSenderState(mshr); 2425 return pkt; 2426} 2427 2428 2429Tick 2430Cache::nextMSHRReadyTime() const 2431{ 2432 Tick nextReady = std::min(mshrQueue.nextMSHRReadyTime(), 2433 writeBuffer.nextMSHRReadyTime()); 2434 2435 // Don't signal prefetch ready time if no MSHRs available 2436 // Will signal once enoguh MSHRs are deallocated 2437 if (prefetcher && mshrQueue.canPrefetch()) { 2438 nextReady = std::min(nextReady, 2439 prefetcher->nextPrefetchReadyTime()); 2440 } 2441 2442 return nextReady; 2443} 2444 2445void 2446Cache::serialize(CheckpointOut &cp) const 2447{ 2448 bool dirty(isDirty()); 2449 2450 if (dirty) { 2451 warn("*** The cache still contains dirty data. ***\n"); 2452 warn(" Make sure to drain the system using the correct flags.\n"); 2453 warn(" This checkpoint will not restore correctly and dirty data in " 2454 "the cache will be lost!\n"); 2455 } 2456 2457 // Since we don't checkpoint the data in the cache, any dirty data 2458 // will be lost when restoring from a checkpoint of a system that 2459 // wasn't drained properly. Flag the checkpoint as invalid if the 2460 // cache contains dirty data. 2461 bool bad_checkpoint(dirty); 2462 SERIALIZE_SCALAR(bad_checkpoint); 2463} 2464 2465void 2466Cache::unserialize(CheckpointIn &cp) 2467{ 2468 bool bad_checkpoint; 2469 UNSERIALIZE_SCALAR(bad_checkpoint); 2470 if (bad_checkpoint) { 2471 fatal("Restoring from checkpoints with dirty caches is not supported " 2472 "in the classic memory system. Please remove any caches or " 2473 " drain them properly before taking checkpoints.\n"); 2474 } 2475} 2476 2477/////////////// 2478// 2479// CpuSidePort 2480// 2481/////////////// 2482 2483AddrRangeList 2484Cache::CpuSidePort::getAddrRanges() const 2485{ 2486 return cache->getAddrRanges(); 2487} 2488 2489bool 2490Cache::CpuSidePort::recvTimingReq(PacketPtr pkt) 2491{ 2492 assert(!cache->system->bypassCaches()); 2493 2494 bool success = false; 2495 2496 // always let packets through if an upstream cache has committed 2497 // to responding, even if blocked (we should technically look at 2498 // the isExpressSnoop flag, but it is set by the cache itself, and 2499 // consequently we have to rely on the cacheResponding flag) 2500 if (pkt->cacheResponding()) { 2501 // do not change the current retry state 2502 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt); 2503 assert(bypass_success); 2504 return true; 2505 } else if (blocked || mustSendRetry) { 2506 // either already committed to send a retry, or blocked 2507 success = false; 2508 } else { 2509 // pass it on to the cache, and let the cache decide if we 2510 // have to retry or not 2511 success = cache->recvTimingReq(pkt); 2512 } 2513 2514 // remember if we have to retry 2515 mustSendRetry = !success; 2516 return success; 2517} 2518 2519Tick 2520Cache::CpuSidePort::recvAtomic(PacketPtr pkt) 2521{ 2522 return cache->recvAtomic(pkt); 2523} 2524 2525void 2526Cache::CpuSidePort::recvFunctional(PacketPtr pkt) 2527{ 2528 // functional request 2529 cache->functionalAccess(pkt, true); 2530} 2531 2532Cache:: 2533CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache, 2534 const std::string &_label) 2535 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache) 2536{ 2537} 2538 2539Cache* 2540CacheParams::create() 2541{ 2542 assert(tags); 2543 2544 return new Cache(this); 2545} 2546/////////////// 2547// 2548// MemSidePort 2549// 2550/////////////// 2551 2552bool 2553Cache::MemSidePort::recvTimingResp(PacketPtr pkt) 2554{ 2555 cache->recvTimingResp(pkt); 2556 return true; 2557} 2558 2559// Express snooping requests to memside port 2560void 2561Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt) 2562{ 2563 // handle snooping requests 2564 cache->recvTimingSnoopReq(pkt); 2565} 2566 2567Tick 2568Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt) 2569{ 2570 return cache->recvAtomicSnoop(pkt); 2571} 2572 2573void 2574Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt) 2575{ 2576 // functional snoop (note that in contrast to atomic we don't have 2577 // a specific functionalSnoop method, as they have the same 2578 // behaviour regardless) 2579 cache->functionalAccess(pkt, false); 2580} 2581 2582void 2583Cache::CacheReqPacketQueue::sendDeferredPacket() 2584{ 2585 // sanity check 2586 assert(!waitingOnRetry); 2587 2588 // there should never be any deferred request packets in the 2589 // queue, instead we resly on the cache to provide the packets 2590 // from the MSHR queue or write queue 2591 assert(deferredPacketReadyTime() == MaxTick); 2592 2593 // check for request packets (requests & writebacks) 2594 PacketPtr pkt = cache.getTimingPacket(); 2595 if (pkt == NULL) { 2596 // can happen if e.g. we attempt a writeback and fail, but 2597 // before the retry, the writeback is eliminated because 2598 // we snoop another cache's ReadEx. 2599 } else { 2600 MSHR *mshr = dynamic_cast<MSHR*>(pkt->senderState); 2601 // in most cases getTimingPacket allocates a new packet, and 2602 // we must delete it unless it is successfully sent 2603 bool delete_pkt = !mshr->isForwardNoResponse(); 2604 2605 // let our snoop responses go first if there are responses to 2606 // the same addresses we are about to writeback, note that 2607 // this creates a dependency between requests and snoop 2608 // responses, but that should not be a problem since there is 2609 // a chain already and the key is that the snoop responses can 2610 // sink unconditionally 2611 if (snoopRespQueue.hasAddr(pkt->getAddr())) { 2612 DPRINTF(CachePort, "Waiting for snoop response to be sent\n"); 2613 Tick when = snoopRespQueue.deferredPacketReadyTime(); 2614 schedSendEvent(when); 2615 2616 if (delete_pkt) 2617 delete pkt; 2618 2619 return; 2620 } 2621 2622 2623 waitingOnRetry = !masterPort.sendTimingReq(pkt); 2624 2625 if (waitingOnRetry) { 2626 DPRINTF(CachePort, "now waiting on a retry\n"); 2627 if (delete_pkt) { 2628 // we are awaiting a retry, but we 2629 // delete the packet and will be creating a new packet 2630 // when we get the opportunity 2631 delete pkt; 2632 } 2633 // note that we have now masked any requestBus and 2634 // schedSendEvent (we will wait for a retry before 2635 // doing anything), and this is so even if we do not 2636 // care about this packet and might override it before 2637 // it gets retried 2638 } else { 2639 // As part of the call to sendTimingReq the packet is 2640 // forwarded to all neighbouring caches (and any caches 2641 // above them) as a snoop. Thus at this point we know if 2642 // any of the neighbouring caches are responding, and if 2643 // so, we know it is dirty, and we can determine if it is 2644 // being passed as Modified, making our MSHR the ordering 2645 // point 2646 bool pending_modified_resp = !pkt->hasSharers() && 2647 pkt->cacheResponding(); 2648 2649 cache.markInService(mshr, pending_modified_resp); 2650 } 2651 } 2652 2653 // if we succeeded and are not waiting for a retry, schedule the 2654 // next send considering when the next MSHR is ready, note that 2655 // snoop responses have their own packet queue and thus schedule 2656 // their own events 2657 if (!waitingOnRetry) { 2658 schedSendEvent(cache.nextMSHRReadyTime()); 2659 } 2660} 2661 2662Cache:: 2663MemSidePort::MemSidePort(const std::string &_name, Cache *_cache, 2664 const std::string &_label) 2665 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue), 2666 _reqQueue(*_cache, *this, _snoopRespQueue, _label), 2667 _snoopRespQueue(*_cache, *this, _label), cache(_cache) 2668{ 2669} 2670