cache.cc revision 13350
111420Sdavid.guillen@arm.com/* 211420Sdavid.guillen@arm.com * Copyright (c) 2010-2018 ARM Limited 311420Sdavid.guillen@arm.com * All rights reserved. 411420Sdavid.guillen@arm.com * 511420Sdavid.guillen@arm.com * The license below extends only to copyright in the software and shall 611420Sdavid.guillen@arm.com * not be construed as granting a license to any other intellectual 711420Sdavid.guillen@arm.com * property including but not limited to intellectual property relating 811420Sdavid.guillen@arm.com * to a hardware implementation of the functionality of the software 911420Sdavid.guillen@arm.com * licensed hereunder. You may use the software subject to the license 1011420Sdavid.guillen@arm.com * terms below provided that you ensure that this notice is replicated 1111420Sdavid.guillen@arm.com * unmodified and in its entirety in all distributions of the software, 1211420Sdavid.guillen@arm.com * modified or unmodified, in source code or in binary form. 1311420Sdavid.guillen@arm.com * 1411420Sdavid.guillen@arm.com * Copyright (c) 2002-2005 The Regents of The University of Michigan 1511420Sdavid.guillen@arm.com * Copyright (c) 2010,2015 Advanced Micro Devices, Inc. 1611420Sdavid.guillen@arm.com * All rights reserved. 1711420Sdavid.guillen@arm.com * 1811420Sdavid.guillen@arm.com * Redistribution and use in source and binary forms, with or without 1911420Sdavid.guillen@arm.com * modification, are permitted provided that the following conditions are 2011420Sdavid.guillen@arm.com * met: redistributions of source code must retain the above copyright 2111420Sdavid.guillen@arm.com * notice, this list of conditions and the following disclaimer; 2211420Sdavid.guillen@arm.com * redistributions in binary form must reproduce the above copyright 2311420Sdavid.guillen@arm.com * notice, this list of conditions and the following disclaimer in the 2411420Sdavid.guillen@arm.com * documentation and/or other materials provided with the distribution; 2511420Sdavid.guillen@arm.com * neither the name of the copyright holders nor the names of its 2611420Sdavid.guillen@arm.com * contributors may be used to endorse or promote products derived from 2711420Sdavid.guillen@arm.com * this software without specific prior written permission. 2811420Sdavid.guillen@arm.com * 2911420Sdavid.guillen@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 3011420Sdavid.guillen@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3111420Sdavid.guillen@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3211420Sdavid.guillen@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3311420Sdavid.guillen@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3411420Sdavid.guillen@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3511420Sdavid.guillen@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3611420Sdavid.guillen@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3711420Sdavid.guillen@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3811420Sdavid.guillen@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3911420Sdavid.guillen@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4011420Sdavid.guillen@arm.com * 4111420Sdavid.guillen@arm.com * Authors: Erik Hallnor 4211420Sdavid.guillen@arm.com * Dave Greene 4311420Sdavid.guillen@arm.com * Nathan Binkert 4411420Sdavid.guillen@arm.com * Steve Reinhardt 4511420Sdavid.guillen@arm.com * Ron Dreslinski 4611420Sdavid.guillen@arm.com * Andreas Sandberg 4711420Sdavid.guillen@arm.com * Nikos Nikoleris 4811420Sdavid.guillen@arm.com */ 4911420Sdavid.guillen@arm.com 5011420Sdavid.guillen@arm.com/** 5111420Sdavid.guillen@arm.com * @file 5211420Sdavid.guillen@arm.com * Cache definitions. 5311420Sdavid.guillen@arm.com */ 5411420Sdavid.guillen@arm.com 5511420Sdavid.guillen@arm.com#include "mem/cache/cache.hh" 5611420Sdavid.guillen@arm.com 5711420Sdavid.guillen@arm.com#include <cassert> 5811420Sdavid.guillen@arm.com 5911420Sdavid.guillen@arm.com#include "base/compiler.hh" 6011420Sdavid.guillen@arm.com#include "base/logging.hh" 6111420Sdavid.guillen@arm.com#include "base/trace.hh" 6211420Sdavid.guillen@arm.com#include "base/types.hh" 6311420Sdavid.guillen@arm.com#include "debug/Cache.hh" 6411420Sdavid.guillen@arm.com#include "debug/CacheTags.hh" 6511420Sdavid.guillen@arm.com#include "debug/CacheVerbose.hh" 6611420Sdavid.guillen@arm.com#include "enums/Clusivity.hh" 6711420Sdavid.guillen@arm.com#include "mem/cache/cache_blk.hh" 6811420Sdavid.guillen@arm.com#include "mem/cache/mshr.hh" 6911420Sdavid.guillen@arm.com#include "mem/cache/tags/base.hh" 7011420Sdavid.guillen@arm.com#include "mem/cache/write_queue_entry.hh" 7111420Sdavid.guillen@arm.com#include "mem/request.hh" 7211420Sdavid.guillen@arm.com#include "params/Cache.hh" 7311420Sdavid.guillen@arm.com 7411420Sdavid.guillen@arm.comCache::Cache(const CacheParams *p) 7511420Sdavid.guillen@arm.com : BaseCache(p, p->system->cacheLineSize()), 7611420Sdavid.guillen@arm.com doFastWrites(true) 7711420Sdavid.guillen@arm.com{ 7811420Sdavid.guillen@arm.com} 7911420Sdavid.guillen@arm.com 8011420Sdavid.guillen@arm.comvoid 8111420Sdavid.guillen@arm.comCache::satisfyRequest(PacketPtr pkt, CacheBlk *blk, 8211420Sdavid.guillen@arm.com bool deferred_response, bool pending_downgrade) 8311420Sdavid.guillen@arm.com{ 8411420Sdavid.guillen@arm.com BaseCache::satisfyRequest(pkt, blk); 8511420Sdavid.guillen@arm.com 8611420Sdavid.guillen@arm.com if (pkt->isRead()) { 8711420Sdavid.guillen@arm.com // determine if this read is from a (coherent) cache or not 88 if (pkt->fromCache()) { 89 assert(pkt->getSize() == blkSize); 90 // special handling for coherent block requests from 91 // upper-level caches 92 if (pkt->needsWritable()) { 93 // sanity check 94 assert(pkt->cmd == MemCmd::ReadExReq || 95 pkt->cmd == MemCmd::SCUpgradeFailReq); 96 assert(!pkt->hasSharers()); 97 98 // if we have a dirty copy, make sure the recipient 99 // keeps it marked dirty (in the modified state) 100 if (blk->isDirty()) { 101 pkt->setCacheResponding(); 102 blk->status &= ~BlkDirty; 103 } 104 } else if (blk->isWritable() && !pending_downgrade && 105 !pkt->hasSharers() && 106 pkt->cmd != MemCmd::ReadCleanReq) { 107 // we can give the requester a writable copy on a read 108 // request if: 109 // - we have a writable copy at this level (& below) 110 // - we don't have a pending snoop from below 111 // signaling another read request 112 // - no other cache above has a copy (otherwise it 113 // would have set hasSharers flag when 114 // snooping the packet) 115 // - the read has explicitly asked for a clean 116 // copy of the line 117 if (blk->isDirty()) { 118 // special considerations if we're owner: 119 if (!deferred_response) { 120 // respond with the line in Modified state 121 // (cacheResponding set, hasSharers not set) 122 pkt->setCacheResponding(); 123 124 // if this cache is mostly inclusive, we 125 // keep the block in the Exclusive state, 126 // and pass it upwards as Modified 127 // (writable and dirty), hence we have 128 // multiple caches, all on the same path 129 // towards memory, all considering the 130 // same block writable, but only one 131 // considering it Modified 132 133 // we get away with multiple caches (on 134 // the same path to memory) considering 135 // the block writeable as we always enter 136 // the cache hierarchy through a cache, 137 // and first snoop upwards in all other 138 // branches 139 blk->status &= ~BlkDirty; 140 } else { 141 // if we're responding after our own miss, 142 // there's a window where the recipient didn't 143 // know it was getting ownership and may not 144 // have responded to snoops correctly, so we 145 // have to respond with a shared line 146 pkt->setHasSharers(); 147 } 148 } 149 } else { 150 // otherwise only respond with a shared copy 151 pkt->setHasSharers(); 152 } 153 } 154 } 155} 156 157///////////////////////////////////////////////////// 158// 159// Access path: requests coming in from the CPU side 160// 161///////////////////////////////////////////////////// 162 163bool 164Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, 165 PacketList &writebacks) 166{ 167 168 if (pkt->req->isUncacheable()) { 169 assert(pkt->isRequest()); 170 171 chatty_assert(!(isReadOnly && pkt->isWrite()), 172 "Should never see a write in a read-only cache %s\n", 173 name()); 174 175 DPRINTF(Cache, "%s for %s\n", __func__, pkt->print()); 176 177 // flush and invalidate any existing block 178 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure())); 179 if (old_blk && old_blk->isValid()) { 180 evictBlock(old_blk, writebacks); 181 } 182 183 blk = nullptr; 184 // lookupLatency is the latency in case the request is uncacheable. 185 lat = lookupLatency; 186 return false; 187 } 188 189 return BaseCache::access(pkt, blk, lat, writebacks); 190} 191 192void 193Cache::doWritebacks(PacketList& writebacks, Tick forward_time) 194{ 195 while (!writebacks.empty()) { 196 PacketPtr wbPkt = writebacks.front(); 197 // We use forwardLatency here because we are copying writebacks to 198 // write buffer. 199 200 // Call isCachedAbove for Writebacks, CleanEvicts and 201 // WriteCleans to discover if the block is cached above. 202 if (isCachedAbove(wbPkt)) { 203 if (wbPkt->cmd == MemCmd::CleanEvict) { 204 // Delete CleanEvict because cached copies exist above. The 205 // packet destructor will delete the request object because 206 // this is a non-snoop request packet which does not require a 207 // response. 208 delete wbPkt; 209 } else if (wbPkt->cmd == MemCmd::WritebackClean) { 210 // clean writeback, do not send since the block is 211 // still cached above 212 assert(writebackClean); 213 delete wbPkt; 214 } else { 215 assert(wbPkt->cmd == MemCmd::WritebackDirty || 216 wbPkt->cmd == MemCmd::WriteClean); 217 // Set BLOCK_CACHED flag in Writeback and send below, so that 218 // the Writeback does not reset the bit corresponding to this 219 // address in the snoop filter below. 220 wbPkt->setBlockCached(); 221 allocateWriteBuffer(wbPkt, forward_time); 222 } 223 } else { 224 // If the block is not cached above, send packet below. Both 225 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will 226 // reset the bit corresponding to this address in the snoop filter 227 // below. 228 allocateWriteBuffer(wbPkt, forward_time); 229 } 230 writebacks.pop_front(); 231 } 232} 233 234void 235Cache::doWritebacksAtomic(PacketList& writebacks) 236{ 237 while (!writebacks.empty()) { 238 PacketPtr wbPkt = writebacks.front(); 239 // Call isCachedAbove for both Writebacks and CleanEvicts. If 240 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks 241 // and discard CleanEvicts. 242 if (isCachedAbove(wbPkt, false)) { 243 if (wbPkt->cmd == MemCmd::WritebackDirty || 244 wbPkt->cmd == MemCmd::WriteClean) { 245 // Set BLOCK_CACHED flag in Writeback and send below, 246 // so that the Writeback does not reset the bit 247 // corresponding to this address in the snoop filter 248 // below. We can discard CleanEvicts because cached 249 // copies exist above. Atomic mode isCachedAbove 250 // modifies packet to set BLOCK_CACHED flag 251 memSidePort.sendAtomic(wbPkt); 252 } 253 } else { 254 // If the block is not cached above, send packet below. Both 255 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will 256 // reset the bit corresponding to this address in the snoop filter 257 // below. 258 memSidePort.sendAtomic(wbPkt); 259 } 260 writebacks.pop_front(); 261 // In case of CleanEvicts, the packet destructor will delete the 262 // request object because this is a non-snoop request packet which 263 // does not require a response. 264 delete wbPkt; 265 } 266} 267 268 269void 270Cache::recvTimingSnoopResp(PacketPtr pkt) 271{ 272 DPRINTF(Cache, "%s for %s\n", __func__, pkt->print()); 273 274 // determine if the response is from a snoop request we created 275 // (in which case it should be in the outstandingSnoop), or if we 276 // merely forwarded someone else's snoop request 277 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) == 278 outstandingSnoop.end(); 279 280 if (!forwardAsSnoop) { 281 // the packet came from this cache, so sink it here and do not 282 // forward it 283 assert(pkt->cmd == MemCmd::HardPFResp); 284 285 outstandingSnoop.erase(pkt->req); 286 287 DPRINTF(Cache, "Got prefetch response from above for addr " 288 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns"); 289 recvTimingResp(pkt); 290 return; 291 } 292 293 // forwardLatency is set here because there is a response from an 294 // upper level cache. 295 // To pay the delay that occurs if the packet comes from the bus, 296 // we charge also headerDelay. 297 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay; 298 // Reset the timing of the packet. 299 pkt->headerDelay = pkt->payloadDelay = 0; 300 memSidePort.schedTimingSnoopResp(pkt, snoop_resp_time); 301} 302 303void 304Cache::promoteWholeLineWrites(PacketPtr pkt) 305{ 306 // Cache line clearing instructions 307 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) && 308 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) { 309 pkt->cmd = MemCmd::WriteLineReq; 310 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n"); 311 } 312} 313 314void 315Cache::handleTimingReqHit(PacketPtr pkt, CacheBlk *blk, Tick request_time) 316{ 317 // should never be satisfying an uncacheable access as we 318 // flush and invalidate any existing block as part of the 319 // lookup 320 assert(!pkt->req->isUncacheable()); 321 322 BaseCache::handleTimingReqHit(pkt, blk, request_time); 323} 324 325void 326Cache::handleTimingReqMiss(PacketPtr pkt, CacheBlk *blk, Tick forward_time, 327 Tick request_time) 328{ 329 if (pkt->req->isUncacheable()) { 330 // ignore any existing MSHR if we are dealing with an 331 // uncacheable request 332 333 // should have flushed and have no valid block 334 assert(!blk || !blk->isValid()); 335 336 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++; 337 338 if (pkt->isWrite()) { 339 allocateWriteBuffer(pkt, forward_time); 340 } else { 341 assert(pkt->isRead()); 342 343 // uncacheable accesses always allocate a new MSHR 344 345 // Here we are using forward_time, modelling the latency of 346 // a miss (outbound) just as forwardLatency, neglecting the 347 // lookupLatency component. 348 allocateMissBuffer(pkt, forward_time); 349 } 350 351 return; 352 } 353 354 Addr blk_addr = pkt->getBlockAddr(blkSize); 355 356 MSHR *mshr = mshrQueue.findMatch(blk_addr, pkt->isSecure()); 357 358 // Software prefetch handling: 359 // To keep the core from waiting on data it won't look at 360 // anyway, send back a response with dummy data. Miss handling 361 // will continue asynchronously. Unfortunately, the core will 362 // insist upon freeing original Packet/Request, so we have to 363 // create a new pair with a different lifecycle. Note that this 364 // processing happens before any MSHR munging on the behalf of 365 // this request because this new Request will be the one stored 366 // into the MSHRs, not the original. 367 if (pkt->cmd.isSWPrefetch()) { 368 assert(pkt->needsResponse()); 369 assert(pkt->req->hasPaddr()); 370 assert(!pkt->req->isUncacheable()); 371 372 // There's no reason to add a prefetch as an additional target 373 // to an existing MSHR. If an outstanding request is already 374 // in progress, there is nothing for the prefetch to do. 375 // If this is the case, we don't even create a request at all. 376 PacketPtr pf = nullptr; 377 378 if (!mshr) { 379 // copy the request and create a new SoftPFReq packet 380 RequestPtr req = std::make_shared<Request>(pkt->req->getPaddr(), 381 pkt->req->getSize(), 382 pkt->req->getFlags(), 383 pkt->req->masterId()); 384 pf = new Packet(req, pkt->cmd); 385 pf->allocate(); 386 assert(pf->getAddr() == pkt->getAddr()); 387 assert(pf->getSize() == pkt->getSize()); 388 } 389 390 pkt->makeTimingResponse(); 391 392 // request_time is used here, taking into account lat and the delay 393 // charged if the packet comes from the xbar. 394 cpuSidePort.schedTimingResp(pkt, request_time, true); 395 396 // If an outstanding request is in progress (we found an 397 // MSHR) this is set to null 398 pkt = pf; 399 } 400 401 BaseCache::handleTimingReqMiss(pkt, mshr, blk, forward_time, request_time); 402} 403 404void 405Cache::recvTimingReq(PacketPtr pkt) 406{ 407 DPRINTF(CacheTags, "%s tags:\n%s\n", __func__, tags->print()); 408 409 promoteWholeLineWrites(pkt); 410 411 if (pkt->cacheResponding()) { 412 // a cache above us (but not where the packet came from) is 413 // responding to the request, in other words it has the line 414 // in Modified or Owned state 415 DPRINTF(Cache, "Cache above responding to %s: not responding\n", 416 pkt->print()); 417 418 // if the packet needs the block to be writable, and the cache 419 // that has promised to respond (setting the cache responding 420 // flag) is not providing writable (it is in Owned rather than 421 // the Modified state), we know that there may be other Shared 422 // copies in the system; go out and invalidate them all 423 assert(pkt->needsWritable() && !pkt->responderHadWritable()); 424 425 // an upstream cache that had the line in Owned state 426 // (dirty, but not writable), is responding and thus 427 // transferring the dirty line from one branch of the 428 // cache hierarchy to another 429 430 // send out an express snoop and invalidate all other 431 // copies (snooping a packet that needs writable is the 432 // same as an invalidation), thus turning the Owned line 433 // into a Modified line, note that we don't invalidate the 434 // block in the current cache or any other cache on the 435 // path to memory 436 437 // create a downstream express snoop with cleared packet 438 // flags, there is no need to allocate any data as the 439 // packet is merely used to co-ordinate state transitions 440 Packet *snoop_pkt = new Packet(pkt, true, false); 441 442 // also reset the bus time that the original packet has 443 // not yet paid for 444 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0; 445 446 // make this an instantaneous express snoop, and let the 447 // other caches in the system know that the another cache 448 // is responding, because we have found the authorative 449 // copy (Modified or Owned) that will supply the right 450 // data 451 snoop_pkt->setExpressSnoop(); 452 snoop_pkt->setCacheResponding(); 453 454 // this express snoop travels towards the memory, and at 455 // every crossbar it is snooped upwards thus reaching 456 // every cache in the system 457 bool M5_VAR_USED success = memSidePort.sendTimingReq(snoop_pkt); 458 // express snoops always succeed 459 assert(success); 460 461 // main memory will delete the snoop packet 462 463 // queue for deletion, as opposed to immediate deletion, as 464 // the sending cache is still relying on the packet 465 pendingDelete.reset(pkt); 466 467 // no need to take any further action in this particular cache 468 // as an upstram cache has already committed to responding, 469 // and we have already sent out any express snoops in the 470 // section above to ensure all other copies in the system are 471 // invalidated 472 return; 473 } 474 475 BaseCache::recvTimingReq(pkt); 476} 477 478PacketPtr 479Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, 480 bool needsWritable, 481 bool is_whole_line_write) const 482{ 483 // should never see evictions here 484 assert(!cpu_pkt->isEviction()); 485 486 bool blkValid = blk && blk->isValid(); 487 488 if (cpu_pkt->req->isUncacheable() || 489 (!blkValid && cpu_pkt->isUpgrade()) || 490 cpu_pkt->cmd == MemCmd::InvalidateReq || cpu_pkt->isClean()) { 491 // uncacheable requests and upgrades from upper-level caches 492 // that missed completely just go through as is 493 return nullptr; 494 } 495 496 assert(cpu_pkt->needsResponse()); 497 498 MemCmd cmd; 499 // @TODO make useUpgrades a parameter. 500 // Note that ownership protocols require upgrade, otherwise a 501 // write miss on a shared owned block will generate a ReadExcl, 502 // which will clobber the owned copy. 503 const bool useUpgrades = true; 504 assert(cpu_pkt->cmd != MemCmd::WriteLineReq || is_whole_line_write); 505 if (is_whole_line_write) { 506 assert(!blkValid || !blk->isWritable()); 507 // forward as invalidate to all other caches, this gives us 508 // the line in Exclusive state, and invalidates all other 509 // copies 510 cmd = MemCmd::InvalidateReq; 511 } else if (blkValid && useUpgrades) { 512 // only reason to be here is that blk is read only and we need 513 // it to be writable 514 assert(needsWritable); 515 assert(!blk->isWritable()); 516 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq; 517 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq || 518 cpu_pkt->cmd == MemCmd::StoreCondFailReq) { 519 // Even though this SC will fail, we still need to send out the 520 // request and get the data to supply it to other snoopers in the case 521 // where the determination the StoreCond fails is delayed due to 522 // all caches not being on the same local bus. 523 cmd = MemCmd::SCUpgradeFailReq; 524 } else { 525 // block is invalid 526 527 // If the request does not need a writable there are two cases 528 // where we need to ensure the response will not fetch the 529 // block in dirty state: 530 // * this cache is read only and it does not perform 531 // writebacks, 532 // * this cache is mostly exclusive and will not fill (since 533 // it does not fill it will have to writeback the dirty data 534 // immediately which generates uneccesary writebacks). 535 bool force_clean_rsp = isReadOnly || clusivity == Enums::mostly_excl; 536 cmd = needsWritable ? MemCmd::ReadExReq : 537 (force_clean_rsp ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq); 538 } 539 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize); 540 541 // if there are upstream caches that have already marked the 542 // packet as having sharers (not passing writable), pass that info 543 // downstream 544 if (cpu_pkt->hasSharers() && !needsWritable) { 545 // note that cpu_pkt may have spent a considerable time in the 546 // MSHR queue and that the information could possibly be out 547 // of date, however, there is no harm in conservatively 548 // assuming the block has sharers 549 pkt->setHasSharers(); 550 DPRINTF(Cache, "%s: passing hasSharers from %s to %s\n", 551 __func__, cpu_pkt->print(), pkt->print()); 552 } 553 554 // the packet should be block aligned 555 assert(pkt->getAddr() == pkt->getBlockAddr(blkSize)); 556 557 pkt->allocate(); 558 DPRINTF(Cache, "%s: created %s from %s\n", __func__, pkt->print(), 559 cpu_pkt->print()); 560 return pkt; 561} 562 563 564Cycles 565Cache::handleAtomicReqMiss(PacketPtr pkt, CacheBlk *&blk, 566 PacketList &writebacks) 567{ 568 // deal with the packets that go through the write path of 569 // the cache, i.e. any evictions and writes 570 if (pkt->isEviction() || pkt->cmd == MemCmd::WriteClean || 571 (pkt->req->isUncacheable() && pkt->isWrite())) { 572 Cycles latency = ticksToCycles(memSidePort.sendAtomic(pkt)); 573 574 // at this point, if the request was an uncacheable write 575 // request, it has been satisfied by a memory below and the 576 // packet carries the response back 577 assert(!(pkt->req->isUncacheable() && pkt->isWrite()) || 578 pkt->isResponse()); 579 580 return latency; 581 } 582 583 // only misses left 584 585 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable(), 586 pkt->isWholeLineWrite(blkSize)); 587 588 bool is_forward = (bus_pkt == nullptr); 589 590 if (is_forward) { 591 // just forwarding the same request to the next level 592 // no local cache operation involved 593 bus_pkt = pkt; 594 } 595 596 DPRINTF(Cache, "%s: Sending an atomic %s\n", __func__, 597 bus_pkt->print()); 598 599#if TRACING_ON 600 CacheBlk::State old_state = blk ? blk->status : 0; 601#endif 602 603 Cycles latency = ticksToCycles(memSidePort.sendAtomic(bus_pkt)); 604 605 bool is_invalidate = bus_pkt->isInvalidate(); 606 607 // We are now dealing with the response handling 608 DPRINTF(Cache, "%s: Receive response: %s in state %i\n", __func__, 609 bus_pkt->print(), old_state); 610 611 // If packet was a forward, the response (if any) is already 612 // in place in the bus_pkt == pkt structure, so we don't need 613 // to do anything. Otherwise, use the separate bus_pkt to 614 // generate response to pkt and then delete it. 615 if (!is_forward) { 616 if (pkt->needsResponse()) { 617 assert(bus_pkt->isResponse()); 618 if (bus_pkt->isError()) { 619 pkt->makeAtomicResponse(); 620 pkt->copyError(bus_pkt); 621 } else if (pkt->isWholeLineWrite(blkSize)) { 622 // note the use of pkt, not bus_pkt here. 623 624 // write-line request to the cache that promoted 625 // the write to a whole line 626 blk = handleFill(bus_pkt, blk, writebacks, 627 allocOnFill(pkt->cmd)); 628 assert(blk != NULL); 629 is_invalidate = false; 630 satisfyRequest(pkt, blk); 631 } else if (bus_pkt->isRead() || 632 bus_pkt->cmd == MemCmd::UpgradeResp) { 633 // we're updating cache state to allow us to 634 // satisfy the upstream request from the cache 635 blk = handleFill(bus_pkt, blk, writebacks, 636 allocOnFill(pkt->cmd)); 637 satisfyRequest(pkt, blk); 638 maintainClusivity(pkt->fromCache(), blk); 639 } else { 640 // we're satisfying the upstream request without 641 // modifying cache state, e.g., a write-through 642 pkt->makeAtomicResponse(); 643 } 644 } 645 delete bus_pkt; 646 } 647 648 if (is_invalidate && blk && blk->isValid()) { 649 invalidateBlock(blk); 650 } 651 652 return latency; 653} 654 655Tick 656Cache::recvAtomic(PacketPtr pkt) 657{ 658 promoteWholeLineWrites(pkt); 659 660 return BaseCache::recvAtomic(pkt); 661} 662 663 664///////////////////////////////////////////////////// 665// 666// Response handling: responses from the memory side 667// 668///////////////////////////////////////////////////// 669 670 671void 672Cache::serviceMSHRTargets(MSHR *mshr, const PacketPtr pkt, CacheBlk *blk, 673 PacketList &writebacks) 674{ 675 MSHR::Target *initial_tgt = mshr->getTarget(); 676 // First offset for critical word first calculations 677 const int initial_offset = initial_tgt->pkt->getOffset(blkSize); 678 679 const bool is_error = pkt->isError(); 680 // allow invalidation responses originating from write-line 681 // requests to be discarded 682 bool is_invalidate = pkt->isInvalidate() && 683 !mshr->wasWholeLineWrite; 684 685 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt); 686 for (auto &target: targets) { 687 Packet *tgt_pkt = target.pkt; 688 switch (target.source) { 689 case MSHR::Target::FromCPU: 690 Tick completion_time; 691 // Here we charge on completion_time the delay of the xbar if the 692 // packet comes from it, charged on headerDelay. 693 completion_time = pkt->headerDelay; 694 695 // Software prefetch handling for cache closest to core 696 if (tgt_pkt->cmd.isSWPrefetch()) { 697 // a software prefetch would have already been ack'd 698 // immediately with dummy data so the core would be able to 699 // retire it. This request completes right here, so we 700 // deallocate it. 701 delete tgt_pkt; 702 break; // skip response 703 } 704 705 // unlike the other packet flows, where data is found in other 706 // caches or memory and brought back, write-line requests always 707 // have the data right away, so the above check for "is fill?" 708 // cannot actually be determined until examining the stored MSHR 709 // state. We "catch up" with that logic here, which is duplicated 710 // from above. 711 if (tgt_pkt->cmd == MemCmd::WriteLineReq) { 712 assert(!is_error); 713 assert(blk); 714 assert(blk->isWritable()); 715 } 716 717 if (blk && blk->isValid() && !mshr->isForward) { 718 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade()); 719 720 // How many bytes past the first request is this one 721 int transfer_offset = 722 tgt_pkt->getOffset(blkSize) - initial_offset; 723 if (transfer_offset < 0) { 724 transfer_offset += blkSize; 725 } 726 727 // If not critical word (offset) return payloadDelay. 728 // responseLatency is the latency of the return path 729 // from lower level caches/memory to an upper level cache or 730 // the core. 731 completion_time += clockEdge(responseLatency) + 732 (transfer_offset ? pkt->payloadDelay : 0); 733 734 assert(!tgt_pkt->req->isUncacheable()); 735 736 assert(tgt_pkt->req->masterId() < system->maxMasters()); 737 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] += 738 completion_time - target.recvTime; 739 } else if (pkt->cmd == MemCmd::UpgradeFailResp) { 740 // failed StoreCond upgrade 741 assert(tgt_pkt->cmd == MemCmd::StoreCondReq || 742 tgt_pkt->cmd == MemCmd::StoreCondFailReq || 743 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq); 744 // responseLatency is the latency of the return path 745 // from lower level caches/memory to an upper level cache or 746 // the core. 747 completion_time += clockEdge(responseLatency) + 748 pkt->payloadDelay; 749 tgt_pkt->req->setExtraData(0); 750 } else { 751 // We are about to send a response to a cache above 752 // that asked for an invalidation; we need to 753 // invalidate our copy immediately as the most 754 // up-to-date copy of the block will now be in the 755 // cache above. It will also prevent this cache from 756 // responding (if the block was previously dirty) to 757 // snoops as they should snoop the caches above where 758 // they will get the response from. 759 if (is_invalidate && blk && blk->isValid()) { 760 invalidateBlock(blk); 761 } 762 // not a cache fill, just forwarding response 763 // responseLatency is the latency of the return path 764 // from lower level cahces/memory to the core. 765 completion_time += clockEdge(responseLatency) + 766 pkt->payloadDelay; 767 if (pkt->isRead() && !is_error) { 768 // sanity check 769 assert(pkt->getAddr() == tgt_pkt->getAddr()); 770 assert(pkt->getSize() >= tgt_pkt->getSize()); 771 772 tgt_pkt->setData(pkt->getConstPtr<uint8_t>()); 773 } 774 } 775 tgt_pkt->makeTimingResponse(); 776 // if this packet is an error copy that to the new packet 777 if (is_error) 778 tgt_pkt->copyError(pkt); 779 if (tgt_pkt->cmd == MemCmd::ReadResp && 780 (is_invalidate || mshr->hasPostInvalidate())) { 781 // If intermediate cache got ReadRespWithInvalidate, 782 // propagate that. Response should not have 783 // isInvalidate() set otherwise. 784 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate; 785 DPRINTF(Cache, "%s: updated cmd to %s\n", __func__, 786 tgt_pkt->print()); 787 } 788 // Reset the bus additional time as it is now accounted for 789 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0; 790 cpuSidePort.schedTimingResp(tgt_pkt, completion_time, true); 791 break; 792 793 case MSHR::Target::FromPrefetcher: 794 assert(tgt_pkt->cmd == MemCmd::HardPFReq); 795 if (blk) 796 blk->status |= BlkHWPrefetched; 797 delete tgt_pkt; 798 break; 799 800 case MSHR::Target::FromSnoop: 801 // I don't believe that a snoop can be in an error state 802 assert(!is_error); 803 // response to snoop request 804 DPRINTF(Cache, "processing deferred snoop...\n"); 805 // If the response is invalidating, a snooping target can 806 // be satisfied if it is also invalidating. If the reponse is, not 807 // only invalidating, but more specifically an InvalidateResp and 808 // the MSHR was created due to an InvalidateReq then a cache above 809 // is waiting to satisfy a WriteLineReq. In this case even an 810 // non-invalidating snoop is added as a target here since this is 811 // the ordering point. When the InvalidateResp reaches this cache, 812 // the snooping target will snoop further the cache above with the 813 // WriteLineReq. 814 assert(!is_invalidate || pkt->cmd == MemCmd::InvalidateResp || 815 pkt->req->isCacheMaintenance() || 816 mshr->hasPostInvalidate()); 817 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate()); 818 break; 819 820 default: 821 panic("Illegal target->source enum %d\n", target.source); 822 } 823 } 824 825 maintainClusivity(targets.hasFromCache, blk); 826 827 if (blk && blk->isValid()) { 828 // an invalidate response stemming from a write line request 829 // should not invalidate the block, so check if the 830 // invalidation should be discarded 831 if (is_invalidate || mshr->hasPostInvalidate()) { 832 invalidateBlock(blk); 833 } else if (mshr->hasPostDowngrade()) { 834 blk->status &= ~BlkWritable; 835 } 836 } 837} 838 839PacketPtr 840Cache::evictBlock(CacheBlk *blk) 841{ 842 PacketPtr pkt = (blk->isDirty() || writebackClean) ? 843 writebackBlk(blk) : cleanEvictBlk(blk); 844 845 invalidateBlock(blk); 846 847 return pkt; 848} 849 850void 851Cache::evictBlock(CacheBlk *blk, PacketList &writebacks) 852{ 853 PacketPtr pkt = evictBlock(blk); 854 if (pkt) { 855 writebacks.push_back(pkt); 856 } 857} 858 859PacketPtr 860Cache::cleanEvictBlk(CacheBlk *blk) 861{ 862 assert(!writebackClean); 863 assert(blk && blk->isValid() && !blk->isDirty()); 864 865 // Creating a zero sized write, a message to the snoop filter 866 RequestPtr req = std::make_shared<Request>( 867 regenerateBlkAddr(blk), blkSize, 0, Request::wbMasterId); 868 869 if (blk->isSecure()) 870 req->setFlags(Request::SECURE); 871 872 req->taskId(blk->task_id); 873 874 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict); 875 pkt->allocate(); 876 DPRINTF(Cache, "Create CleanEvict %s\n", pkt->print()); 877 878 return pkt; 879} 880 881///////////////////////////////////////////////////// 882// 883// Snoop path: requests coming in from the memory side 884// 885///////////////////////////////////////////////////// 886 887void 888Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data, 889 bool already_copied, bool pending_inval) 890{ 891 // sanity check 892 assert(req_pkt->isRequest()); 893 assert(req_pkt->needsResponse()); 894 895 DPRINTF(Cache, "%s: for %s\n", __func__, req_pkt->print()); 896 // timing-mode snoop responses require a new packet, unless we 897 // already made a copy... 898 PacketPtr pkt = req_pkt; 899 if (!already_copied) 900 // do not clear flags, and allocate space for data if the 901 // packet needs it (the only packets that carry data are read 902 // responses) 903 pkt = new Packet(req_pkt, false, req_pkt->isRead()); 904 905 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() || 906 pkt->hasSharers()); 907 pkt->makeTimingResponse(); 908 if (pkt->isRead()) { 909 pkt->setDataFromBlock(blk_data, blkSize); 910 } 911 if (pkt->cmd == MemCmd::ReadResp && pending_inval) { 912 // Assume we defer a response to a read from a far-away cache 913 // A, then later defer a ReadExcl from a cache B on the same 914 // bus as us. We'll assert cacheResponding in both cases, but 915 // in the latter case cacheResponding will keep the 916 // invalidation from reaching cache A. This special response 917 // tells cache A that it gets the block to satisfy its read, 918 // but must immediately invalidate it. 919 pkt->cmd = MemCmd::ReadRespWithInvalidate; 920 } 921 // Here we consider forward_time, paying for just forward latency and 922 // also charging the delay provided by the xbar. 923 // forward_time is used as send_time in next allocateWriteBuffer(). 924 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 925 // Here we reset the timing of the packet. 926 pkt->headerDelay = pkt->payloadDelay = 0; 927 DPRINTF(CacheVerbose, "%s: created response: %s tick: %lu\n", __func__, 928 pkt->print(), forward_time); 929 memSidePort.schedTimingSnoopResp(pkt, forward_time, true); 930} 931 932uint32_t 933Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing, 934 bool is_deferred, bool pending_inval) 935{ 936 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print()); 937 // deferred snoops can only happen in timing mode 938 assert(!(is_deferred && !is_timing)); 939 // pending_inval only makes sense on deferred snoops 940 assert(!(pending_inval && !is_deferred)); 941 assert(pkt->isRequest()); 942 943 // the packet may get modified if we or a forwarded snooper 944 // responds in atomic mode, so remember a few things about the 945 // original packet up front 946 bool invalidate = pkt->isInvalidate(); 947 bool M5_VAR_USED needs_writable = pkt->needsWritable(); 948 949 // at the moment we could get an uncacheable write which does not 950 // have the invalidate flag, and we need a suitable way of dealing 951 // with this case 952 panic_if(invalidate && pkt->req->isUncacheable(), 953 "%s got an invalidating uncacheable snoop request %s", 954 name(), pkt->print()); 955 956 uint32_t snoop_delay = 0; 957 958 if (forwardSnoops) { 959 // first propagate snoop upward to see if anyone above us wants to 960 // handle it. save & restore packet src since it will get 961 // rewritten to be relative to cpu-side bus (if any) 962 bool alreadyResponded = pkt->cacheResponding(); 963 if (is_timing) { 964 // copy the packet so that we can clear any flags before 965 // forwarding it upwards, we also allocate data (passing 966 // the pointer along in case of static data), in case 967 // there is a snoop hit in upper levels 968 Packet snoopPkt(pkt, true, true); 969 snoopPkt.setExpressSnoop(); 970 // the snoop packet does not need to wait any additional 971 // time 972 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0; 973 cpuSidePort.sendTimingSnoopReq(&snoopPkt); 974 975 // add the header delay (including crossbar and snoop 976 // delays) of the upward snoop to the snoop delay for this 977 // cache 978 snoop_delay += snoopPkt.headerDelay; 979 980 if (snoopPkt.cacheResponding()) { 981 // cache-to-cache response from some upper cache 982 assert(!alreadyResponded); 983 pkt->setCacheResponding(); 984 } 985 // upstream cache has the block, or has an outstanding 986 // MSHR, pass the flag on 987 if (snoopPkt.hasSharers()) { 988 pkt->setHasSharers(); 989 } 990 // If this request is a prefetch or clean evict and an upper level 991 // signals block present, make sure to propagate the block 992 // presence to the requester. 993 if (snoopPkt.isBlockCached()) { 994 pkt->setBlockCached(); 995 } 996 // If the request was satisfied by snooping the cache 997 // above, mark the original packet as satisfied too. 998 if (snoopPkt.satisfied()) { 999 pkt->setSatisfied(); 1000 } 1001 } else { 1002 cpuSidePort.sendAtomicSnoop(pkt); 1003 if (!alreadyResponded && pkt->cacheResponding()) { 1004 // cache-to-cache response from some upper cache: 1005 // forward response to original requester 1006 assert(pkt->isResponse()); 1007 } 1008 } 1009 } 1010 1011 bool respond = false; 1012 bool blk_valid = blk && blk->isValid(); 1013 if (pkt->isClean()) { 1014 if (blk_valid && blk->isDirty()) { 1015 DPRINTF(CacheVerbose, "%s: packet (snoop) %s found block: %s\n", 1016 __func__, pkt->print(), blk->print()); 1017 PacketPtr wb_pkt = writecleanBlk(blk, pkt->req->getDest(), pkt->id); 1018 PacketList writebacks; 1019 writebacks.push_back(wb_pkt); 1020 1021 if (is_timing) { 1022 // anything that is merely forwarded pays for the forward 1023 // latency and the delay provided by the crossbar 1024 Tick forward_time = clockEdge(forwardLatency) + 1025 pkt->headerDelay; 1026 doWritebacks(writebacks, forward_time); 1027 } else { 1028 doWritebacksAtomic(writebacks); 1029 } 1030 pkt->setSatisfied(); 1031 } 1032 } else if (!blk_valid) { 1033 DPRINTF(CacheVerbose, "%s: snoop miss for %s\n", __func__, 1034 pkt->print()); 1035 if (is_deferred) { 1036 // we no longer have the block, and will not respond, but a 1037 // packet was allocated in MSHR::handleSnoop and we have 1038 // to delete it 1039 assert(pkt->needsResponse()); 1040 1041 // we have passed the block to a cache upstream, that 1042 // cache should be responding 1043 assert(pkt->cacheResponding()); 1044 1045 delete pkt; 1046 } 1047 return snoop_delay; 1048 } else { 1049 DPRINTF(Cache, "%s: snoop hit for %s, old state is %s\n", __func__, 1050 pkt->print(), blk->print()); 1051 1052 // We may end up modifying both the block state and the packet (if 1053 // we respond in atomic mode), so just figure out what to do now 1054 // and then do it later. We respond to all snoops that need 1055 // responses provided we have the block in dirty state. The 1056 // invalidation itself is taken care of below. We don't respond to 1057 // cache maintenance operations as this is done by the destination 1058 // xbar. 1059 respond = blk->isDirty() && pkt->needsResponse(); 1060 1061 chatty_assert(!(isReadOnly && blk->isDirty()), "Should never have " 1062 "a dirty block in a read-only cache %s\n", name()); 1063 } 1064 1065 // Invalidate any prefetch's from below that would strip write permissions 1066 // MemCmd::HardPFReq is only observed by upstream caches. After missing 1067 // above and in it's own cache, a new MemCmd::ReadReq is created that 1068 // downstream caches observe. 1069 if (pkt->mustCheckAbove()) { 1070 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s " 1071 "from lower cache\n", pkt->getAddr(), pkt->print()); 1072 pkt->setBlockCached(); 1073 return snoop_delay; 1074 } 1075 1076 if (pkt->isRead() && !invalidate) { 1077 // reading without requiring the line in a writable state 1078 assert(!needs_writable); 1079 pkt->setHasSharers(); 1080 1081 // if the requesting packet is uncacheable, retain the line in 1082 // the current state, otherwhise unset the writable flag, 1083 // which means we go from Modified to Owned (and will respond 1084 // below), remain in Owned (and will respond below), from 1085 // Exclusive to Shared, or remain in Shared 1086 if (!pkt->req->isUncacheable()) 1087 blk->status &= ~BlkWritable; 1088 DPRINTF(Cache, "new state is %s\n", blk->print()); 1089 } 1090 1091 if (respond) { 1092 // prevent anyone else from responding, cache as well as 1093 // memory, and also prevent any memory from even seeing the 1094 // request 1095 pkt->setCacheResponding(); 1096 if (!pkt->isClean() && blk->isWritable()) { 1097 // inform the cache hierarchy that this cache had the line 1098 // in the Modified state so that we avoid unnecessary 1099 // invalidations (see Packet::setResponderHadWritable) 1100 pkt->setResponderHadWritable(); 1101 1102 // in the case of an uncacheable request there is no point 1103 // in setting the responderHadWritable flag, but since the 1104 // recipient does not care there is no harm in doing so 1105 } else { 1106 // if the packet has needsWritable set we invalidate our 1107 // copy below and all other copies will be invalidates 1108 // through express snoops, and if needsWritable is not set 1109 // we already called setHasSharers above 1110 } 1111 1112 // if we are returning a writable and dirty (Modified) line, 1113 // we should be invalidating the line 1114 panic_if(!invalidate && !pkt->hasSharers(), 1115 "%s is passing a Modified line through %s, " 1116 "but keeping the block", name(), pkt->print()); 1117 1118 if (is_timing) { 1119 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval); 1120 } else { 1121 pkt->makeAtomicResponse(); 1122 // packets such as upgrades do not actually have any data 1123 // payload 1124 if (pkt->hasData()) 1125 pkt->setDataFromBlock(blk->data, blkSize); 1126 } 1127 } 1128 1129 if (!respond && is_deferred) { 1130 assert(pkt->needsResponse()); 1131 delete pkt; 1132 } 1133 1134 // Do this last in case it deallocates block data or something 1135 // like that 1136 if (blk_valid && invalidate) { 1137 invalidateBlock(blk); 1138 DPRINTF(Cache, "new state is %s\n", blk->print()); 1139 } 1140 1141 return snoop_delay; 1142} 1143 1144 1145void 1146Cache::recvTimingSnoopReq(PacketPtr pkt) 1147{ 1148 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print()); 1149 1150 // no need to snoop requests that are not in range 1151 if (!inRange(pkt->getAddr())) { 1152 return; 1153 } 1154 1155 bool is_secure = pkt->isSecure(); 1156 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); 1157 1158 Addr blk_addr = pkt->getBlockAddr(blkSize); 1159 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure); 1160 1161 // Update the latency cost of the snoop so that the crossbar can 1162 // account for it. Do not overwrite what other neighbouring caches 1163 // have already done, rather take the maximum. The update is 1164 // tentative, for cases where we return before an upward snoop 1165 // happens below. 1166 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, 1167 lookupLatency * clockPeriod()); 1168 1169 // Inform request(Prefetch, CleanEvict or Writeback) from below of 1170 // MSHR hit, set setBlockCached. 1171 if (mshr && pkt->mustCheckAbove()) { 1172 DPRINTF(Cache, "Setting block cached for %s from lower cache on " 1173 "mshr hit\n", pkt->print()); 1174 pkt->setBlockCached(); 1175 return; 1176 } 1177 1178 // Bypass any existing cache maintenance requests if the request 1179 // has been satisfied already (i.e., the dirty block has been 1180 // found). 1181 if (mshr && pkt->req->isCacheMaintenance() && pkt->satisfied()) { 1182 return; 1183 } 1184 1185 // Let the MSHR itself track the snoop and decide whether we want 1186 // to go ahead and do the regular cache snoop 1187 if (mshr && mshr->handleSnoop(pkt, order++)) { 1188 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)." 1189 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns", 1190 mshr->print()); 1191 1192 if (mshr->getNumTargets() > numTarget) 1193 warn("allocating bonus target for snoop"); //handle later 1194 return; 1195 } 1196 1197 //We also need to check the writeback buffers and handle those 1198 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure); 1199 if (wb_entry) { 1200 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n", 1201 pkt->getAddr(), is_secure ? "s" : "ns"); 1202 // Expect to see only Writebacks and/or CleanEvicts here, both of 1203 // which should not be generated for uncacheable data. 1204 assert(!wb_entry->isUncacheable()); 1205 // There should only be a single request responsible for generating 1206 // Writebacks/CleanEvicts. 1207 assert(wb_entry->getNumTargets() == 1); 1208 PacketPtr wb_pkt = wb_entry->getTarget()->pkt; 1209 assert(wb_pkt->isEviction() || wb_pkt->cmd == MemCmd::WriteClean); 1210 1211 if (pkt->isEviction()) { 1212 // if the block is found in the write queue, set the BLOCK_CACHED 1213 // flag for Writeback/CleanEvict snoop. On return the snoop will 1214 // propagate the BLOCK_CACHED flag in Writeback packets and prevent 1215 // any CleanEvicts from travelling down the memory hierarchy. 1216 pkt->setBlockCached(); 1217 DPRINTF(Cache, "%s: Squashing %s from lower cache on writequeue " 1218 "hit\n", __func__, pkt->print()); 1219 return; 1220 } 1221 1222 // conceptually writebacks are no different to other blocks in 1223 // this cache, so the behaviour is modelled after handleSnoop, 1224 // the difference being that instead of querying the block 1225 // state to determine if it is dirty and writable, we use the 1226 // command and fields of the writeback packet 1227 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty && 1228 pkt->needsResponse(); 1229 bool have_writable = !wb_pkt->hasSharers(); 1230 bool invalidate = pkt->isInvalidate(); 1231 1232 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) { 1233 assert(!pkt->needsWritable()); 1234 pkt->setHasSharers(); 1235 wb_pkt->setHasSharers(); 1236 } 1237 1238 if (respond) { 1239 pkt->setCacheResponding(); 1240 1241 if (have_writable) { 1242 pkt->setResponderHadWritable(); 1243 } 1244 1245 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(), 1246 false, false); 1247 } 1248 1249 if (invalidate && wb_pkt->cmd != MemCmd::WriteClean) { 1250 // Invalidation trumps our writeback... discard here 1251 // Note: markInService will remove entry from writeback buffer. 1252 markInService(wb_entry); 1253 delete wb_pkt; 1254 } 1255 } 1256 1257 // If this was a shared writeback, there may still be 1258 // other shared copies above that require invalidation. 1259 // We could be more selective and return here if the 1260 // request is non-exclusive or if the writeback is 1261 // exclusive. 1262 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false); 1263 1264 // Override what we did when we first saw the snoop, as we now 1265 // also have the cost of the upwards snoops to account for 1266 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay + 1267 lookupLatency * clockPeriod()); 1268} 1269 1270Tick 1271Cache::recvAtomicSnoop(PacketPtr pkt) 1272{ 1273 // no need to snoop requests that are not in range. 1274 if (!inRange(pkt->getAddr())) { 1275 return 0; 1276 } 1277 1278 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); 1279 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false); 1280 return snoop_delay + lookupLatency * clockPeriod(); 1281} 1282 1283bool 1284Cache::isCachedAbove(PacketPtr pkt, bool is_timing) 1285{ 1286 if (!forwardSnoops) 1287 return false; 1288 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and 1289 // Writeback snoops into upper level caches to check for copies of the 1290 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict 1291 // packet, the cache can inform the crossbar below of presence or absence 1292 // of the block. 1293 if (is_timing) { 1294 Packet snoop_pkt(pkt, true, false); 1295 snoop_pkt.setExpressSnoop(); 1296 // Assert that packet is either Writeback or CleanEvict and not a 1297 // prefetch request because prefetch requests need an MSHR and may 1298 // generate a snoop response. 1299 assert(pkt->isEviction() || pkt->cmd == MemCmd::WriteClean); 1300 snoop_pkt.senderState = nullptr; 1301 cpuSidePort.sendTimingSnoopReq(&snoop_pkt); 1302 // Writeback/CleanEvict snoops do not generate a snoop response. 1303 assert(!(snoop_pkt.cacheResponding())); 1304 return snoop_pkt.isBlockCached(); 1305 } else { 1306 cpuSidePort.sendAtomicSnoop(pkt); 1307 return pkt->isBlockCached(); 1308 } 1309} 1310 1311bool 1312Cache::sendMSHRQueuePacket(MSHR* mshr) 1313{ 1314 assert(mshr); 1315 1316 // use request from 1st target 1317 PacketPtr tgt_pkt = mshr->getTarget()->pkt; 1318 1319 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) { 1320 DPRINTF(Cache, "%s: MSHR %s\n", __func__, tgt_pkt->print()); 1321 1322 // we should never have hardware prefetches to allocated 1323 // blocks 1324 assert(!tags->findBlock(mshr->blkAddr, mshr->isSecure)); 1325 1326 // We need to check the caches above us to verify that 1327 // they don't have a copy of this block in the dirty state 1328 // at the moment. Without this check we could get a stale 1329 // copy from memory that might get used in place of the 1330 // dirty one. 1331 Packet snoop_pkt(tgt_pkt, true, false); 1332 snoop_pkt.setExpressSnoop(); 1333 // We are sending this packet upwards, but if it hits we will 1334 // get a snoop response that we end up treating just like a 1335 // normal response, hence it needs the MSHR as its sender 1336 // state 1337 snoop_pkt.senderState = mshr; 1338 cpuSidePort.sendTimingSnoopReq(&snoop_pkt); 1339 1340 // Check to see if the prefetch was squashed by an upper cache (to 1341 // prevent us from grabbing the line) or if a Check to see if a 1342 // writeback arrived between the time the prefetch was placed in 1343 // the MSHRs and when it was selected to be sent or if the 1344 // prefetch was squashed by an upper cache. 1345 1346 // It is important to check cacheResponding before 1347 // prefetchSquashed. If another cache has committed to 1348 // responding, it will be sending a dirty response which will 1349 // arrive at the MSHR allocated for this request. Checking the 1350 // prefetchSquash first may result in the MSHR being 1351 // prematurely deallocated. 1352 if (snoop_pkt.cacheResponding()) { 1353 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req); 1354 assert(r.second); 1355 1356 // if we are getting a snoop response with no sharers it 1357 // will be allocated as Modified 1358 bool pending_modified_resp = !snoop_pkt.hasSharers(); 1359 markInService(mshr, pending_modified_resp); 1360 1361 DPRINTF(Cache, "Upward snoop of prefetch for addr" 1362 " %#x (%s) hit\n", 1363 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns"); 1364 return false; 1365 } 1366 1367 if (snoop_pkt.isBlockCached()) { 1368 DPRINTF(Cache, "Block present, prefetch squashed by cache. " 1369 "Deallocating mshr target %#x.\n", 1370 mshr->blkAddr); 1371 1372 // Deallocate the mshr target 1373 if (mshrQueue.forceDeallocateTarget(mshr)) { 1374 // Clear block if this deallocation resulted freed an 1375 // mshr when all had previously been utilized 1376 clearBlocked(Blocked_NoMSHRs); 1377 } 1378 1379 // given that no response is expected, delete Request and Packet 1380 delete tgt_pkt; 1381 1382 return false; 1383 } 1384 } 1385 1386 return BaseCache::sendMSHRQueuePacket(mshr); 1387} 1388 1389Cache* 1390CacheParams::create() 1391{ 1392 assert(tags); 1393 assert(replacement_policy); 1394 1395 return new Cache(this); 1396} 1397