cache.cc revision 12345
1/* 2 * Copyright (c) 2010-2016 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2002-2005 The Regents of The University of Michigan 15 * Copyright (c) 2010,2015 Advanced Micro Devices, Inc. 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Erik Hallnor 42 * Dave Greene 43 * Nathan Binkert 44 * Steve Reinhardt 45 * Ron Dreslinski 46 * Andreas Sandberg 47 */ 48 49/** 50 * @file 51 * Cache definitions. 52 */ 53 54#include "mem/cache/cache.hh" 55 56#include "base/logging.hh" 57#include "base/types.hh" 58#include "debug/Cache.hh" 59#include "debug/CachePort.hh" 60#include "debug/CacheTags.hh" 61#include "debug/CacheVerbose.hh" 62#include "mem/cache/blk.hh" 63#include "mem/cache/mshr.hh" 64#include "mem/cache/prefetch/base.hh" 65#include "sim/sim_exit.hh" 66 67Cache::Cache(const CacheParams *p) 68 : BaseCache(p, p->system->cacheLineSize()), 69 tags(p->tags), 70 prefetcher(p->prefetcher), 71 doFastWrites(true), 72 prefetchOnAccess(p->prefetch_on_access), 73 clusivity(p->clusivity), 74 writebackClean(p->writeback_clean), 75 tempBlockWriteback(nullptr), 76 writebackTempBlockAtomicEvent([this]{ writebackTempBlockAtomic(); }, 77 name(), false, 78 EventBase::Delayed_Writeback_Pri) 79{ 80 tempBlock = new CacheBlk(); 81 tempBlock->data = new uint8_t[blkSize]; 82 83 cpuSidePort = new CpuSidePort(p->name + ".cpu_side", this, 84 "CpuSidePort"); 85 memSidePort = new MemSidePort(p->name + ".mem_side", this, 86 "MemSidePort"); 87 88 tags->setCache(this); 89 if (prefetcher) 90 prefetcher->setCache(this); 91} 92 93Cache::~Cache() 94{ 95 delete [] tempBlock->data; 96 delete tempBlock; 97 98 delete cpuSidePort; 99 delete memSidePort; 100} 101 102void 103Cache::regStats() 104{ 105 BaseCache::regStats(); 106} 107 108void 109Cache::cmpAndSwap(CacheBlk *blk, PacketPtr pkt) 110{ 111 assert(pkt->isRequest()); 112 113 uint64_t overwrite_val; 114 bool overwrite_mem; 115 uint64_t condition_val64; 116 uint32_t condition_val32; 117 118 int offset = tags->extractBlkOffset(pkt->getAddr()); 119 uint8_t *blk_data = blk->data + offset; 120 121 assert(sizeof(uint64_t) >= pkt->getSize()); 122 123 overwrite_mem = true; 124 // keep a copy of our possible write value, and copy what is at the 125 // memory address into the packet 126 pkt->writeData((uint8_t *)&overwrite_val); 127 pkt->setData(blk_data); 128 129 if (pkt->req->isCondSwap()) { 130 if (pkt->getSize() == sizeof(uint64_t)) { 131 condition_val64 = pkt->req->getExtraData(); 132 overwrite_mem = !std::memcmp(&condition_val64, blk_data, 133 sizeof(uint64_t)); 134 } else if (pkt->getSize() == sizeof(uint32_t)) { 135 condition_val32 = (uint32_t)pkt->req->getExtraData(); 136 overwrite_mem = !std::memcmp(&condition_val32, blk_data, 137 sizeof(uint32_t)); 138 } else 139 panic("Invalid size for conditional read/write\n"); 140 } 141 142 if (overwrite_mem) { 143 std::memcpy(blk_data, &overwrite_val, pkt->getSize()); 144 blk->status |= BlkDirty; 145 } 146} 147 148 149void 150Cache::satisfyRequest(PacketPtr pkt, CacheBlk *blk, 151 bool deferred_response, bool pending_downgrade) 152{ 153 assert(pkt->isRequest()); 154 155 assert(blk && blk->isValid()); 156 // Occasionally this is not true... if we are a lower-level cache 157 // satisfying a string of Read and ReadEx requests from 158 // upper-level caches, a Read will mark the block as shared but we 159 // can satisfy a following ReadEx anyway since we can rely on the 160 // Read requester(s) to have buffered the ReadEx snoop and to 161 // invalidate their blocks after receiving them. 162 // assert(!pkt->needsWritable() || blk->isWritable()); 163 assert(pkt->getOffset(blkSize) + pkt->getSize() <= blkSize); 164 165 // Check RMW operations first since both isRead() and 166 // isWrite() will be true for them 167 if (pkt->cmd == MemCmd::SwapReq) { 168 cmpAndSwap(blk, pkt); 169 } else if (pkt->isWrite()) { 170 // we have the block in a writable state and can go ahead, 171 // note that the line may be also be considered writable in 172 // downstream caches along the path to memory, but always 173 // Exclusive, and never Modified 174 assert(blk->isWritable()); 175 // Write or WriteLine at the first cache with block in writable state 176 if (blk->checkWrite(pkt)) { 177 pkt->writeDataToBlock(blk->data, blkSize); 178 } 179 // Always mark the line as dirty (and thus transition to the 180 // Modified state) even if we are a failed StoreCond so we 181 // supply data to any snoops that have appended themselves to 182 // this cache before knowing the store will fail. 183 blk->status |= BlkDirty; 184 DPRINTF(CacheVerbose, "%s for %s (write)\n", __func__, pkt->print()); 185 } else if (pkt->isRead()) { 186 if (pkt->isLLSC()) { 187 blk->trackLoadLocked(pkt); 188 } 189 190 // all read responses have a data payload 191 assert(pkt->hasRespData()); 192 pkt->setDataFromBlock(blk->data, blkSize); 193 194 // determine if this read is from a (coherent) cache or not 195 if (pkt->fromCache()) { 196 assert(pkt->getSize() == blkSize); 197 // special handling for coherent block requests from 198 // upper-level caches 199 if (pkt->needsWritable()) { 200 // sanity check 201 assert(pkt->cmd == MemCmd::ReadExReq || 202 pkt->cmd == MemCmd::SCUpgradeFailReq); 203 assert(!pkt->hasSharers()); 204 205 // if we have a dirty copy, make sure the recipient 206 // keeps it marked dirty (in the modified state) 207 if (blk->isDirty()) { 208 pkt->setCacheResponding(); 209 blk->status &= ~BlkDirty; 210 } 211 } else if (blk->isWritable() && !pending_downgrade && 212 !pkt->hasSharers() && 213 pkt->cmd != MemCmd::ReadCleanReq) { 214 // we can give the requester a writable copy on a read 215 // request if: 216 // - we have a writable copy at this level (& below) 217 // - we don't have a pending snoop from below 218 // signaling another read request 219 // - no other cache above has a copy (otherwise it 220 // would have set hasSharers flag when 221 // snooping the packet) 222 // - the read has explicitly asked for a clean 223 // copy of the line 224 if (blk->isDirty()) { 225 // special considerations if we're owner: 226 if (!deferred_response) { 227 // respond with the line in Modified state 228 // (cacheResponding set, hasSharers not set) 229 pkt->setCacheResponding(); 230 231 // if this cache is mostly inclusive, we 232 // keep the block in the Exclusive state, 233 // and pass it upwards as Modified 234 // (writable and dirty), hence we have 235 // multiple caches, all on the same path 236 // towards memory, all considering the 237 // same block writable, but only one 238 // considering it Modified 239 240 // we get away with multiple caches (on 241 // the same path to memory) considering 242 // the block writeable as we always enter 243 // the cache hierarchy through a cache, 244 // and first snoop upwards in all other 245 // branches 246 blk->status &= ~BlkDirty; 247 } else { 248 // if we're responding after our own miss, 249 // there's a window where the recipient didn't 250 // know it was getting ownership and may not 251 // have responded to snoops correctly, so we 252 // have to respond with a shared line 253 pkt->setHasSharers(); 254 } 255 } 256 } else { 257 // otherwise only respond with a shared copy 258 pkt->setHasSharers(); 259 } 260 } 261 } else if (pkt->isUpgrade()) { 262 // sanity check 263 assert(!pkt->hasSharers()); 264 265 if (blk->isDirty()) { 266 // we were in the Owned state, and a cache above us that 267 // has the line in Shared state needs to be made aware 268 // that the data it already has is in fact dirty 269 pkt->setCacheResponding(); 270 blk->status &= ~BlkDirty; 271 } 272 } else { 273 assert(pkt->isInvalidate()); 274 invalidateBlock(blk); 275 DPRINTF(CacheVerbose, "%s for %s (invalidation)\n", __func__, 276 pkt->print()); 277 } 278} 279 280///////////////////////////////////////////////////// 281// 282// Access path: requests coming in from the CPU side 283// 284///////////////////////////////////////////////////// 285 286bool 287Cache::access(PacketPtr pkt, CacheBlk *&blk, Cycles &lat, 288 PacketList &writebacks) 289{ 290 // sanity check 291 assert(pkt->isRequest()); 292 293 chatty_assert(!(isReadOnly && pkt->isWrite()), 294 "Should never see a write in a read-only cache %s\n", 295 name()); 296 297 DPRINTF(CacheVerbose, "%s for %s\n", __func__, pkt->print()); 298 299 if (pkt->req->isUncacheable()) { 300 DPRINTF(Cache, "uncacheable: %s\n", pkt->print()); 301 302 // flush and invalidate any existing block 303 CacheBlk *old_blk(tags->findBlock(pkt->getAddr(), pkt->isSecure())); 304 if (old_blk && old_blk->isValid()) { 305 if (old_blk->isDirty() || writebackClean) 306 writebacks.push_back(writebackBlk(old_blk)); 307 else 308 writebacks.push_back(cleanEvictBlk(old_blk)); 309 invalidateBlock(old_blk); 310 } 311 312 blk = nullptr; 313 // lookupLatency is the latency in case the request is uncacheable. 314 lat = lookupLatency; 315 return false; 316 } 317 318 // Here lat is the value passed as parameter to accessBlock() function 319 // that can modify its value. 320 blk = tags->accessBlock(pkt->getAddr(), pkt->isSecure(), lat); 321 322 DPRINTF(Cache, "%s %s\n", pkt->print(), 323 blk ? "hit " + blk->print() : "miss"); 324 325 326 if (pkt->isEviction()) { 327 // We check for presence of block in above caches before issuing 328 // Writeback or CleanEvict to write buffer. Therefore the only 329 // possible cases can be of a CleanEvict packet coming from above 330 // encountering a Writeback generated in this cache peer cache and 331 // waiting in the write buffer. Cases of upper level peer caches 332 // generating CleanEvict and Writeback or simply CleanEvict and 333 // CleanEvict almost simultaneously will be caught by snoops sent out 334 // by crossbar. 335 WriteQueueEntry *wb_entry = writeBuffer.findMatch(pkt->getAddr(), 336 pkt->isSecure()); 337 if (wb_entry) { 338 assert(wb_entry->getNumTargets() == 1); 339 PacketPtr wbPkt = wb_entry->getTarget()->pkt; 340 assert(wbPkt->isWriteback()); 341 342 if (pkt->isCleanEviction()) { 343 // The CleanEvict and WritebackClean snoops into other 344 // peer caches of the same level while traversing the 345 // crossbar. If a copy of the block is found, the 346 // packet is deleted in the crossbar. Hence, none of 347 // the other upper level caches connected to this 348 // cache have the block, so we can clear the 349 // BLOCK_CACHED flag in the Writeback if set and 350 // discard the CleanEvict by returning true. 351 wbPkt->clearBlockCached(); 352 return true; 353 } else { 354 assert(pkt->cmd == MemCmd::WritebackDirty); 355 // Dirty writeback from above trumps our clean 356 // writeback... discard here 357 // Note: markInService will remove entry from writeback buffer. 358 markInService(wb_entry); 359 delete wbPkt; 360 } 361 } 362 } 363 364 // Writeback handling is special case. We can write the block into 365 // the cache without having a writeable copy (or any copy at all). 366 if (pkt->isWriteback()) { 367 assert(blkSize == pkt->getSize()); 368 369 // we could get a clean writeback while we are having 370 // outstanding accesses to a block, do the simple thing for 371 // now and drop the clean writeback so that we do not upset 372 // any ordering/decisions about ownership already taken 373 if (pkt->cmd == MemCmd::WritebackClean && 374 mshrQueue.findMatch(pkt->getAddr(), pkt->isSecure())) { 375 DPRINTF(Cache, "Clean writeback %#llx to block with MSHR, " 376 "dropping\n", pkt->getAddr()); 377 return true; 378 } 379 380 if (blk == nullptr) { 381 // need to do a replacement 382 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), writebacks); 383 if (blk == nullptr) { 384 // no replaceable block available: give up, fwd to next level. 385 incMissCount(pkt); 386 return false; 387 } 388 tags->insertBlock(pkt, blk); 389 390 blk->status = (BlkValid | BlkReadable); 391 if (pkt->isSecure()) { 392 blk->status |= BlkSecure; 393 } 394 } 395 // only mark the block dirty if we got a writeback command, 396 // and leave it as is for a clean writeback 397 if (pkt->cmd == MemCmd::WritebackDirty) { 398 blk->status |= BlkDirty; 399 } 400 // if the packet does not have sharers, it is passing 401 // writable, and we got the writeback in Modified or Exclusive 402 // state, if not we are in the Owned or Shared state 403 if (!pkt->hasSharers()) { 404 blk->status |= BlkWritable; 405 } 406 // nothing else to do; writeback doesn't expect response 407 assert(!pkt->needsResponse()); 408 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize); 409 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print()); 410 incHitCount(pkt); 411 return true; 412 } else if (pkt->cmd == MemCmd::CleanEvict) { 413 if (blk != nullptr) { 414 // Found the block in the tags, need to stop CleanEvict from 415 // propagating further down the hierarchy. Returning true will 416 // treat the CleanEvict like a satisfied write request and delete 417 // it. 418 return true; 419 } 420 // We didn't find the block here, propagate the CleanEvict further 421 // down the memory hierarchy. Returning false will treat the CleanEvict 422 // like a Writeback which could not find a replaceable block so has to 423 // go to next level. 424 return false; 425 } else if (pkt->cmd == MemCmd::WriteClean) { 426 // WriteClean handling is a special case. We can allocate a 427 // block directly if it doesn't exist and we can update the 428 // block immediately. The WriteClean transfers the ownership 429 // of the block as well. 430 assert(blkSize == pkt->getSize()); 431 432 if (!blk) { 433 // a writeback that misses needs to allocate a new block 434 blk = allocateBlock(pkt->getAddr(), pkt->isSecure(), 435 writebacks); 436 if (!blk) { 437 // no replaceable block available: give up, fwd to 438 // next level. 439 incMissCount(pkt); 440 return false; 441 } 442 tags->insertBlock(pkt, blk); 443 444 blk->status = (BlkValid | BlkReadable); 445 if (pkt->isSecure()) { 446 blk->status |= BlkSecure; 447 } 448 } 449 450 // at this point either this is a writeback or a write-through 451 // write clean operation and the block is already in this 452 // cache, we need to update the data and the block flags 453 assert(blk); 454 blk->status |= BlkDirty; 455 // nothing else to do; writeback doesn't expect response 456 assert(!pkt->needsResponse()); 457 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize); 458 DPRINTF(Cache, "%s new state is %s\n", __func__, blk->print()); 459 460 incHitCount(pkt); 461 // populate the time when the block will be ready to access. 462 blk->whenReady = clockEdge(fillLatency) + pkt->headerDelay + 463 pkt->payloadDelay; 464 return true; 465 } else if (blk && (pkt->needsWritable() ? blk->isWritable() : 466 blk->isReadable())) { 467 // OK to satisfy access 468 incHitCount(pkt); 469 satisfyRequest(pkt, blk); 470 maintainClusivity(pkt->fromCache(), blk); 471 472 return true; 473 } 474 475 // Can't satisfy access normally... either no block (blk == nullptr) 476 // or have block but need writable 477 478 incMissCount(pkt); 479 480 if (blk == nullptr && pkt->isLLSC() && pkt->isWrite()) { 481 // complete miss on store conditional... just give up now 482 pkt->req->setExtraData(0); 483 return true; 484 } 485 486 return false; 487} 488 489void 490Cache::maintainClusivity(bool from_cache, CacheBlk *blk) 491{ 492 if (from_cache && blk && blk->isValid() && !blk->isDirty() && 493 clusivity == Enums::mostly_excl) { 494 // if we have responded to a cache, and our block is still 495 // valid, but not dirty, and this cache is mostly exclusive 496 // with respect to the cache above, drop the block 497 invalidateBlock(blk); 498 } 499} 500 501void 502Cache::doWritebacks(PacketList& writebacks, Tick forward_time) 503{ 504 while (!writebacks.empty()) { 505 PacketPtr wbPkt = writebacks.front(); 506 // We use forwardLatency here because we are copying writebacks to 507 // write buffer. 508 509 // Call isCachedAbove for Writebacks, CleanEvicts and 510 // WriteCleans to discover if the block is cached above. 511 if (isCachedAbove(wbPkt)) { 512 if (wbPkt->cmd == MemCmd::CleanEvict) { 513 // Delete CleanEvict because cached copies exist above. The 514 // packet destructor will delete the request object because 515 // this is a non-snoop request packet which does not require a 516 // response. 517 delete wbPkt; 518 } else if (wbPkt->cmd == MemCmd::WritebackClean) { 519 // clean writeback, do not send since the block is 520 // still cached above 521 assert(writebackClean); 522 delete wbPkt; 523 } else { 524 assert(wbPkt->cmd == MemCmd::WritebackDirty || 525 wbPkt->cmd == MemCmd::WriteClean); 526 // Set BLOCK_CACHED flag in Writeback and send below, so that 527 // the Writeback does not reset the bit corresponding to this 528 // address in the snoop filter below. 529 wbPkt->setBlockCached(); 530 allocateWriteBuffer(wbPkt, forward_time); 531 } 532 } else { 533 // If the block is not cached above, send packet below. Both 534 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will 535 // reset the bit corresponding to this address in the snoop filter 536 // below. 537 allocateWriteBuffer(wbPkt, forward_time); 538 } 539 writebacks.pop_front(); 540 } 541} 542 543void 544Cache::doWritebacksAtomic(PacketList& writebacks) 545{ 546 while (!writebacks.empty()) { 547 PacketPtr wbPkt = writebacks.front(); 548 // Call isCachedAbove for both Writebacks and CleanEvicts. If 549 // isCachedAbove returns true we set BLOCK_CACHED flag in Writebacks 550 // and discard CleanEvicts. 551 if (isCachedAbove(wbPkt, false)) { 552 if (wbPkt->cmd == MemCmd::WritebackDirty || 553 wbPkt->cmd == MemCmd::WriteClean) { 554 // Set BLOCK_CACHED flag in Writeback and send below, 555 // so that the Writeback does not reset the bit 556 // corresponding to this address in the snoop filter 557 // below. We can discard CleanEvicts because cached 558 // copies exist above. Atomic mode isCachedAbove 559 // modifies packet to set BLOCK_CACHED flag 560 memSidePort->sendAtomic(wbPkt); 561 } 562 } else { 563 // If the block is not cached above, send packet below. Both 564 // CleanEvict and Writeback with BLOCK_CACHED flag cleared will 565 // reset the bit corresponding to this address in the snoop filter 566 // below. 567 memSidePort->sendAtomic(wbPkt); 568 } 569 writebacks.pop_front(); 570 // In case of CleanEvicts, the packet destructor will delete the 571 // request object because this is a non-snoop request packet which 572 // does not require a response. 573 delete wbPkt; 574 } 575} 576 577 578void 579Cache::recvTimingSnoopResp(PacketPtr pkt) 580{ 581 DPRINTF(Cache, "%s for %s\n", __func__, pkt->print()); 582 583 assert(pkt->isResponse()); 584 assert(!system->bypassCaches()); 585 586 // determine if the response is from a snoop request we created 587 // (in which case it should be in the outstandingSnoop), or if we 588 // merely forwarded someone else's snoop request 589 const bool forwardAsSnoop = outstandingSnoop.find(pkt->req) == 590 outstandingSnoop.end(); 591 592 if (!forwardAsSnoop) { 593 // the packet came from this cache, so sink it here and do not 594 // forward it 595 assert(pkt->cmd == MemCmd::HardPFResp); 596 597 outstandingSnoop.erase(pkt->req); 598 599 DPRINTF(Cache, "Got prefetch response from above for addr " 600 "%#llx (%s)\n", pkt->getAddr(), pkt->isSecure() ? "s" : "ns"); 601 recvTimingResp(pkt); 602 return; 603 } 604 605 // forwardLatency is set here because there is a response from an 606 // upper level cache. 607 // To pay the delay that occurs if the packet comes from the bus, 608 // we charge also headerDelay. 609 Tick snoop_resp_time = clockEdge(forwardLatency) + pkt->headerDelay; 610 // Reset the timing of the packet. 611 pkt->headerDelay = pkt->payloadDelay = 0; 612 memSidePort->schedTimingSnoopResp(pkt, snoop_resp_time); 613} 614 615void 616Cache::promoteWholeLineWrites(PacketPtr pkt) 617{ 618 // Cache line clearing instructions 619 if (doFastWrites && (pkt->cmd == MemCmd::WriteReq) && 620 (pkt->getSize() == blkSize) && (pkt->getOffset(blkSize) == 0)) { 621 pkt->cmd = MemCmd::WriteLineReq; 622 DPRINTF(Cache, "packet promoted from Write to WriteLineReq\n"); 623 } 624} 625 626bool 627Cache::recvTimingReq(PacketPtr pkt) 628{ 629 DPRINTF(CacheTags, "%s tags:\n%s\n", __func__, tags->print()); 630 631 assert(pkt->isRequest()); 632 633 // Just forward the packet if caches are disabled. 634 if (system->bypassCaches()) { 635 // @todo This should really enqueue the packet rather 636 bool M5_VAR_USED success = memSidePort->sendTimingReq(pkt); 637 assert(success); 638 return true; 639 } 640 641 promoteWholeLineWrites(pkt); 642 643 if (pkt->cacheResponding()) { 644 // a cache above us (but not where the packet came from) is 645 // responding to the request, in other words it has the line 646 // in Modified or Owned state 647 DPRINTF(Cache, "Cache above responding to %s: not responding\n", 648 pkt->print()); 649 650 // if the packet needs the block to be writable, and the cache 651 // that has promised to respond (setting the cache responding 652 // flag) is not providing writable (it is in Owned rather than 653 // the Modified state), we know that there may be other Shared 654 // copies in the system; go out and invalidate them all 655 assert(pkt->needsWritable() && !pkt->responderHadWritable()); 656 657 // an upstream cache that had the line in Owned state 658 // (dirty, but not writable), is responding and thus 659 // transferring the dirty line from one branch of the 660 // cache hierarchy to another 661 662 // send out an express snoop and invalidate all other 663 // copies (snooping a packet that needs writable is the 664 // same as an invalidation), thus turning the Owned line 665 // into a Modified line, note that we don't invalidate the 666 // block in the current cache or any other cache on the 667 // path to memory 668 669 // create a downstream express snoop with cleared packet 670 // flags, there is no need to allocate any data as the 671 // packet is merely used to co-ordinate state transitions 672 Packet *snoop_pkt = new Packet(pkt, true, false); 673 674 // also reset the bus time that the original packet has 675 // not yet paid for 676 snoop_pkt->headerDelay = snoop_pkt->payloadDelay = 0; 677 678 // make this an instantaneous express snoop, and let the 679 // other caches in the system know that the another cache 680 // is responding, because we have found the authorative 681 // copy (Modified or Owned) that will supply the right 682 // data 683 snoop_pkt->setExpressSnoop(); 684 snoop_pkt->setCacheResponding(); 685 686 // this express snoop travels towards the memory, and at 687 // every crossbar it is snooped upwards thus reaching 688 // every cache in the system 689 bool M5_VAR_USED success = memSidePort->sendTimingReq(snoop_pkt); 690 // express snoops always succeed 691 assert(success); 692 693 // main memory will delete the snoop packet 694 695 // queue for deletion, as opposed to immediate deletion, as 696 // the sending cache is still relying on the packet 697 pendingDelete.reset(pkt); 698 699 // no need to take any further action in this particular cache 700 // as an upstram cache has already committed to responding, 701 // and we have already sent out any express snoops in the 702 // section above to ensure all other copies in the system are 703 // invalidated 704 return true; 705 } 706 707 // anything that is merely forwarded pays for the forward latency and 708 // the delay provided by the crossbar 709 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 710 711 // We use lookupLatency here because it is used to specify the latency 712 // to access. 713 Cycles lat = lookupLatency; 714 CacheBlk *blk = nullptr; 715 bool satisfied = false; 716 { 717 PacketList writebacks; 718 // Note that lat is passed by reference here. The function 719 // access() calls accessBlock() which can modify lat value. 720 satisfied = access(pkt, blk, lat, writebacks); 721 722 // copy writebacks to write buffer here to ensure they logically 723 // proceed anything happening below 724 doWritebacks(writebacks, forward_time); 725 } 726 727 // Here we charge the headerDelay that takes into account the latencies 728 // of the bus, if the packet comes from it. 729 // The latency charged it is just lat that is the value of lookupLatency 730 // modified by access() function, or if not just lookupLatency. 731 // In case of a hit we are neglecting response latency. 732 // In case of a miss we are neglecting forward latency. 733 Tick request_time = clockEdge(lat) + pkt->headerDelay; 734 // Here we reset the timing of the packet. 735 pkt->headerDelay = pkt->payloadDelay = 0; 736 737 // track time of availability of next prefetch, if any 738 Tick next_pf_time = MaxTick; 739 740 bool needsResponse = pkt->needsResponse(); 741 742 if (satisfied) { 743 // should never be satisfying an uncacheable access as we 744 // flush and invalidate any existing block as part of the 745 // lookup 746 assert(!pkt->req->isUncacheable()); 747 748 // hit (for all other request types) 749 750 if (prefetcher && (prefetchOnAccess || 751 (blk && blk->wasPrefetched()))) { 752 if (blk) 753 blk->status &= ~BlkHWPrefetched; 754 755 // Don't notify on SWPrefetch 756 if (!pkt->cmd.isSWPrefetch()) 757 next_pf_time = prefetcher->notify(pkt); 758 } 759 760 if (needsResponse) { 761 pkt->makeTimingResponse(); 762 // @todo: Make someone pay for this 763 pkt->headerDelay = pkt->payloadDelay = 0; 764 765 // In this case we are considering request_time that takes 766 // into account the delay of the xbar, if any, and just 767 // lat, neglecting responseLatency, modelling hit latency 768 // just as lookupLatency or or the value of lat overriden 769 // by access(), that calls accessBlock() function. 770 cpuSidePort->schedTimingResp(pkt, request_time, true); 771 } else { 772 DPRINTF(Cache, "%s satisfied %s, no response needed\n", __func__, 773 pkt->print()); 774 775 // queue the packet for deletion, as the sending cache is 776 // still relying on it; if the block is found in access(), 777 // CleanEvict and Writeback messages will be deleted 778 // here as well 779 pendingDelete.reset(pkt); 780 } 781 } else { 782 // miss 783 784 Addr blk_addr = pkt->getBlockAddr(blkSize); 785 786 // ignore any existing MSHR if we are dealing with an 787 // uncacheable request 788 MSHR *mshr = pkt->req->isUncacheable() ? nullptr : 789 mshrQueue.findMatch(blk_addr, pkt->isSecure()); 790 791 // Software prefetch handling: 792 // To keep the core from waiting on data it won't look at 793 // anyway, send back a response with dummy data. Miss handling 794 // will continue asynchronously. Unfortunately, the core will 795 // insist upon freeing original Packet/Request, so we have to 796 // create a new pair with a different lifecycle. Note that this 797 // processing happens before any MSHR munging on the behalf of 798 // this request because this new Request will be the one stored 799 // into the MSHRs, not the original. 800 if (pkt->cmd.isSWPrefetch()) { 801 assert(needsResponse); 802 assert(pkt->req->hasPaddr()); 803 assert(!pkt->req->isUncacheable()); 804 805 // There's no reason to add a prefetch as an additional target 806 // to an existing MSHR. If an outstanding request is already 807 // in progress, there is nothing for the prefetch to do. 808 // If this is the case, we don't even create a request at all. 809 PacketPtr pf = nullptr; 810 811 if (!mshr) { 812 // copy the request and create a new SoftPFReq packet 813 RequestPtr req = new Request(pkt->req->getPaddr(), 814 pkt->req->getSize(), 815 pkt->req->getFlags(), 816 pkt->req->masterId()); 817 pf = new Packet(req, pkt->cmd); 818 pf->allocate(); 819 assert(pf->getAddr() == pkt->getAddr()); 820 assert(pf->getSize() == pkt->getSize()); 821 } 822 823 pkt->makeTimingResponse(); 824 825 // request_time is used here, taking into account lat and the delay 826 // charged if the packet comes from the xbar. 827 cpuSidePort->schedTimingResp(pkt, request_time, true); 828 829 // If an outstanding request is in progress (we found an 830 // MSHR) this is set to null 831 pkt = pf; 832 } 833 834 if (mshr) { 835 /// MSHR hit 836 /// @note writebacks will be checked in getNextMSHR() 837 /// for any conflicting requests to the same block 838 839 //@todo remove hw_pf here 840 841 // Coalesce unless it was a software prefetch (see above). 842 if (pkt) { 843 assert(!pkt->isWriteback()); 844 // CleanEvicts corresponding to blocks which have 845 // outstanding requests in MSHRs are simply sunk here 846 if (pkt->cmd == MemCmd::CleanEvict) { 847 pendingDelete.reset(pkt); 848 } else { 849 DPRINTF(Cache, "%s coalescing MSHR for %s\n", __func__, 850 pkt->print()); 851 852 assert(pkt->req->masterId() < system->maxMasters()); 853 mshr_hits[pkt->cmdToIndex()][pkt->req->masterId()]++; 854 // We use forward_time here because it is the same 855 // considering new targets. We have multiple 856 // requests for the same address here. It 857 // specifies the latency to allocate an internal 858 // buffer and to schedule an event to the queued 859 // port and also takes into account the additional 860 // delay of the xbar. 861 mshr->allocateTarget(pkt, forward_time, order++, 862 allocOnFill(pkt->cmd)); 863 if (mshr->getNumTargets() == numTarget) { 864 noTargetMSHR = mshr; 865 setBlocked(Blocked_NoTargets); 866 // need to be careful with this... if this mshr isn't 867 // ready yet (i.e. time > curTick()), we don't want to 868 // move it ahead of mshrs that are ready 869 // mshrQueue.moveToFront(mshr); 870 } 871 } 872 // We should call the prefetcher reguardless if the request is 873 // satisfied or not, reguardless if the request is in the MSHR 874 // or not. The request could be a ReadReq hit, but still not 875 // satisfied (potentially because of a prior write to the same 876 // cache line. So, even when not satisfied, tehre is an MSHR 877 // already allocated for this, we need to let the prefetcher 878 // know about the request 879 if (prefetcher) { 880 // Don't notify on SWPrefetch 881 if (!pkt->cmd.isSWPrefetch()) 882 next_pf_time = prefetcher->notify(pkt); 883 } 884 } 885 } else { 886 // no MSHR 887 assert(pkt->req->masterId() < system->maxMasters()); 888 if (pkt->req->isUncacheable()) { 889 mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++; 890 } else { 891 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++; 892 } 893 894 if (pkt->isEviction() || pkt->cmd == MemCmd::WriteClean || 895 (pkt->req->isUncacheable() && pkt->isWrite())) { 896 // We use forward_time here because there is an 897 // uncached memory write, forwarded to WriteBuffer. 898 allocateWriteBuffer(pkt, forward_time); 899 } else { 900 if (blk && blk->isValid()) { 901 // should have flushed and have no valid block 902 assert(!pkt->req->isUncacheable()); 903 904 // If we have a write miss to a valid block, we 905 // need to mark the block non-readable. Otherwise 906 // if we allow reads while there's an outstanding 907 // write miss, the read could return stale data 908 // out of the cache block... a more aggressive 909 // system could detect the overlap (if any) and 910 // forward data out of the MSHRs, but we don't do 911 // that yet. Note that we do need to leave the 912 // block valid so that it stays in the cache, in 913 // case we get an upgrade response (and hence no 914 // new data) when the write miss completes. 915 // As long as CPUs do proper store/load forwarding 916 // internally, and have a sufficiently weak memory 917 // model, this is probably unnecessary, but at some 918 // point it must have seemed like we needed it... 919 assert(pkt->needsWritable()); 920 assert(!blk->isWritable()); 921 blk->status &= ~BlkReadable; 922 } 923 // Here we are using forward_time, modelling the latency of 924 // a miss (outbound) just as forwardLatency, neglecting the 925 // lookupLatency component. 926 allocateMissBuffer(pkt, forward_time); 927 } 928 929 if (prefetcher) { 930 // Don't notify on SWPrefetch 931 if (!pkt->cmd.isSWPrefetch()) 932 next_pf_time = prefetcher->notify(pkt); 933 } 934 } 935 } 936 937 if (next_pf_time != MaxTick) 938 schedMemSideSendEvent(next_pf_time); 939 940 return true; 941} 942 943PacketPtr 944Cache::createMissPacket(PacketPtr cpu_pkt, CacheBlk *blk, 945 bool needsWritable) const 946{ 947 // should never see evictions here 948 assert(!cpu_pkt->isEviction()); 949 950 bool blkValid = blk && blk->isValid(); 951 952 if (cpu_pkt->req->isUncacheable() || 953 (!blkValid && cpu_pkt->isUpgrade()) || 954 cpu_pkt->cmd == MemCmd::InvalidateReq) { 955 // uncacheable requests and upgrades from upper-level caches 956 // that missed completely just go through as is 957 return nullptr; 958 } 959 960 assert(cpu_pkt->needsResponse()); 961 962 MemCmd cmd; 963 // @TODO make useUpgrades a parameter. 964 // Note that ownership protocols require upgrade, otherwise a 965 // write miss on a shared owned block will generate a ReadExcl, 966 // which will clobber the owned copy. 967 const bool useUpgrades = true; 968 if (cpu_pkt->cmd == MemCmd::WriteLineReq) { 969 assert(!blkValid || !blk->isWritable()); 970 // forward as invalidate to all other caches, this gives us 971 // the line in Exclusive state, and invalidates all other 972 // copies 973 cmd = MemCmd::InvalidateReq; 974 } else if (blkValid && useUpgrades) { 975 // only reason to be here is that blk is read only and we need 976 // it to be writable 977 assert(needsWritable); 978 assert(!blk->isWritable()); 979 cmd = cpu_pkt->isLLSC() ? MemCmd::SCUpgradeReq : MemCmd::UpgradeReq; 980 } else if (cpu_pkt->cmd == MemCmd::SCUpgradeFailReq || 981 cpu_pkt->cmd == MemCmd::StoreCondFailReq) { 982 // Even though this SC will fail, we still need to send out the 983 // request and get the data to supply it to other snoopers in the case 984 // where the determination the StoreCond fails is delayed due to 985 // all caches not being on the same local bus. 986 cmd = MemCmd::SCUpgradeFailReq; 987 } else { 988 // block is invalid 989 cmd = needsWritable ? MemCmd::ReadExReq : 990 (isReadOnly ? MemCmd::ReadCleanReq : MemCmd::ReadSharedReq); 991 } 992 PacketPtr pkt = new Packet(cpu_pkt->req, cmd, blkSize); 993 994 // if there are upstream caches that have already marked the 995 // packet as having sharers (not passing writable), pass that info 996 // downstream 997 if (cpu_pkt->hasSharers() && !needsWritable) { 998 // note that cpu_pkt may have spent a considerable time in the 999 // MSHR queue and that the information could possibly be out 1000 // of date, however, there is no harm in conservatively 1001 // assuming the block has sharers 1002 pkt->setHasSharers(); 1003 DPRINTF(Cache, "%s: passing hasSharers from %s to %s\n", 1004 __func__, cpu_pkt->print(), pkt->print()); 1005 } 1006 1007 // the packet should be block aligned 1008 assert(pkt->getAddr() == pkt->getBlockAddr(blkSize)); 1009 1010 pkt->allocate(); 1011 DPRINTF(Cache, "%s: created %s from %s\n", __func__, pkt->print(), 1012 cpu_pkt->print()); 1013 return pkt; 1014} 1015 1016 1017Tick 1018Cache::recvAtomic(PacketPtr pkt) 1019{ 1020 // We are in atomic mode so we pay just for lookupLatency here. 1021 Cycles lat = lookupLatency; 1022 1023 // Forward the request if the system is in cache bypass mode. 1024 if (system->bypassCaches()) 1025 return ticksToCycles(memSidePort->sendAtomic(pkt)); 1026 1027 promoteWholeLineWrites(pkt); 1028 1029 // follow the same flow as in recvTimingReq, and check if a cache 1030 // above us is responding 1031 if (pkt->cacheResponding()) { 1032 DPRINTF(Cache, "Cache above responding to %s: not responding\n", 1033 pkt->print()); 1034 1035 // if a cache is responding, and it had the line in Owned 1036 // rather than Modified state, we need to invalidate any 1037 // copies that are not on the same path to memory 1038 assert(pkt->needsWritable() && !pkt->responderHadWritable()); 1039 lat += ticksToCycles(memSidePort->sendAtomic(pkt)); 1040 1041 return lat * clockPeriod(); 1042 } 1043 1044 // should assert here that there are no outstanding MSHRs or 1045 // writebacks... that would mean that someone used an atomic 1046 // access in timing mode 1047 1048 CacheBlk *blk = nullptr; 1049 PacketList writebacks; 1050 bool satisfied = access(pkt, blk, lat, writebacks); 1051 1052 // handle writebacks resulting from the access here to ensure they 1053 // logically proceed anything happening below 1054 doWritebacksAtomic(writebacks); 1055 1056 if (!satisfied) { 1057 // MISS 1058 1059 // deal with the packets that go through the write path of 1060 // the cache, i.e. any evictions and writes 1061 if (pkt->isEviction() || pkt->cmd == MemCmd::WriteClean || 1062 (pkt->req->isUncacheable() && pkt->isWrite())) { 1063 lat += ticksToCycles(memSidePort->sendAtomic(pkt)); 1064 return lat * clockPeriod(); 1065 } 1066 // only misses left 1067 1068 PacketPtr bus_pkt = createMissPacket(pkt, blk, pkt->needsWritable()); 1069 1070 bool is_forward = (bus_pkt == nullptr); 1071 1072 if (is_forward) { 1073 // just forwarding the same request to the next level 1074 // no local cache operation involved 1075 bus_pkt = pkt; 1076 } 1077 1078 DPRINTF(Cache, "%s: Sending an atomic %s\n", __func__, 1079 bus_pkt->print()); 1080 1081#if TRACING_ON 1082 CacheBlk::State old_state = blk ? blk->status : 0; 1083#endif 1084 1085 lat += ticksToCycles(memSidePort->sendAtomic(bus_pkt)); 1086 1087 bool is_invalidate = bus_pkt->isInvalidate(); 1088 1089 // We are now dealing with the response handling 1090 DPRINTF(Cache, "%s: Receive response: %s in state %i\n", __func__, 1091 bus_pkt->print(), old_state); 1092 1093 // If packet was a forward, the response (if any) is already 1094 // in place in the bus_pkt == pkt structure, so we don't need 1095 // to do anything. Otherwise, use the separate bus_pkt to 1096 // generate response to pkt and then delete it. 1097 if (!is_forward) { 1098 if (pkt->needsResponse()) { 1099 assert(bus_pkt->isResponse()); 1100 if (bus_pkt->isError()) { 1101 pkt->makeAtomicResponse(); 1102 pkt->copyError(bus_pkt); 1103 } else if (pkt->cmd == MemCmd::WriteLineReq) { 1104 // note the use of pkt, not bus_pkt here. 1105 1106 // write-line request to the cache that promoted 1107 // the write to a whole line 1108 blk = handleFill(pkt, blk, writebacks, 1109 allocOnFill(pkt->cmd)); 1110 assert(blk != NULL); 1111 is_invalidate = false; 1112 satisfyRequest(pkt, blk); 1113 } else if (bus_pkt->isRead() || 1114 bus_pkt->cmd == MemCmd::UpgradeResp) { 1115 // we're updating cache state to allow us to 1116 // satisfy the upstream request from the cache 1117 blk = handleFill(bus_pkt, blk, writebacks, 1118 allocOnFill(pkt->cmd)); 1119 satisfyRequest(pkt, blk); 1120 maintainClusivity(pkt->fromCache(), blk); 1121 } else { 1122 // we're satisfying the upstream request without 1123 // modifying cache state, e.g., a write-through 1124 pkt->makeAtomicResponse(); 1125 } 1126 } 1127 delete bus_pkt; 1128 } 1129 1130 if (is_invalidate && blk && blk->isValid()) { 1131 invalidateBlock(blk); 1132 } 1133 } 1134 1135 // Note that we don't invoke the prefetcher at all in atomic mode. 1136 // It's not clear how to do it properly, particularly for 1137 // prefetchers that aggressively generate prefetch candidates and 1138 // rely on bandwidth contention to throttle them; these will tend 1139 // to pollute the cache in atomic mode since there is no bandwidth 1140 // contention. If we ever do want to enable prefetching in atomic 1141 // mode, though, this is the place to do it... see timingAccess() 1142 // for an example (though we'd want to issue the prefetch(es) 1143 // immediately rather than calling requestMemSideBus() as we do 1144 // there). 1145 1146 // do any writebacks resulting from the response handling 1147 doWritebacksAtomic(writebacks); 1148 1149 // if we used temp block, check to see if its valid and if so 1150 // clear it out, but only do so after the call to recvAtomic is 1151 // finished so that any downstream observers (such as a snoop 1152 // filter), first see the fill, and only then see the eviction 1153 if (blk == tempBlock && tempBlock->isValid()) { 1154 // the atomic CPU calls recvAtomic for fetch and load/store 1155 // sequentuially, and we may already have a tempBlock 1156 // writeback from the fetch that we have not yet sent 1157 if (tempBlockWriteback) { 1158 // if that is the case, write the prevoius one back, and 1159 // do not schedule any new event 1160 writebackTempBlockAtomic(); 1161 } else { 1162 // the writeback/clean eviction happens after the call to 1163 // recvAtomic has finished (but before any successive 1164 // calls), so that the response handling from the fill is 1165 // allowed to happen first 1166 schedule(writebackTempBlockAtomicEvent, curTick()); 1167 } 1168 1169 tempBlockWriteback = (blk->isDirty() || writebackClean) ? 1170 writebackBlk(blk) : cleanEvictBlk(blk); 1171 invalidateBlock(blk); 1172 } 1173 1174 if (pkt->needsResponse()) { 1175 pkt->makeAtomicResponse(); 1176 } 1177 1178 return lat * clockPeriod(); 1179} 1180 1181 1182void 1183Cache::functionalAccess(PacketPtr pkt, bool fromCpuSide) 1184{ 1185 if (system->bypassCaches()) { 1186 // Packets from the memory side are snoop request and 1187 // shouldn't happen in bypass mode. 1188 assert(fromCpuSide); 1189 1190 // The cache should be flushed if we are in cache bypass mode, 1191 // so we don't need to check if we need to update anything. 1192 memSidePort->sendFunctional(pkt); 1193 return; 1194 } 1195 1196 Addr blk_addr = pkt->getBlockAddr(blkSize); 1197 bool is_secure = pkt->isSecure(); 1198 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); 1199 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure); 1200 1201 pkt->pushLabel(name()); 1202 1203 CacheBlkPrintWrapper cbpw(blk); 1204 1205 // Note that just because an L2/L3 has valid data doesn't mean an 1206 // L1 doesn't have a more up-to-date modified copy that still 1207 // needs to be found. As a result we always update the request if 1208 // we have it, but only declare it satisfied if we are the owner. 1209 1210 // see if we have data at all (owned or otherwise) 1211 bool have_data = blk && blk->isValid() 1212 && pkt->checkFunctional(&cbpw, blk_addr, is_secure, blkSize, 1213 blk->data); 1214 1215 // data we have is dirty if marked as such or if we have an 1216 // in-service MSHR that is pending a modified line 1217 bool have_dirty = 1218 have_data && (blk->isDirty() || 1219 (mshr && mshr->inService && mshr->isPendingModified())); 1220 1221 bool done = have_dirty 1222 || cpuSidePort->checkFunctional(pkt) 1223 || mshrQueue.checkFunctional(pkt, blk_addr) 1224 || writeBuffer.checkFunctional(pkt, blk_addr) 1225 || memSidePort->checkFunctional(pkt); 1226 1227 DPRINTF(CacheVerbose, "%s: %s %s%s%s\n", __func__, pkt->print(), 1228 (blk && blk->isValid()) ? "valid " : "", 1229 have_data ? "data " : "", done ? "done " : ""); 1230 1231 // We're leaving the cache, so pop cache->name() label 1232 pkt->popLabel(); 1233 1234 if (done) { 1235 pkt->makeResponse(); 1236 } else { 1237 // if it came as a request from the CPU side then make sure it 1238 // continues towards the memory side 1239 if (fromCpuSide) { 1240 memSidePort->sendFunctional(pkt); 1241 } else if (cpuSidePort->isSnooping()) { 1242 // if it came from the memory side, it must be a snoop request 1243 // and we should only forward it if we are forwarding snoops 1244 cpuSidePort->sendFunctionalSnoop(pkt); 1245 } 1246 } 1247} 1248 1249 1250///////////////////////////////////////////////////// 1251// 1252// Response handling: responses from the memory side 1253// 1254///////////////////////////////////////////////////// 1255 1256 1257void 1258Cache::handleUncacheableWriteResp(PacketPtr pkt) 1259{ 1260 Tick completion_time = clockEdge(responseLatency) + 1261 pkt->headerDelay + pkt->payloadDelay; 1262 1263 // Reset the bus additional time as it is now accounted for 1264 pkt->headerDelay = pkt->payloadDelay = 0; 1265 1266 cpuSidePort->schedTimingResp(pkt, completion_time, true); 1267} 1268 1269void 1270Cache::recvTimingResp(PacketPtr pkt) 1271{ 1272 assert(pkt->isResponse()); 1273 1274 // all header delay should be paid for by the crossbar, unless 1275 // this is a prefetch response from above 1276 panic_if(pkt->headerDelay != 0 && pkt->cmd != MemCmd::HardPFResp, 1277 "%s saw a non-zero packet delay\n", name()); 1278 1279 bool is_error = pkt->isError(); 1280 1281 if (is_error) { 1282 DPRINTF(Cache, "%s: Cache received %s with error\n", __func__, 1283 pkt->print()); 1284 } 1285 1286 DPRINTF(Cache, "%s: Handling response %s\n", __func__, 1287 pkt->print()); 1288 1289 // if this is a write, we should be looking at an uncacheable 1290 // write 1291 if (pkt->isWrite()) { 1292 assert(pkt->req->isUncacheable()); 1293 handleUncacheableWriteResp(pkt); 1294 return; 1295 } 1296 1297 // we have dealt with any (uncacheable) writes above, from here on 1298 // we know we are dealing with an MSHR due to a miss or a prefetch 1299 MSHR *mshr = dynamic_cast<MSHR*>(pkt->popSenderState()); 1300 assert(mshr); 1301 1302 if (mshr == noTargetMSHR) { 1303 // we always clear at least one target 1304 clearBlocked(Blocked_NoTargets); 1305 noTargetMSHR = nullptr; 1306 } 1307 1308 // Initial target is used just for stats 1309 MSHR::Target *initial_tgt = mshr->getTarget(); 1310 int stats_cmd_idx = initial_tgt->pkt->cmdToIndex(); 1311 Tick miss_latency = curTick() - initial_tgt->recvTime; 1312 1313 if (pkt->req->isUncacheable()) { 1314 assert(pkt->req->masterId() < system->maxMasters()); 1315 mshr_uncacheable_lat[stats_cmd_idx][pkt->req->masterId()] += 1316 miss_latency; 1317 } else { 1318 assert(pkt->req->masterId() < system->maxMasters()); 1319 mshr_miss_latency[stats_cmd_idx][pkt->req->masterId()] += 1320 miss_latency; 1321 } 1322 1323 bool wasFull = mshrQueue.isFull(); 1324 1325 PacketList writebacks; 1326 1327 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 1328 1329 // upgrade deferred targets if the response has no sharers, and is 1330 // thus passing writable 1331 if (!pkt->hasSharers()) { 1332 mshr->promoteWritable(); 1333 } 1334 1335 bool is_fill = !mshr->isForward && 1336 (pkt->isRead() || pkt->cmd == MemCmd::UpgradeResp); 1337 1338 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); 1339 1340 if (is_fill && !is_error) { 1341 DPRINTF(Cache, "Block for addr %#llx being updated in Cache\n", 1342 pkt->getAddr()); 1343 1344 blk = handleFill(pkt, blk, writebacks, mshr->allocOnFill()); 1345 assert(blk != nullptr); 1346 } 1347 1348 // allow invalidation responses originating from write-line 1349 // requests to be discarded 1350 bool is_invalidate = pkt->isInvalidate(); 1351 1352 // First offset for critical word first calculations 1353 int initial_offset = initial_tgt->pkt->getOffset(blkSize); 1354 1355 bool from_cache = false; 1356 MSHR::TargetList targets = mshr->extractServiceableTargets(pkt); 1357 for (auto &target: targets) { 1358 Packet *tgt_pkt = target.pkt; 1359 switch (target.source) { 1360 case MSHR::Target::FromCPU: 1361 Tick completion_time; 1362 // Here we charge on completion_time the delay of the xbar if the 1363 // packet comes from it, charged on headerDelay. 1364 completion_time = pkt->headerDelay; 1365 1366 // Software prefetch handling for cache closest to core 1367 if (tgt_pkt->cmd.isSWPrefetch()) { 1368 // a software prefetch would have already been ack'd 1369 // immediately with dummy data so the core would be able to 1370 // retire it. This request completes right here, so we 1371 // deallocate it. 1372 delete tgt_pkt->req; 1373 delete tgt_pkt; 1374 break; // skip response 1375 } 1376 1377 // keep track of whether we have responded to another 1378 // cache 1379 from_cache = from_cache || tgt_pkt->fromCache(); 1380 1381 // unlike the other packet flows, where data is found in other 1382 // caches or memory and brought back, write-line requests always 1383 // have the data right away, so the above check for "is fill?" 1384 // cannot actually be determined until examining the stored MSHR 1385 // state. We "catch up" with that logic here, which is duplicated 1386 // from above. 1387 if (tgt_pkt->cmd == MemCmd::WriteLineReq) { 1388 assert(!is_error); 1389 // we got the block in a writable state, so promote 1390 // any deferred targets if possible 1391 mshr->promoteWritable(); 1392 // NB: we use the original packet here and not the response! 1393 blk = handleFill(tgt_pkt, blk, writebacks, 1394 targets.allocOnFill); 1395 assert(blk != nullptr); 1396 1397 // treat as a fill, and discard the invalidation 1398 // response 1399 is_fill = true; 1400 is_invalidate = false; 1401 } 1402 1403 if (is_fill) { 1404 satisfyRequest(tgt_pkt, blk, true, mshr->hasPostDowngrade()); 1405 1406 // How many bytes past the first request is this one 1407 int transfer_offset = 1408 tgt_pkt->getOffset(blkSize) - initial_offset; 1409 if (transfer_offset < 0) { 1410 transfer_offset += blkSize; 1411 } 1412 1413 // If not critical word (offset) return payloadDelay. 1414 // responseLatency is the latency of the return path 1415 // from lower level caches/memory to an upper level cache or 1416 // the core. 1417 completion_time += clockEdge(responseLatency) + 1418 (transfer_offset ? pkt->payloadDelay : 0); 1419 1420 assert(!tgt_pkt->req->isUncacheable()); 1421 1422 assert(tgt_pkt->req->masterId() < system->maxMasters()); 1423 missLatency[tgt_pkt->cmdToIndex()][tgt_pkt->req->masterId()] += 1424 completion_time - target.recvTime; 1425 } else if (pkt->cmd == MemCmd::UpgradeFailResp) { 1426 // failed StoreCond upgrade 1427 assert(tgt_pkt->cmd == MemCmd::StoreCondReq || 1428 tgt_pkt->cmd == MemCmd::StoreCondFailReq || 1429 tgt_pkt->cmd == MemCmd::SCUpgradeFailReq); 1430 // responseLatency is the latency of the return path 1431 // from lower level caches/memory to an upper level cache or 1432 // the core. 1433 completion_time += clockEdge(responseLatency) + 1434 pkt->payloadDelay; 1435 tgt_pkt->req->setExtraData(0); 1436 } else { 1437 // We are about to send a response to a cache above 1438 // that asked for an invalidation; we need to 1439 // invalidate our copy immediately as the most 1440 // up-to-date copy of the block will now be in the 1441 // cache above. It will also prevent this cache from 1442 // responding (if the block was previously dirty) to 1443 // snoops as they should snoop the caches above where 1444 // they will get the response from. 1445 if (is_invalidate && blk && blk->isValid()) { 1446 invalidateBlock(blk); 1447 } 1448 // not a cache fill, just forwarding response 1449 // responseLatency is the latency of the return path 1450 // from lower level cahces/memory to the core. 1451 completion_time += clockEdge(responseLatency) + 1452 pkt->payloadDelay; 1453 if (pkt->isRead() && !is_error) { 1454 // sanity check 1455 assert(pkt->getAddr() == tgt_pkt->getAddr()); 1456 assert(pkt->getSize() >= tgt_pkt->getSize()); 1457 1458 tgt_pkt->setData(pkt->getConstPtr<uint8_t>()); 1459 } 1460 } 1461 tgt_pkt->makeTimingResponse(); 1462 // if this packet is an error copy that to the new packet 1463 if (is_error) 1464 tgt_pkt->copyError(pkt); 1465 if (tgt_pkt->cmd == MemCmd::ReadResp && 1466 (is_invalidate || mshr->hasPostInvalidate())) { 1467 // If intermediate cache got ReadRespWithInvalidate, 1468 // propagate that. Response should not have 1469 // isInvalidate() set otherwise. 1470 tgt_pkt->cmd = MemCmd::ReadRespWithInvalidate; 1471 DPRINTF(Cache, "%s: updated cmd to %s\n", __func__, 1472 tgt_pkt->print()); 1473 } 1474 // Reset the bus additional time as it is now accounted for 1475 tgt_pkt->headerDelay = tgt_pkt->payloadDelay = 0; 1476 cpuSidePort->schedTimingResp(tgt_pkt, completion_time, true); 1477 break; 1478 1479 case MSHR::Target::FromPrefetcher: 1480 assert(tgt_pkt->cmd == MemCmd::HardPFReq); 1481 if (blk) 1482 blk->status |= BlkHWPrefetched; 1483 delete tgt_pkt->req; 1484 delete tgt_pkt; 1485 break; 1486 1487 case MSHR::Target::FromSnoop: 1488 // I don't believe that a snoop can be in an error state 1489 assert(!is_error); 1490 // response to snoop request 1491 DPRINTF(Cache, "processing deferred snoop...\n"); 1492 // If the response is invalidating, a snooping target can 1493 // be satisfied if it is also invalidating. If the reponse is, not 1494 // only invalidating, but more specifically an InvalidateResp, the 1495 // MSHR was created due to an InvalidateReq and a cache above is 1496 // waiting to satisfy a WriteLineReq. In this case even an 1497 // non-invalidating snoop is added as a target here since this is 1498 // the ordering point. When the InvalidateResp reaches this cache, 1499 // the snooping target will snoop further the cache above with the 1500 // WriteLineReq. 1501 assert(!(is_invalidate && 1502 pkt->cmd != MemCmd::InvalidateResp && 1503 !mshr->hasPostInvalidate())); 1504 handleSnoop(tgt_pkt, blk, true, true, mshr->hasPostInvalidate()); 1505 break; 1506 1507 default: 1508 panic("Illegal target->source enum %d\n", target.source); 1509 } 1510 } 1511 1512 maintainClusivity(from_cache, blk); 1513 1514 if (blk && blk->isValid()) { 1515 // an invalidate response stemming from a write line request 1516 // should not invalidate the block, so check if the 1517 // invalidation should be discarded 1518 if (is_invalidate || mshr->hasPostInvalidate()) { 1519 invalidateBlock(blk); 1520 } else if (mshr->hasPostDowngrade()) { 1521 blk->status &= ~BlkWritable; 1522 } 1523 } 1524 1525 if (mshr->promoteDeferredTargets()) { 1526 // avoid later read getting stale data while write miss is 1527 // outstanding.. see comment in timingAccess() 1528 if (blk) { 1529 blk->status &= ~BlkReadable; 1530 } 1531 mshrQueue.markPending(mshr); 1532 schedMemSideSendEvent(clockEdge() + pkt->payloadDelay); 1533 } else { 1534 mshrQueue.deallocate(mshr); 1535 if (wasFull && !mshrQueue.isFull()) { 1536 clearBlocked(Blocked_NoMSHRs); 1537 } 1538 1539 // Request the bus for a prefetch if this deallocation freed enough 1540 // MSHRs for a prefetch to take place 1541 if (prefetcher && mshrQueue.canPrefetch()) { 1542 Tick next_pf_time = std::max(prefetcher->nextPrefetchReadyTime(), 1543 clockEdge()); 1544 if (next_pf_time != MaxTick) 1545 schedMemSideSendEvent(next_pf_time); 1546 } 1547 } 1548 // reset the xbar additional timinig as it is now accounted for 1549 pkt->headerDelay = pkt->payloadDelay = 0; 1550 1551 // copy writebacks to write buffer 1552 doWritebacks(writebacks, forward_time); 1553 1554 // if we used temp block, check to see if its valid and then clear it out 1555 if (blk == tempBlock && tempBlock->isValid()) { 1556 // We use forwardLatency here because we are copying 1557 // Writebacks/CleanEvicts to write buffer. It specifies the latency to 1558 // allocate an internal buffer and to schedule an event to the 1559 // queued port. 1560 if (blk->isDirty() || writebackClean) { 1561 PacketPtr wbPkt = writebackBlk(blk); 1562 allocateWriteBuffer(wbPkt, forward_time); 1563 // Set BLOCK_CACHED flag if cached above. 1564 if (isCachedAbove(wbPkt)) 1565 wbPkt->setBlockCached(); 1566 } else { 1567 PacketPtr wcPkt = cleanEvictBlk(blk); 1568 // Check to see if block is cached above. If not allocate 1569 // write buffer 1570 if (isCachedAbove(wcPkt)) 1571 delete wcPkt; 1572 else 1573 allocateWriteBuffer(wcPkt, forward_time); 1574 } 1575 invalidateBlock(blk); 1576 } 1577 1578 DPRINTF(CacheVerbose, "%s: Leaving with %s\n", __func__, pkt->print()); 1579 delete pkt; 1580} 1581 1582PacketPtr 1583Cache::writebackBlk(CacheBlk *blk) 1584{ 1585 chatty_assert(!isReadOnly || writebackClean, 1586 "Writeback from read-only cache"); 1587 assert(blk && blk->isValid() && (blk->isDirty() || writebackClean)); 1588 1589 writebacks[Request::wbMasterId]++; 1590 1591 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set), 1592 blkSize, 0, Request::wbMasterId); 1593 if (blk->isSecure()) 1594 req->setFlags(Request::SECURE); 1595 1596 req->taskId(blk->task_id); 1597 blk->task_id= ContextSwitchTaskId::Unknown; 1598 blk->tickInserted = curTick(); 1599 1600 PacketPtr pkt = 1601 new Packet(req, blk->isDirty() ? 1602 MemCmd::WritebackDirty : MemCmd::WritebackClean); 1603 1604 DPRINTF(Cache, "Create Writeback %s writable: %d, dirty: %d\n", 1605 pkt->print(), blk->isWritable(), blk->isDirty()); 1606 1607 if (blk->isWritable()) { 1608 // not asserting shared means we pass the block in modified 1609 // state, mark our own block non-writeable 1610 blk->status &= ~BlkWritable; 1611 } else { 1612 // we are in the Owned state, tell the receiver 1613 pkt->setHasSharers(); 1614 } 1615 1616 // make sure the block is not marked dirty 1617 blk->status &= ~BlkDirty; 1618 1619 pkt->allocate(); 1620 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize); 1621 1622 return pkt; 1623} 1624 1625PacketPtr 1626Cache::writecleanBlk(CacheBlk *blk) 1627{ 1628 Request *req = new Request(tags->regenerateBlkAddr(blk->tag, blk->set), 1629 blkSize, 0, Request::wbMasterId); 1630 if (blk->isSecure()) { 1631 req->setFlags(Request::SECURE); 1632 } 1633 req->taskId(blk->task_id); 1634 blk->task_id = ContextSwitchTaskId::Unknown; 1635 PacketPtr pkt = new Packet(req, MemCmd::WriteClean); 1636 DPRINTF(Cache, "Create %s writable: %d, dirty: %d\n", pkt->print(), 1637 blk->isWritable(), blk->isDirty()); 1638 // make sure the block is not marked dirty 1639 blk->status &= ~BlkDirty; 1640 pkt->allocate(); 1641 // We inform the cache below that the block has sharers in the 1642 // system as we retain our copy. 1643 pkt->setHasSharers(); 1644 std::memcpy(pkt->getPtr<uint8_t>(), blk->data, blkSize); 1645 return pkt; 1646} 1647 1648 1649PacketPtr 1650Cache::cleanEvictBlk(CacheBlk *blk) 1651{ 1652 assert(!writebackClean); 1653 assert(blk && blk->isValid() && !blk->isDirty()); 1654 // Creating a zero sized write, a message to the snoop filter 1655 Request *req = 1656 new Request(tags->regenerateBlkAddr(blk->tag, blk->set), blkSize, 0, 1657 Request::wbMasterId); 1658 if (blk->isSecure()) 1659 req->setFlags(Request::SECURE); 1660 1661 req->taskId(blk->task_id); 1662 blk->task_id = ContextSwitchTaskId::Unknown; 1663 blk->tickInserted = curTick(); 1664 1665 PacketPtr pkt = new Packet(req, MemCmd::CleanEvict); 1666 pkt->allocate(); 1667 DPRINTF(Cache, "Create CleanEvict %s\n", pkt->print()); 1668 1669 return pkt; 1670} 1671 1672void 1673Cache::memWriteback() 1674{ 1675 CacheBlkVisitorWrapper visitor(*this, &Cache::writebackVisitor); 1676 tags->forEachBlk(visitor); 1677} 1678 1679void 1680Cache::memInvalidate() 1681{ 1682 CacheBlkVisitorWrapper visitor(*this, &Cache::invalidateVisitor); 1683 tags->forEachBlk(visitor); 1684} 1685 1686bool 1687Cache::isDirty() const 1688{ 1689 CacheBlkIsDirtyVisitor visitor; 1690 tags->forEachBlk(visitor); 1691 1692 return visitor.isDirty(); 1693} 1694 1695bool 1696Cache::writebackVisitor(CacheBlk &blk) 1697{ 1698 if (blk.isDirty()) { 1699 assert(blk.isValid()); 1700 1701 Request request(tags->regenerateBlkAddr(blk.tag, blk.set), 1702 blkSize, 0, Request::funcMasterId); 1703 request.taskId(blk.task_id); 1704 if (blk.isSecure()) { 1705 request.setFlags(Request::SECURE); 1706 } 1707 1708 Packet packet(&request, MemCmd::WriteReq); 1709 packet.dataStatic(blk.data); 1710 1711 memSidePort->sendFunctional(&packet); 1712 1713 blk.status &= ~BlkDirty; 1714 } 1715 1716 return true; 1717} 1718 1719bool 1720Cache::invalidateVisitor(CacheBlk &blk) 1721{ 1722 1723 if (blk.isDirty()) 1724 warn_once("Invalidating dirty cache lines. Expect things to break.\n"); 1725 1726 if (blk.isValid()) { 1727 assert(!blk.isDirty()); 1728 invalidateBlock(&blk); 1729 } 1730 1731 return true; 1732} 1733 1734CacheBlk* 1735Cache::allocateBlock(Addr addr, bool is_secure, PacketList &writebacks) 1736{ 1737 CacheBlk *blk = tags->findVictim(addr); 1738 1739 // It is valid to return nullptr if there is no victim 1740 if (!blk) 1741 return nullptr; 1742 1743 if (blk->isValid()) { 1744 Addr repl_addr = tags->regenerateBlkAddr(blk->tag, blk->set); 1745 MSHR *repl_mshr = mshrQueue.findMatch(repl_addr, blk->isSecure()); 1746 if (repl_mshr) { 1747 // must be an outstanding upgrade request 1748 // on a block we're about to replace... 1749 assert(!blk->isWritable() || blk->isDirty()); 1750 assert(repl_mshr->needsWritable()); 1751 // too hard to replace block with transient state 1752 // allocation failed, block not inserted 1753 return nullptr; 1754 } else { 1755 DPRINTF(Cache, "replacement: replacing %#llx (%s) with %#llx " 1756 "(%s): %s\n", repl_addr, blk->isSecure() ? "s" : "ns", 1757 addr, is_secure ? "s" : "ns", 1758 blk->isDirty() ? "writeback" : "clean"); 1759 1760 if (blk->wasPrefetched()) { 1761 unusedPrefetches++; 1762 } 1763 // Will send up Writeback/CleanEvict snoops via isCachedAbove 1764 // when pushing this writeback list into the write buffer. 1765 if (blk->isDirty() || writebackClean) { 1766 // Save writeback packet for handling by caller 1767 writebacks.push_back(writebackBlk(blk)); 1768 } else { 1769 writebacks.push_back(cleanEvictBlk(blk)); 1770 } 1771 } 1772 } 1773 1774 return blk; 1775} 1776 1777void 1778Cache::invalidateBlock(CacheBlk *blk) 1779{ 1780 if (blk != tempBlock) 1781 tags->invalidate(blk); 1782 blk->invalidate(); 1783} 1784 1785// Note that the reason we return a list of writebacks rather than 1786// inserting them directly in the write buffer is that this function 1787// is called by both atomic and timing-mode accesses, and in atomic 1788// mode we don't mess with the write buffer (we just perform the 1789// writebacks atomically once the original request is complete). 1790CacheBlk* 1791Cache::handleFill(PacketPtr pkt, CacheBlk *blk, PacketList &writebacks, 1792 bool allocate) 1793{ 1794 assert(pkt->isResponse() || pkt->cmd == MemCmd::WriteLineReq); 1795 Addr addr = pkt->getAddr(); 1796 bool is_secure = pkt->isSecure(); 1797#if TRACING_ON 1798 CacheBlk::State old_state = blk ? blk->status : 0; 1799#endif 1800 1801 // When handling a fill, we should have no writes to this line. 1802 assert(addr == pkt->getBlockAddr(blkSize)); 1803 assert(!writeBuffer.findMatch(addr, is_secure)); 1804 1805 if (blk == nullptr) { 1806 // better have read new data... 1807 assert(pkt->hasData()); 1808 1809 // only read responses and write-line requests have data; 1810 // note that we don't write the data here for write-line - that 1811 // happens in the subsequent call to satisfyRequest 1812 assert(pkt->isRead() || pkt->cmd == MemCmd::WriteLineReq); 1813 1814 // need to do a replacement if allocating, otherwise we stick 1815 // with the temporary storage 1816 blk = allocate ? allocateBlock(addr, is_secure, writebacks) : nullptr; 1817 1818 if (blk == nullptr) { 1819 // No replaceable block or a mostly exclusive 1820 // cache... just use temporary storage to complete the 1821 // current request and then get rid of it 1822 assert(!tempBlock->isValid()); 1823 blk = tempBlock; 1824 tempBlock->set = tags->extractSet(addr); 1825 tempBlock->tag = tags->extractTag(addr); 1826 // @todo: set security state as well... 1827 DPRINTF(Cache, "using temp block for %#llx (%s)\n", addr, 1828 is_secure ? "s" : "ns"); 1829 } else { 1830 tags->insertBlock(pkt, blk); 1831 } 1832 1833 // we should never be overwriting a valid block 1834 assert(!blk->isValid()); 1835 } else { 1836 // existing block... probably an upgrade 1837 assert(blk->tag == tags->extractTag(addr)); 1838 // either we're getting new data or the block should already be valid 1839 assert(pkt->hasData() || blk->isValid()); 1840 // don't clear block status... if block is already dirty we 1841 // don't want to lose that 1842 } 1843 1844 if (is_secure) 1845 blk->status |= BlkSecure; 1846 blk->status |= BlkValid | BlkReadable; 1847 1848 // sanity check for whole-line writes, which should always be 1849 // marked as writable as part of the fill, and then later marked 1850 // dirty as part of satisfyRequest 1851 if (pkt->cmd == MemCmd::WriteLineReq) { 1852 assert(!pkt->hasSharers()); 1853 } 1854 1855 // here we deal with setting the appropriate state of the line, 1856 // and we start by looking at the hasSharers flag, and ignore the 1857 // cacheResponding flag (normally signalling dirty data) if the 1858 // packet has sharers, thus the line is never allocated as Owned 1859 // (dirty but not writable), and always ends up being either 1860 // Shared, Exclusive or Modified, see Packet::setCacheResponding 1861 // for more details 1862 if (!pkt->hasSharers()) { 1863 // we could get a writable line from memory (rather than a 1864 // cache) even in a read-only cache, note that we set this bit 1865 // even for a read-only cache, possibly revisit this decision 1866 blk->status |= BlkWritable; 1867 1868 // check if we got this via cache-to-cache transfer (i.e., from a 1869 // cache that had the block in Modified or Owned state) 1870 if (pkt->cacheResponding()) { 1871 // we got the block in Modified state, and invalidated the 1872 // owners copy 1873 blk->status |= BlkDirty; 1874 1875 chatty_assert(!isReadOnly, "Should never see dirty snoop response " 1876 "in read-only cache %s\n", name()); 1877 } 1878 } 1879 1880 DPRINTF(Cache, "Block addr %#llx (%s) moving from state %x to %s\n", 1881 addr, is_secure ? "s" : "ns", old_state, blk->print()); 1882 1883 // if we got new data, copy it in (checking for a read response 1884 // and a response that has data is the same in the end) 1885 if (pkt->isRead()) { 1886 // sanity checks 1887 assert(pkt->hasData()); 1888 assert(pkt->getSize() == blkSize); 1889 1890 std::memcpy(blk->data, pkt->getConstPtr<uint8_t>(), blkSize); 1891 } 1892 // We pay for fillLatency here. 1893 blk->whenReady = clockEdge() + fillLatency * clockPeriod() + 1894 pkt->payloadDelay; 1895 1896 return blk; 1897} 1898 1899 1900///////////////////////////////////////////////////// 1901// 1902// Snoop path: requests coming in from the memory side 1903// 1904///////////////////////////////////////////////////// 1905 1906void 1907Cache::doTimingSupplyResponse(PacketPtr req_pkt, const uint8_t *blk_data, 1908 bool already_copied, bool pending_inval) 1909{ 1910 // sanity check 1911 assert(req_pkt->isRequest()); 1912 assert(req_pkt->needsResponse()); 1913 1914 DPRINTF(Cache, "%s: for %s\n", __func__, req_pkt->print()); 1915 // timing-mode snoop responses require a new packet, unless we 1916 // already made a copy... 1917 PacketPtr pkt = req_pkt; 1918 if (!already_copied) 1919 // do not clear flags, and allocate space for data if the 1920 // packet needs it (the only packets that carry data are read 1921 // responses) 1922 pkt = new Packet(req_pkt, false, req_pkt->isRead()); 1923 1924 assert(req_pkt->req->isUncacheable() || req_pkt->isInvalidate() || 1925 pkt->hasSharers()); 1926 pkt->makeTimingResponse(); 1927 if (pkt->isRead()) { 1928 pkt->setDataFromBlock(blk_data, blkSize); 1929 } 1930 if (pkt->cmd == MemCmd::ReadResp && pending_inval) { 1931 // Assume we defer a response to a read from a far-away cache 1932 // A, then later defer a ReadExcl from a cache B on the same 1933 // bus as us. We'll assert cacheResponding in both cases, but 1934 // in the latter case cacheResponding will keep the 1935 // invalidation from reaching cache A. This special response 1936 // tells cache A that it gets the block to satisfy its read, 1937 // but must immediately invalidate it. 1938 pkt->cmd = MemCmd::ReadRespWithInvalidate; 1939 } 1940 // Here we consider forward_time, paying for just forward latency and 1941 // also charging the delay provided by the xbar. 1942 // forward_time is used as send_time in next allocateWriteBuffer(). 1943 Tick forward_time = clockEdge(forwardLatency) + pkt->headerDelay; 1944 // Here we reset the timing of the packet. 1945 pkt->headerDelay = pkt->payloadDelay = 0; 1946 DPRINTF(CacheVerbose, "%s: created response: %s tick: %lu\n", __func__, 1947 pkt->print(), forward_time); 1948 memSidePort->schedTimingSnoopResp(pkt, forward_time, true); 1949} 1950 1951uint32_t 1952Cache::handleSnoop(PacketPtr pkt, CacheBlk *blk, bool is_timing, 1953 bool is_deferred, bool pending_inval) 1954{ 1955 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print()); 1956 // deferred snoops can only happen in timing mode 1957 assert(!(is_deferred && !is_timing)); 1958 // pending_inval only makes sense on deferred snoops 1959 assert(!(pending_inval && !is_deferred)); 1960 assert(pkt->isRequest()); 1961 1962 // the packet may get modified if we or a forwarded snooper 1963 // responds in atomic mode, so remember a few things about the 1964 // original packet up front 1965 bool invalidate = pkt->isInvalidate(); 1966 bool M5_VAR_USED needs_writable = pkt->needsWritable(); 1967 1968 // at the moment we could get an uncacheable write which does not 1969 // have the invalidate flag, and we need a suitable way of dealing 1970 // with this case 1971 panic_if(invalidate && pkt->req->isUncacheable(), 1972 "%s got an invalidating uncacheable snoop request %s", 1973 name(), pkt->print()); 1974 1975 uint32_t snoop_delay = 0; 1976 1977 if (forwardSnoops) { 1978 // first propagate snoop upward to see if anyone above us wants to 1979 // handle it. save & restore packet src since it will get 1980 // rewritten to be relative to cpu-side bus (if any) 1981 bool alreadyResponded = pkt->cacheResponding(); 1982 if (is_timing) { 1983 // copy the packet so that we can clear any flags before 1984 // forwarding it upwards, we also allocate data (passing 1985 // the pointer along in case of static data), in case 1986 // there is a snoop hit in upper levels 1987 Packet snoopPkt(pkt, true, true); 1988 snoopPkt.setExpressSnoop(); 1989 // the snoop packet does not need to wait any additional 1990 // time 1991 snoopPkt.headerDelay = snoopPkt.payloadDelay = 0; 1992 cpuSidePort->sendTimingSnoopReq(&snoopPkt); 1993 1994 // add the header delay (including crossbar and snoop 1995 // delays) of the upward snoop to the snoop delay for this 1996 // cache 1997 snoop_delay += snoopPkt.headerDelay; 1998 1999 if (snoopPkt.cacheResponding()) { 2000 // cache-to-cache response from some upper cache 2001 assert(!alreadyResponded); 2002 pkt->setCacheResponding(); 2003 } 2004 // upstream cache has the block, or has an outstanding 2005 // MSHR, pass the flag on 2006 if (snoopPkt.hasSharers()) { 2007 pkt->setHasSharers(); 2008 } 2009 // If this request is a prefetch or clean evict and an upper level 2010 // signals block present, make sure to propagate the block 2011 // presence to the requester. 2012 if (snoopPkt.isBlockCached()) { 2013 pkt->setBlockCached(); 2014 } 2015 } else { 2016 cpuSidePort->sendAtomicSnoop(pkt); 2017 if (!alreadyResponded && pkt->cacheResponding()) { 2018 // cache-to-cache response from some upper cache: 2019 // forward response to original requester 2020 assert(pkt->isResponse()); 2021 } 2022 } 2023 } 2024 2025 if (!blk || !blk->isValid()) { 2026 DPRINTF(CacheVerbose, "%s: snoop miss for %s\n", __func__, 2027 pkt->print()); 2028 if (is_deferred) { 2029 // we no longer have the block, and will not respond, but a 2030 // packet was allocated in MSHR::handleSnoop and we have 2031 // to delete it 2032 assert(pkt->needsResponse()); 2033 2034 // we have passed the block to a cache upstream, that 2035 // cache should be responding 2036 assert(pkt->cacheResponding()); 2037 2038 delete pkt; 2039 } 2040 return snoop_delay; 2041 } else { 2042 DPRINTF(Cache, "%s: snoop hit for %s, old state is %s\n", __func__, 2043 pkt->print(), blk->print()); 2044 } 2045 2046 chatty_assert(!(isReadOnly && blk->isDirty()), 2047 "Should never have a dirty block in a read-only cache %s\n", 2048 name()); 2049 2050 // We may end up modifying both the block state and the packet (if 2051 // we respond in atomic mode), so just figure out what to do now 2052 // and then do it later. We respond to all snoops that need 2053 // responses provided we have the block in dirty state. The 2054 // invalidation itself is taken care of below. 2055 bool respond = blk->isDirty() && pkt->needsResponse(); 2056 bool have_writable = blk->isWritable(); 2057 2058 // Invalidate any prefetch's from below that would strip write permissions 2059 // MemCmd::HardPFReq is only observed by upstream caches. After missing 2060 // above and in it's own cache, a new MemCmd::ReadReq is created that 2061 // downstream caches observe. 2062 if (pkt->mustCheckAbove()) { 2063 DPRINTF(Cache, "Found addr %#llx in upper level cache for snoop %s " 2064 "from lower cache\n", pkt->getAddr(), pkt->print()); 2065 pkt->setBlockCached(); 2066 return snoop_delay; 2067 } 2068 2069 if (pkt->isRead() && !invalidate) { 2070 // reading without requiring the line in a writable state 2071 assert(!needs_writable); 2072 pkt->setHasSharers(); 2073 2074 // if the requesting packet is uncacheable, retain the line in 2075 // the current state, otherwhise unset the writable flag, 2076 // which means we go from Modified to Owned (and will respond 2077 // below), remain in Owned (and will respond below), from 2078 // Exclusive to Shared, or remain in Shared 2079 if (!pkt->req->isUncacheable()) 2080 blk->status &= ~BlkWritable; 2081 } 2082 2083 if (respond) { 2084 // prevent anyone else from responding, cache as well as 2085 // memory, and also prevent any memory from even seeing the 2086 // request 2087 pkt->setCacheResponding(); 2088 if (have_writable) { 2089 // inform the cache hierarchy that this cache had the line 2090 // in the Modified state so that we avoid unnecessary 2091 // invalidations (see Packet::setResponderHadWritable) 2092 pkt->setResponderHadWritable(); 2093 2094 // in the case of an uncacheable request there is no point 2095 // in setting the responderHadWritable flag, but since the 2096 // recipient does not care there is no harm in doing so 2097 } else { 2098 // if the packet has needsWritable set we invalidate our 2099 // copy below and all other copies will be invalidates 2100 // through express snoops, and if needsWritable is not set 2101 // we already called setHasSharers above 2102 } 2103 2104 // if we are returning a writable and dirty (Modified) line, 2105 // we should be invalidating the line 2106 panic_if(!invalidate && !pkt->hasSharers(), 2107 "%s is passing a Modified line through %s, " 2108 "but keeping the block", name(), pkt->print()); 2109 2110 if (is_timing) { 2111 doTimingSupplyResponse(pkt, blk->data, is_deferred, pending_inval); 2112 } else { 2113 pkt->makeAtomicResponse(); 2114 // packets such as upgrades do not actually have any data 2115 // payload 2116 if (pkt->hasData()) 2117 pkt->setDataFromBlock(blk->data, blkSize); 2118 } 2119 } 2120 2121 if (!respond && is_deferred) { 2122 assert(pkt->needsResponse()); 2123 2124 // if we copied the deferred packet with the intention to 2125 // respond, but are not responding, then a cache above us must 2126 // be, and we can use this as the indication of whether this 2127 // is a packet where we created a copy of the request or not 2128 if (!pkt->cacheResponding()) { 2129 delete pkt->req; 2130 } 2131 2132 delete pkt; 2133 } 2134 2135 // Do this last in case it deallocates block data or something 2136 // like that 2137 if (invalidate) { 2138 invalidateBlock(blk); 2139 } 2140 2141 DPRINTF(Cache, "new state is %s\n", blk->print()); 2142 2143 return snoop_delay; 2144} 2145 2146 2147void 2148Cache::recvTimingSnoopReq(PacketPtr pkt) 2149{ 2150 DPRINTF(CacheVerbose, "%s: for %s\n", __func__, pkt->print()); 2151 2152 // Snoops shouldn't happen when bypassing caches 2153 assert(!system->bypassCaches()); 2154 2155 // no need to snoop requests that are not in range 2156 if (!inRange(pkt->getAddr())) { 2157 return; 2158 } 2159 2160 bool is_secure = pkt->isSecure(); 2161 CacheBlk *blk = tags->findBlock(pkt->getAddr(), is_secure); 2162 2163 Addr blk_addr = pkt->getBlockAddr(blkSize); 2164 MSHR *mshr = mshrQueue.findMatch(blk_addr, is_secure); 2165 2166 // Update the latency cost of the snoop so that the crossbar can 2167 // account for it. Do not overwrite what other neighbouring caches 2168 // have already done, rather take the maximum. The update is 2169 // tentative, for cases where we return before an upward snoop 2170 // happens below. 2171 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, 2172 lookupLatency * clockPeriod()); 2173 2174 // Inform request(Prefetch, CleanEvict or Writeback) from below of 2175 // MSHR hit, set setBlockCached. 2176 if (mshr && pkt->mustCheckAbove()) { 2177 DPRINTF(Cache, "Setting block cached for %s from lower cache on " 2178 "mshr hit\n", pkt->print()); 2179 pkt->setBlockCached(); 2180 return; 2181 } 2182 2183 // Let the MSHR itself track the snoop and decide whether we want 2184 // to go ahead and do the regular cache snoop 2185 if (mshr && mshr->handleSnoop(pkt, order++)) { 2186 DPRINTF(Cache, "Deferring snoop on in-service MSHR to blk %#llx (%s)." 2187 "mshrs: %s\n", blk_addr, is_secure ? "s" : "ns", 2188 mshr->print()); 2189 2190 if (mshr->getNumTargets() > numTarget) 2191 warn("allocating bonus target for snoop"); //handle later 2192 return; 2193 } 2194 2195 //We also need to check the writeback buffers and handle those 2196 WriteQueueEntry *wb_entry = writeBuffer.findMatch(blk_addr, is_secure); 2197 if (wb_entry) { 2198 DPRINTF(Cache, "Snoop hit in writeback to addr %#llx (%s)\n", 2199 pkt->getAddr(), is_secure ? "s" : "ns"); 2200 // Expect to see only Writebacks and/or CleanEvicts here, both of 2201 // which should not be generated for uncacheable data. 2202 assert(!wb_entry->isUncacheable()); 2203 // There should only be a single request responsible for generating 2204 // Writebacks/CleanEvicts. 2205 assert(wb_entry->getNumTargets() == 1); 2206 PacketPtr wb_pkt = wb_entry->getTarget()->pkt; 2207 assert(wb_pkt->isEviction() || wb_pkt->cmd == MemCmd::WriteClean); 2208 2209 if (pkt->isEviction()) { 2210 // if the block is found in the write queue, set the BLOCK_CACHED 2211 // flag for Writeback/CleanEvict snoop. On return the snoop will 2212 // propagate the BLOCK_CACHED flag in Writeback packets and prevent 2213 // any CleanEvicts from travelling down the memory hierarchy. 2214 pkt->setBlockCached(); 2215 DPRINTF(Cache, "%s: Squashing %s from lower cache on writequeue " 2216 "hit\n", __func__, pkt->print()); 2217 return; 2218 } 2219 2220 // conceptually writebacks are no different to other blocks in 2221 // this cache, so the behaviour is modelled after handleSnoop, 2222 // the difference being that instead of querying the block 2223 // state to determine if it is dirty and writable, we use the 2224 // command and fields of the writeback packet 2225 bool respond = wb_pkt->cmd == MemCmd::WritebackDirty && 2226 pkt->needsResponse(); 2227 bool have_writable = !wb_pkt->hasSharers(); 2228 bool invalidate = pkt->isInvalidate(); 2229 2230 if (!pkt->req->isUncacheable() && pkt->isRead() && !invalidate) { 2231 assert(!pkt->needsWritable()); 2232 pkt->setHasSharers(); 2233 wb_pkt->setHasSharers(); 2234 } 2235 2236 if (respond) { 2237 pkt->setCacheResponding(); 2238 2239 if (have_writable) { 2240 pkt->setResponderHadWritable(); 2241 } 2242 2243 doTimingSupplyResponse(pkt, wb_pkt->getConstPtr<uint8_t>(), 2244 false, false); 2245 } 2246 2247 if (invalidate) { 2248 // Invalidation trumps our writeback... discard here 2249 // Note: markInService will remove entry from writeback buffer. 2250 markInService(wb_entry); 2251 delete wb_pkt; 2252 } 2253 } 2254 2255 // If this was a shared writeback, there may still be 2256 // other shared copies above that require invalidation. 2257 // We could be more selective and return here if the 2258 // request is non-exclusive or if the writeback is 2259 // exclusive. 2260 uint32_t snoop_delay = handleSnoop(pkt, blk, true, false, false); 2261 2262 // Override what we did when we first saw the snoop, as we now 2263 // also have the cost of the upwards snoops to account for 2264 pkt->snoopDelay = std::max<uint32_t>(pkt->snoopDelay, snoop_delay + 2265 lookupLatency * clockPeriod()); 2266} 2267 2268bool 2269Cache::CpuSidePort::recvTimingSnoopResp(PacketPtr pkt) 2270{ 2271 // Express snoop responses from master to slave, e.g., from L1 to L2 2272 cache->recvTimingSnoopResp(pkt); 2273 return true; 2274} 2275 2276Tick 2277Cache::recvAtomicSnoop(PacketPtr pkt) 2278{ 2279 // Snoops shouldn't happen when bypassing caches 2280 assert(!system->bypassCaches()); 2281 2282 // no need to snoop requests that are not in range. 2283 if (!inRange(pkt->getAddr())) { 2284 return 0; 2285 } 2286 2287 CacheBlk *blk = tags->findBlock(pkt->getAddr(), pkt->isSecure()); 2288 uint32_t snoop_delay = handleSnoop(pkt, blk, false, false, false); 2289 return snoop_delay + lookupLatency * clockPeriod(); 2290} 2291 2292 2293QueueEntry* 2294Cache::getNextQueueEntry() 2295{ 2296 // Check both MSHR queue and write buffer for potential requests, 2297 // note that null does not mean there is no request, it could 2298 // simply be that it is not ready 2299 MSHR *miss_mshr = mshrQueue.getNext(); 2300 WriteQueueEntry *wq_entry = writeBuffer.getNext(); 2301 2302 // If we got a write buffer request ready, first priority is a 2303 // full write buffer, otherwise we favour the miss requests 2304 if (wq_entry && (writeBuffer.isFull() || !miss_mshr)) { 2305 // need to search MSHR queue for conflicting earlier miss. 2306 MSHR *conflict_mshr = 2307 mshrQueue.findPending(wq_entry->blkAddr, 2308 wq_entry->isSecure); 2309 2310 if (conflict_mshr && conflict_mshr->order < wq_entry->order) { 2311 // Service misses in order until conflict is cleared. 2312 return conflict_mshr; 2313 2314 // @todo Note that we ignore the ready time of the conflict here 2315 } 2316 2317 // No conflicts; issue write 2318 return wq_entry; 2319 } else if (miss_mshr) { 2320 // need to check for conflicting earlier writeback 2321 WriteQueueEntry *conflict_mshr = 2322 writeBuffer.findPending(miss_mshr->blkAddr, 2323 miss_mshr->isSecure); 2324 if (conflict_mshr) { 2325 // not sure why we don't check order here... it was in the 2326 // original code but commented out. 2327 2328 // The only way this happens is if we are 2329 // doing a write and we didn't have permissions 2330 // then subsequently saw a writeback (owned got evicted) 2331 // We need to make sure to perform the writeback first 2332 // To preserve the dirty data, then we can issue the write 2333 2334 // should we return wq_entry here instead? I.e. do we 2335 // have to flush writes in order? I don't think so... not 2336 // for Alpha anyway. Maybe for x86? 2337 return conflict_mshr; 2338 2339 // @todo Note that we ignore the ready time of the conflict here 2340 } 2341 2342 // No conflicts; issue read 2343 return miss_mshr; 2344 } 2345 2346 // fall through... no pending requests. Try a prefetch. 2347 assert(!miss_mshr && !wq_entry); 2348 if (prefetcher && mshrQueue.canPrefetch()) { 2349 // If we have a miss queue slot, we can try a prefetch 2350 PacketPtr pkt = prefetcher->getPacket(); 2351 if (pkt) { 2352 Addr pf_addr = pkt->getBlockAddr(blkSize); 2353 if (!tags->findBlock(pf_addr, pkt->isSecure()) && 2354 !mshrQueue.findMatch(pf_addr, pkt->isSecure()) && 2355 !writeBuffer.findMatch(pf_addr, pkt->isSecure())) { 2356 // Update statistic on number of prefetches issued 2357 // (hwpf_mshr_misses) 2358 assert(pkt->req->masterId() < system->maxMasters()); 2359 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++; 2360 2361 // allocate an MSHR and return it, note 2362 // that we send the packet straight away, so do not 2363 // schedule the send 2364 return allocateMissBuffer(pkt, curTick(), false); 2365 } else { 2366 // free the request and packet 2367 delete pkt->req; 2368 delete pkt; 2369 } 2370 } 2371 } 2372 2373 return nullptr; 2374} 2375 2376bool 2377Cache::isCachedAbove(PacketPtr pkt, bool is_timing) const 2378{ 2379 if (!forwardSnoops) 2380 return false; 2381 // Mirroring the flow of HardPFReqs, the cache sends CleanEvict and 2382 // Writeback snoops into upper level caches to check for copies of the 2383 // same block. Using the BLOCK_CACHED flag with the Writeback/CleanEvict 2384 // packet, the cache can inform the crossbar below of presence or absence 2385 // of the block. 2386 if (is_timing) { 2387 Packet snoop_pkt(pkt, true, false); 2388 snoop_pkt.setExpressSnoop(); 2389 // Assert that packet is either Writeback or CleanEvict and not a 2390 // prefetch request because prefetch requests need an MSHR and may 2391 // generate a snoop response. 2392 assert(pkt->isEviction() || pkt->cmd == MemCmd::WriteClean); 2393 snoop_pkt.senderState = nullptr; 2394 cpuSidePort->sendTimingSnoopReq(&snoop_pkt); 2395 // Writeback/CleanEvict snoops do not generate a snoop response. 2396 assert(!(snoop_pkt.cacheResponding())); 2397 return snoop_pkt.isBlockCached(); 2398 } else { 2399 cpuSidePort->sendAtomicSnoop(pkt); 2400 return pkt->isBlockCached(); 2401 } 2402} 2403 2404Tick 2405Cache::nextQueueReadyTime() const 2406{ 2407 Tick nextReady = std::min(mshrQueue.nextReadyTime(), 2408 writeBuffer.nextReadyTime()); 2409 2410 // Don't signal prefetch ready time if no MSHRs available 2411 // Will signal once enoguh MSHRs are deallocated 2412 if (prefetcher && mshrQueue.canPrefetch()) { 2413 nextReady = std::min(nextReady, 2414 prefetcher->nextPrefetchReadyTime()); 2415 } 2416 2417 return nextReady; 2418} 2419 2420bool 2421Cache::sendMSHRQueuePacket(MSHR* mshr) 2422{ 2423 assert(mshr); 2424 2425 // use request from 1st target 2426 PacketPtr tgt_pkt = mshr->getTarget()->pkt; 2427 2428 DPRINTF(Cache, "%s: MSHR %s\n", __func__, tgt_pkt->print()); 2429 2430 CacheBlk *blk = tags->findBlock(mshr->blkAddr, mshr->isSecure); 2431 2432 if (tgt_pkt->cmd == MemCmd::HardPFReq && forwardSnoops) { 2433 // we should never have hardware prefetches to allocated 2434 // blocks 2435 assert(blk == nullptr); 2436 2437 // We need to check the caches above us to verify that 2438 // they don't have a copy of this block in the dirty state 2439 // at the moment. Without this check we could get a stale 2440 // copy from memory that might get used in place of the 2441 // dirty one. 2442 Packet snoop_pkt(tgt_pkt, true, false); 2443 snoop_pkt.setExpressSnoop(); 2444 // We are sending this packet upwards, but if it hits we will 2445 // get a snoop response that we end up treating just like a 2446 // normal response, hence it needs the MSHR as its sender 2447 // state 2448 snoop_pkt.senderState = mshr; 2449 cpuSidePort->sendTimingSnoopReq(&snoop_pkt); 2450 2451 // Check to see if the prefetch was squashed by an upper cache (to 2452 // prevent us from grabbing the line) or if a Check to see if a 2453 // writeback arrived between the time the prefetch was placed in 2454 // the MSHRs and when it was selected to be sent or if the 2455 // prefetch was squashed by an upper cache. 2456 2457 // It is important to check cacheResponding before 2458 // prefetchSquashed. If another cache has committed to 2459 // responding, it will be sending a dirty response which will 2460 // arrive at the MSHR allocated for this request. Checking the 2461 // prefetchSquash first may result in the MSHR being 2462 // prematurely deallocated. 2463 if (snoop_pkt.cacheResponding()) { 2464 auto M5_VAR_USED r = outstandingSnoop.insert(snoop_pkt.req); 2465 assert(r.second); 2466 2467 // if we are getting a snoop response with no sharers it 2468 // will be allocated as Modified 2469 bool pending_modified_resp = !snoop_pkt.hasSharers(); 2470 markInService(mshr, pending_modified_resp); 2471 2472 DPRINTF(Cache, "Upward snoop of prefetch for addr" 2473 " %#x (%s) hit\n", 2474 tgt_pkt->getAddr(), tgt_pkt->isSecure()? "s": "ns"); 2475 return false; 2476 } 2477 2478 if (snoop_pkt.isBlockCached()) { 2479 DPRINTF(Cache, "Block present, prefetch squashed by cache. " 2480 "Deallocating mshr target %#x.\n", 2481 mshr->blkAddr); 2482 2483 // Deallocate the mshr target 2484 if (mshrQueue.forceDeallocateTarget(mshr)) { 2485 // Clear block if this deallocation resulted freed an 2486 // mshr when all had previously been utilized 2487 clearBlocked(Blocked_NoMSHRs); 2488 } 2489 2490 // given that no response is expected, delete Request and Packet 2491 delete tgt_pkt->req; 2492 delete tgt_pkt; 2493 2494 return false; 2495 } 2496 } 2497 2498 // either a prefetch that is not present upstream, or a normal 2499 // MSHR request, proceed to get the packet to send downstream 2500 PacketPtr pkt = createMissPacket(tgt_pkt, blk, mshr->needsWritable()); 2501 2502 mshr->isForward = (pkt == nullptr); 2503 2504 if (mshr->isForward) { 2505 // not a cache block request, but a response is expected 2506 // make copy of current packet to forward, keep current 2507 // copy for response handling 2508 pkt = new Packet(tgt_pkt, false, true); 2509 assert(!pkt->isWrite()); 2510 } 2511 2512 // play it safe and append (rather than set) the sender state, 2513 // as forwarded packets may already have existing state 2514 pkt->pushSenderState(mshr); 2515 2516 if (!memSidePort->sendTimingReq(pkt)) { 2517 // we are awaiting a retry, but we 2518 // delete the packet and will be creating a new packet 2519 // when we get the opportunity 2520 delete pkt; 2521 2522 // note that we have now masked any requestBus and 2523 // schedSendEvent (we will wait for a retry before 2524 // doing anything), and this is so even if we do not 2525 // care about this packet and might override it before 2526 // it gets retried 2527 return true; 2528 } else { 2529 // As part of the call to sendTimingReq the packet is 2530 // forwarded to all neighbouring caches (and any caches 2531 // above them) as a snoop. Thus at this point we know if 2532 // any of the neighbouring caches are responding, and if 2533 // so, we know it is dirty, and we can determine if it is 2534 // being passed as Modified, making our MSHR the ordering 2535 // point 2536 bool pending_modified_resp = !pkt->hasSharers() && 2537 pkt->cacheResponding(); 2538 markInService(mshr, pending_modified_resp); 2539 return false; 2540 } 2541} 2542 2543bool 2544Cache::sendWriteQueuePacket(WriteQueueEntry* wq_entry) 2545{ 2546 assert(wq_entry); 2547 2548 // always a single target for write queue entries 2549 PacketPtr tgt_pkt = wq_entry->getTarget()->pkt; 2550 2551 DPRINTF(Cache, "%s: write %s\n", __func__, tgt_pkt->print()); 2552 2553 // forward as is, both for evictions and uncacheable writes 2554 if (!memSidePort->sendTimingReq(tgt_pkt)) { 2555 // note that we have now masked any requestBus and 2556 // schedSendEvent (we will wait for a retry before 2557 // doing anything), and this is so even if we do not 2558 // care about this packet and might override it before 2559 // it gets retried 2560 return true; 2561 } else { 2562 markInService(wq_entry); 2563 return false; 2564 } 2565} 2566 2567void 2568Cache::serialize(CheckpointOut &cp) const 2569{ 2570 bool dirty(isDirty()); 2571 2572 if (dirty) { 2573 warn("*** The cache still contains dirty data. ***\n"); 2574 warn(" Make sure to drain the system using the correct flags.\n"); 2575 warn(" This checkpoint will not restore correctly and dirty data " 2576 " in the cache will be lost!\n"); 2577 } 2578 2579 // Since we don't checkpoint the data in the cache, any dirty data 2580 // will be lost when restoring from a checkpoint of a system that 2581 // wasn't drained properly. Flag the checkpoint as invalid if the 2582 // cache contains dirty data. 2583 bool bad_checkpoint(dirty); 2584 SERIALIZE_SCALAR(bad_checkpoint); 2585} 2586 2587void 2588Cache::unserialize(CheckpointIn &cp) 2589{ 2590 bool bad_checkpoint; 2591 UNSERIALIZE_SCALAR(bad_checkpoint); 2592 if (bad_checkpoint) { 2593 fatal("Restoring from checkpoints with dirty caches is not supported " 2594 "in the classic memory system. Please remove any caches or " 2595 " drain them properly before taking checkpoints.\n"); 2596 } 2597} 2598 2599/////////////// 2600// 2601// CpuSidePort 2602// 2603/////////////// 2604 2605AddrRangeList 2606Cache::CpuSidePort::getAddrRanges() const 2607{ 2608 return cache->getAddrRanges(); 2609} 2610 2611bool 2612Cache::CpuSidePort::tryTiming(PacketPtr pkt) 2613{ 2614 assert(!cache->system->bypassCaches()); 2615 2616 // always let express snoop packets through if even if blocked 2617 if (pkt->isExpressSnoop()) { 2618 return true; 2619 } else if (isBlocked() || mustSendRetry) { 2620 // either already committed to send a retry, or blocked 2621 mustSendRetry = true; 2622 return false; 2623 } 2624 mustSendRetry = false; 2625 return true; 2626} 2627 2628bool 2629Cache::CpuSidePort::recvTimingReq(PacketPtr pkt) 2630{ 2631 assert(!cache->system->bypassCaches()); 2632 2633 // always let express snoop packets through if even if blocked 2634 if (pkt->isExpressSnoop()) { 2635 bool M5_VAR_USED bypass_success = cache->recvTimingReq(pkt); 2636 assert(bypass_success); 2637 return true; 2638 } 2639 2640 return tryTiming(pkt) && cache->recvTimingReq(pkt); 2641} 2642 2643Tick 2644Cache::CpuSidePort::recvAtomic(PacketPtr pkt) 2645{ 2646 return cache->recvAtomic(pkt); 2647} 2648 2649void 2650Cache::CpuSidePort::recvFunctional(PacketPtr pkt) 2651{ 2652 // functional request 2653 cache->functionalAccess(pkt, true); 2654} 2655 2656Cache:: 2657CpuSidePort::CpuSidePort(const std::string &_name, Cache *_cache, 2658 const std::string &_label) 2659 : BaseCache::CacheSlavePort(_name, _cache, _label), cache(_cache) 2660{ 2661} 2662 2663Cache* 2664CacheParams::create() 2665{ 2666 assert(tags); 2667 2668 return new Cache(this); 2669} 2670/////////////// 2671// 2672// MemSidePort 2673// 2674/////////////// 2675 2676bool 2677Cache::MemSidePort::recvTimingResp(PacketPtr pkt) 2678{ 2679 cache->recvTimingResp(pkt); 2680 return true; 2681} 2682 2683// Express snooping requests to memside port 2684void 2685Cache::MemSidePort::recvTimingSnoopReq(PacketPtr pkt) 2686{ 2687 // handle snooping requests 2688 cache->recvTimingSnoopReq(pkt); 2689} 2690 2691Tick 2692Cache::MemSidePort::recvAtomicSnoop(PacketPtr pkt) 2693{ 2694 return cache->recvAtomicSnoop(pkt); 2695} 2696 2697void 2698Cache::MemSidePort::recvFunctionalSnoop(PacketPtr pkt) 2699{ 2700 // functional snoop (note that in contrast to atomic we don't have 2701 // a specific functionalSnoop method, as they have the same 2702 // behaviour regardless) 2703 cache->functionalAccess(pkt, false); 2704} 2705 2706void 2707Cache::CacheReqPacketQueue::sendDeferredPacket() 2708{ 2709 // sanity check 2710 assert(!waitingOnRetry); 2711 2712 // there should never be any deferred request packets in the 2713 // queue, instead we resly on the cache to provide the packets 2714 // from the MSHR queue or write queue 2715 assert(deferredPacketReadyTime() == MaxTick); 2716 2717 // check for request packets (requests & writebacks) 2718 QueueEntry* entry = cache.getNextQueueEntry(); 2719 2720 if (!entry) { 2721 // can happen if e.g. we attempt a writeback and fail, but 2722 // before the retry, the writeback is eliminated because 2723 // we snoop another cache's ReadEx. 2724 } else { 2725 // let our snoop responses go first if there are responses to 2726 // the same addresses 2727 if (checkConflictingSnoop(entry->blkAddr)) { 2728 return; 2729 } 2730 waitingOnRetry = entry->sendPacket(cache); 2731 } 2732 2733 // if we succeeded and are not waiting for a retry, schedule the 2734 // next send considering when the next queue is ready, note that 2735 // snoop responses have their own packet queue and thus schedule 2736 // their own events 2737 if (!waitingOnRetry) { 2738 schedSendEvent(cache.nextQueueReadyTime()); 2739 } 2740} 2741 2742Cache:: 2743MemSidePort::MemSidePort(const std::string &_name, Cache *_cache, 2744 const std::string &_label) 2745 : BaseCache::CacheMasterPort(_name, _cache, _reqQueue, _snoopRespQueue), 2746 _reqQueue(*_cache, *this, _snoopRespQueue, _label), 2747 _snoopRespQueue(*_cache, *this, _label), cache(_cache) 2748{ 2749} 2750