abstract_mem.hh revision 7733
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ron Dreslinski 29 */ 30 31/* @file 32 */ 33 34#ifndef __PHYSICAL_MEMORY_HH__ 35#define __PHYSICAL_MEMORY_HH__ 36 37#include <map> 38#include <string> 39 40#include "base/range.hh" 41#include "mem/mem_object.hh" 42#include "mem/packet.hh" 43#include "mem/tport.hh" 44#include "params/PhysicalMemory.hh" 45#include "sim/eventq.hh" 46 47// 48// Functional model for a contiguous block of physical memory. (i.e. RAM) 49// 50class PhysicalMemory : public MemObject 51{ 52 protected: 53 54 class MemoryPort : public SimpleTimingPort 55 { 56 PhysicalMemory *memory; 57 58 public: 59 60 MemoryPort(const std::string &_name, PhysicalMemory *_memory); 61 62 protected: 63 64 virtual Tick recvAtomic(PacketPtr pkt); 65 66 virtual void recvFunctional(PacketPtr pkt); 67 68 virtual void recvStatusChange(Status status); 69 70 virtual void getDeviceAddressRanges(AddrRangeList &resp, 71 bool &snoop); 72 73 virtual unsigned deviceBlockSize() const; 74 }; 75 76 int numPorts; 77 78 79 private: 80 // prevent copying of a MainMemory object 81 PhysicalMemory(const PhysicalMemory &specmem); 82 const PhysicalMemory &operator=(const PhysicalMemory &specmem); 83 84 protected: 85 86 class LockedAddr { 87 public: 88 // on alpha, minimum LL/SC granularity is 16 bytes, so lower 89 // bits need to masked off. 90 static const Addr Addr_Mask = 0xf; 91 92 static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); } 93 94 Addr addr; // locked address 95 int contextId; // locking hw context 96 97 // check for matching execution context 98 bool matchesContext(Request *req) 99 { 100 return (contextId == req->contextId()); 101 } 102 103 LockedAddr(Request *req) 104 : addr(mask(req->getPaddr())), 105 contextId(req->contextId()) 106 { 107 } 108 // constructor for unserialization use 109 LockedAddr(Addr _addr, int _cid) 110 : addr(_addr), contextId(_cid) 111 { 112 } 113 }; 114 115 std::list<LockedAddr> lockedAddrList; 116 117 // helper function for checkLockedAddrs(): we really want to 118 // inline a quick check for an empty locked addr list (hopefully 119 // the common case), and do the full list search (if necessary) in 120 // this out-of-line function 121 bool checkLockedAddrList(PacketPtr pkt); 122 123 // Record the address of a load-locked operation so that we can 124 // clear the execution context's lock flag if a matching store is 125 // performed 126 void trackLoadLocked(PacketPtr pkt); 127 128 // Compare a store address with any locked addresses so we can 129 // clear the lock flag appropriately. Return value set to 'false' 130 // if store operation should be suppressed (because it was a 131 // conditional store and the address was no longer locked by the 132 // requesting execution context), 'true' otherwise. Note that 133 // this method must be called on *all* stores since even 134 // non-conditional stores must clear any matching lock addresses. 135 bool writeOK(PacketPtr pkt) { 136 Request *req = pkt->req; 137 if (lockedAddrList.empty()) { 138 // no locked addrs: nothing to check, store_conditional fails 139 bool isLLSC = pkt->isLLSC(); 140 if (isLLSC) { 141 req->setExtraData(0); 142 } 143 return !isLLSC; // only do write if not an sc 144 } else { 145 // iterate over list... 146 return checkLockedAddrList(pkt); 147 } 148 } 149 150 uint8_t *pmemAddr; 151 int pagePtr; 152 Tick lat; 153 Tick lat_var; 154 std::vector<MemoryPort*> ports; 155 typedef std::vector<MemoryPort*>::iterator PortIterator; 156 157 uint64_t _size; 158 uint64_t _start; 159 public: 160 Addr new_page(); 161 uint64_t size() { return _size; } 162 uint64_t start() { return _start; } 163 164 public: 165 typedef PhysicalMemoryParams Params; 166 PhysicalMemory(const Params *p); 167 virtual ~PhysicalMemory(); 168 169 const Params * 170 params() const 171 { 172 return dynamic_cast<const Params *>(_params); 173 } 174 175 public: 176 unsigned deviceBlockSize() const; 177 void getAddressRanges(AddrRangeList &resp, bool &snoop); 178 virtual Port *getPort(const std::string &if_name, int idx = -1); 179 void virtual init(); 180 unsigned int drain(Event *de); 181 182 protected: 183 Tick doAtomicAccess(PacketPtr pkt); 184 void doFunctionalAccess(PacketPtr pkt); 185 virtual Tick calculateLatency(PacketPtr pkt); 186 void recvStatusChange(Port::Status status); 187 188 public: 189 virtual void serialize(std::ostream &os); 190 virtual void unserialize(Checkpoint *cp, const std::string §ion); 191 192}; 193 194#endif //__PHYSICAL_MEMORY_HH__ 195