events.cc revision 11538
12212SN/A/* 211538Sandreas.sandberg@arm.com * Copyright (c) 2011, 2016 ARM Limited 38138SAli.Saidi@ARM.com * All rights reserved 48138SAli.Saidi@ARM.com * 58138SAli.Saidi@ARM.com * The license below extends only to copyright in the software and shall 68138SAli.Saidi@ARM.com * not be construed as granting a license to any other intellectual 78138SAli.Saidi@ARM.com * property including but not limited to intellectual property relating 88138SAli.Saidi@ARM.com * to a hardware implementation of the functionality of the software 98138SAli.Saidi@ARM.com * licensed hereunder. You may use the software subject to the license 108138SAli.Saidi@ARM.com * terms below provided that you ensure that this notice is replicated 118138SAli.Saidi@ARM.com * unmodified and in its entirety in all distributions of the software, 128138SAli.Saidi@ARM.com * modified or unmodified, in source code or in binary form. 138138SAli.Saidi@ARM.com * 142212SN/A * Copyright (c) 2004-2006 The Regents of The University of Michigan 152212SN/A * All rights reserved. 162212SN/A * 172212SN/A * Redistribution and use in source and binary forms, with or without 182212SN/A * modification, are permitted provided that the following conditions are 192212SN/A * met: redistributions of source code must retain the above copyright 202212SN/A * notice, this list of conditions and the following disclaimer; 212212SN/A * redistributions in binary form must reproduce the above copyright 222212SN/A * notice, this list of conditions and the following disclaimer in the 232212SN/A * documentation and/or other materials provided with the distribution; 242212SN/A * neither the name of the copyright holders nor the names of its 252212SN/A * contributors may be used to endorse or promote products derived from 262212SN/A * this software without specific prior written permission. 272212SN/A * 282212SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292212SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302212SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312212SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322212SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342212SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352212SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362212SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372212SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382212SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665Ssaidi@eecs.umich.edu * 402760Sbinkertn@umich.edu * Authors: Nathan Binkert 412760Sbinkertn@umich.edu * Ali Saidi 422212SN/A */ 432212SN/A 4411538Sandreas.sandberg@arm.com#include "kern/linux/events.hh" 4511538Sandreas.sandberg@arm.com 467676Snate@binkert.org#include <sstream> 477676Snate@binkert.org 488229Snate@binkert.org#include "arch/utility.hh" 4911538Sandreas.sandberg@arm.com#include "base/output.hh" 502212SN/A#include "base/trace.hh" 5111538Sandreas.sandberg@arm.com#include "cpu/base.hh" 522680Sktlim@umich.edu#include "cpu/thread_context.hh" 538232Snate@binkert.org#include "debug/DebugPrintf.hh" 5411538Sandreas.sandberg@arm.com#include "kern/linux/helpers.hh" 552212SN/A#include "kern/linux/printk.hh" 562212SN/A#include "kern/system_events.hh" 577676Snate@binkert.org#include "sim/arguments.hh" 588143SAli.Saidi@ARM.com#include "sim/pseudo_inst.hh" 592235SN/A#include "sim/system.hh" 602212SN/A 612212SN/Anamespace Linux { 622212SN/A 632212SN/Avoid 642680Sktlim@umich.eduDebugPrintkEvent::process(ThreadContext *tc) 652212SN/A{ 662212SN/A if (DTRACE(DebugPrintf)) { 674429Ssaidi@eecs.umich.edu std::stringstream ss; 684826Ssaidi@eecs.umich.edu Arguments args(tc); 694429Ssaidi@eecs.umich.edu Printk(ss, args); 704429Ssaidi@eecs.umich.edu StringWrap name(tc->getSystemPtr()->name() + ".dprintk"); 714429Ssaidi@eecs.umich.edu DPRINTFN("%s", ss.str()); 722212SN/A } 734424Ssaidi@eecs.umich.edu SkipFuncEvent::process(tc); 742212SN/A} 752212SN/A 768143SAli.Saidi@ARM.comvoid 778143SAli.Saidi@ARM.comUDelayEvent::process(ThreadContext *tc) 788143SAli.Saidi@ARM.com{ 798143SAli.Saidi@ARM.com int arg_num = 0; 808143SAli.Saidi@ARM.com 818143SAli.Saidi@ARM.com // Get the time in native size 828143SAli.Saidi@ARM.com uint64_t time = TheISA::getArgument(tc, arg_num, (uint16_t)-1, false); 838143SAli.Saidi@ARM.com 848143SAli.Saidi@ARM.com // convert parameter to ns 858143SAli.Saidi@ARM.com if (argDivToNs) 868143SAli.Saidi@ARM.com time /= argDivToNs; 878143SAli.Saidi@ARM.com 888143SAli.Saidi@ARM.com time *= argMultToNs; 898143SAli.Saidi@ARM.com 908143SAli.Saidi@ARM.com SkipFuncEvent::process(tc); 918143SAli.Saidi@ARM.com 9211166Sjthestness@gmail.com // Currently, only ARM full-system simulation uses UDelayEvents to skip 9311166Sjthestness@gmail.com // __delay and __loop_delay functions. One form involves setting quiesce 9411166Sjthestness@gmail.com // time to 0 with the assumption that quiesce will not happen. To avoid 9511166Sjthestness@gmail.com // the quiesce handling in this case, only execute the quiesce if time > 0. 9611166Sjthestness@gmail.com if (time > 0) { 9711166Sjthestness@gmail.com PseudoInst::quiesceNs(tc, time); 9811166Sjthestness@gmail.com } 998143SAli.Saidi@ARM.com} 1008143SAli.Saidi@ARM.com 10111538Sandreas.sandberg@arm.comvoid 10211538Sandreas.sandberg@arm.comDmesgDumpEvent::process(ThreadContext *tc) 10311538Sandreas.sandberg@arm.com{ 10411538Sandreas.sandberg@arm.com StringWrap name(tc->getCpuPtr()->name() + ".dmesg_dump_event"); 10511538Sandreas.sandberg@arm.com 10611538Sandreas.sandberg@arm.com inform("Dumping kernel dmesg buffer to %s...\n", fname); 10711538Sandreas.sandberg@arm.com OutputStream *os = simout.create(fname); 10811538Sandreas.sandberg@arm.com dumpDmesg(tc, *os->stream()); 10911538Sandreas.sandberg@arm.com simout.close(os); 11011538Sandreas.sandberg@arm.com 11111538Sandreas.sandberg@arm.com warn(descr()); 11211538Sandreas.sandberg@arm.com} 11311538Sandreas.sandberg@arm.com 11411538Sandreas.sandberg@arm.comvoid 11511538Sandreas.sandberg@arm.comKernelPanicEvent::process(ThreadContext *tc) 11611538Sandreas.sandberg@arm.com{ 11711538Sandreas.sandberg@arm.com StringWrap name(tc->getCpuPtr()->name() + ".dmesg_dump_event"); 11811538Sandreas.sandberg@arm.com 11911538Sandreas.sandberg@arm.com inform("Dumping kernel dmesg buffer to %s...\n", fname); 12011538Sandreas.sandberg@arm.com OutputStream *os = simout.create(fname); 12111538Sandreas.sandberg@arm.com dumpDmesg(tc, *os->stream()); 12211538Sandreas.sandberg@arm.com simout.close(os); 12311538Sandreas.sandberg@arm.com 12411538Sandreas.sandberg@arm.com panic(descr()); 12511538Sandreas.sandberg@arm.com} 1268143SAli.Saidi@ARM.com 1272212SN/A} // namespace linux 128