gpu_static_inst.hh revision 11690
1/* 2 * Copyright (c) 2015 Advanced Micro Devices, Inc. 3 * All rights reserved. 4 * 5 * For use for simulation and test purposes only 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * 3. Neither the name of the copyright holder nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 * Author: Anthony Gutierrez 34 */ 35 36#ifndef __GPU_STATIC_INST_HH__ 37#define __GPU_STATIC_INST_HH__ 38 39/* 40 * @file gpu_static_inst.hh 41 * 42 * Defines the base class representing static instructions for the GPU. The 43 * instructions are "static" because they contain no dynamic instruction 44 * information. GPUStaticInst corresponds to the StaticInst class for the CPU 45 * models. 46 */ 47 48#include <cstdint> 49#include <string> 50 51#include "enums/OpType.hh" 52#include "enums/StorageClassType.hh" 53#include "gpu-compute/gpu_dyn_inst.hh" 54#include "gpu-compute/misc.hh" 55 56class BaseOperand; 57class BaseRegOperand; 58class Wavefront; 59 60class GPUStaticInst 61{ 62 public: 63 GPUStaticInst(const std::string &opcode); 64 65 void instNum(int num) { _instNum = num; } 66 67 int instNum() { return _instNum; } 68 69 void ipdInstNum(int num) { _ipdInstNum = num; } 70 71 int ipdInstNum() const { return _ipdInstNum; } 72 73 virtual void execute(GPUDynInstPtr gpuDynInst) = 0; 74 virtual void generateDisassembly() = 0; 75 virtual const std::string &disassemble() = 0; 76 virtual int getNumOperands() = 0; 77 virtual bool isCondRegister(int operandIndex) = 0; 78 virtual bool isScalarRegister(int operandIndex) = 0; 79 virtual bool isVectorRegister(int operandIndex) = 0; 80 virtual bool isSrcOperand(int operandIndex) = 0; 81 virtual bool isDstOperand(int operandIndex) = 0; 82 virtual int getOperandSize(int operandIndex) = 0; 83 virtual int getRegisterIndex(int operandIndex) = 0; 84 virtual int numDstRegOperands() = 0; 85 virtual int numSrcRegOperands() = 0; 86 87 virtual bool isValid() const = 0; 88 89 /* 90 * Most instructions (including all HSAIL instructions) 91 * are vector ops, so _scalarOp will be false by default. 92 * Derived instruction objects that are scalar ops must 93 * set _scalarOp to true in their constructors. 94 */ 95 bool scalarOp() const { return _scalarOp; } 96 97 virtual bool isLocalMem() const 98 { 99 fatal("calling isLocalMem() on non-memory instruction.\n"); 100 101 return false; 102 } 103 104 bool isArgLoad() { return false; } 105 virtual uint32_t instSize() = 0; 106 107 // only used for memory instructions 108 virtual void 109 initiateAcc(GPUDynInstPtr gpuDynInst) 110 { 111 fatal("calling initiateAcc() on a non-memory instruction.\n"); 112 } 113 114 // only used for memory instructions 115 virtual void 116 completeAcc(GPUDynInstPtr gpuDynInst) 117 { 118 fatal("calling completeAcc() on a non-memory instruction.\n"); 119 } 120 121 virtual uint32_t getTargetPc() { return 0; } 122 123 /** 124 * Query whether the instruction is an unconditional jump i.e., the jump 125 * is always executed because there is no condition to be evaluated. 126 * 127 * If the instruction is not of branch type, the result is always false. 128 * 129 * @return True if the instruction is an unconditional jump. 130 */ 131 virtual bool unconditionalJumpInstruction() { return false; } 132 133 static uint64_t dynamic_id_count; 134 135 Enums::OpType o_type; 136 // For flat memory accesses 137 Enums::StorageClassType executed_as; 138 139 protected: 140 virtual void 141 execLdAcq(GPUDynInstPtr gpuDynInst) 142 { 143 fatal("calling execLdAcq() on a non-load instruction.\n"); 144 } 145 146 virtual void 147 execSt(GPUDynInstPtr gpuDynInst) 148 { 149 fatal("calling execLdAcq() on a non-load instruction.\n"); 150 } 151 152 virtual void 153 execAtomic(GPUDynInstPtr gpuDynInst) 154 { 155 fatal("calling execAtomic() on a non-atomic instruction.\n"); 156 } 157 158 virtual void 159 execAtomicAcq(GPUDynInstPtr gpuDynInst) 160 { 161 fatal("calling execAtomicAcq() on a non-atomic instruction.\n"); 162 } 163 164 const std::string opcode; 165 std::string disassembly; 166 int _instNum; 167 /** 168 * Identifier of the immediate post-dominator instruction. 169 */ 170 int _ipdInstNum; 171 172 bool _scalarOp; 173}; 174 175#endif // __GPU_STATIC_INST_HH__ 176