global_memory_pipeline.cc revision 11693
111308Santhony.gutierrez@amd.com/* 211308Santhony.gutierrez@amd.com * Copyright (c) 2014-2015 Advanced Micro Devices, Inc. 311308Santhony.gutierrez@amd.com * All rights reserved. 411308Santhony.gutierrez@amd.com * 511308Santhony.gutierrez@amd.com * For use for simulation and test purposes only 611308Santhony.gutierrez@amd.com * 711308Santhony.gutierrez@amd.com * Redistribution and use in source and binary forms, with or without 811308Santhony.gutierrez@amd.com * modification, are permitted provided that the following conditions are met: 911308Santhony.gutierrez@amd.com * 1011308Santhony.gutierrez@amd.com * 1. Redistributions of source code must retain the above copyright notice, 1111308Santhony.gutierrez@amd.com * this list of conditions and the following disclaimer. 1211308Santhony.gutierrez@amd.com * 1311308Santhony.gutierrez@amd.com * 2. Redistributions in binary form must reproduce the above copyright notice, 1411308Santhony.gutierrez@amd.com * this list of conditions and the following disclaimer in the documentation 1511308Santhony.gutierrez@amd.com * and/or other materials provided with the distribution. 1611308Santhony.gutierrez@amd.com * 1711308Santhony.gutierrez@amd.com * 3. Neither the name of the copyright holder nor the names of its contributors 1811308Santhony.gutierrez@amd.com * may be used to endorse or promote products derived from this software 1911308Santhony.gutierrez@amd.com * without specific prior written permission. 2011308Santhony.gutierrez@amd.com * 2111308Santhony.gutierrez@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 2211308Santhony.gutierrez@amd.com * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2311308Santhony.gutierrez@amd.com * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2411308Santhony.gutierrez@amd.com * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 2511308Santhony.gutierrez@amd.com * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2611308Santhony.gutierrez@amd.com * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2711308Santhony.gutierrez@amd.com * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2811308Santhony.gutierrez@amd.com * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2911308Santhony.gutierrez@amd.com * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3011308Santhony.gutierrez@amd.com * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3111308Santhony.gutierrez@amd.com * POSSIBILITY OF SUCH DAMAGE. 3211308Santhony.gutierrez@amd.com * 3311308Santhony.gutierrez@amd.com * Author: John Kalamatianos, Sooraj Puthoor 3411308Santhony.gutierrez@amd.com */ 3511308Santhony.gutierrez@amd.com 3611308Santhony.gutierrez@amd.com#include "gpu-compute/global_memory_pipeline.hh" 3711308Santhony.gutierrez@amd.com 3811308Santhony.gutierrez@amd.com#include "debug/GPUMem.hh" 3911308Santhony.gutierrez@amd.com#include "debug/GPUReg.hh" 4011308Santhony.gutierrez@amd.com#include "gpu-compute/compute_unit.hh" 4111308Santhony.gutierrez@amd.com#include "gpu-compute/gpu_dyn_inst.hh" 4211308Santhony.gutierrez@amd.com#include "gpu-compute/shader.hh" 4311308Santhony.gutierrez@amd.com#include "gpu-compute/vector_register_file.hh" 4411308Santhony.gutierrez@amd.com#include "gpu-compute/wavefront.hh" 4511308Santhony.gutierrez@amd.com 4611308Santhony.gutierrez@amd.comGlobalMemPipeline::GlobalMemPipeline(const ComputeUnitParams* p) : 4711308Santhony.gutierrez@amd.com computeUnit(nullptr), gmQueueSize(p->global_mem_queue_size), 4811308Santhony.gutierrez@amd.com inflightStores(0), inflightLoads(0) 4911308Santhony.gutierrez@amd.com{ 5011308Santhony.gutierrez@amd.com} 5111308Santhony.gutierrez@amd.com 5211308Santhony.gutierrez@amd.comvoid 5311308Santhony.gutierrez@amd.comGlobalMemPipeline::init(ComputeUnit *cu) 5411308Santhony.gutierrez@amd.com{ 5511308Santhony.gutierrez@amd.com computeUnit = cu; 5611308Santhony.gutierrez@amd.com globalMemSize = computeUnit->shader->globalMemSize; 5711308Santhony.gutierrez@amd.com _name = computeUnit->name() + ".GlobalMemPipeline"; 5811308Santhony.gutierrez@amd.com} 5911308Santhony.gutierrez@amd.com 6011308Santhony.gutierrez@amd.comvoid 6111308Santhony.gutierrez@amd.comGlobalMemPipeline::exec() 6211308Santhony.gutierrez@amd.com{ 6311308Santhony.gutierrez@amd.com // apply any returned global memory operations 6411308Santhony.gutierrez@amd.com GPUDynInstPtr m = !gmReturnedLoads.empty() ? gmReturnedLoads.front() : 6511308Santhony.gutierrez@amd.com !gmReturnedStores.empty() ? gmReturnedStores.front() : nullptr; 6611308Santhony.gutierrez@amd.com 6711308Santhony.gutierrez@amd.com bool accessVrf = true; 6811693Santhony.gutierrez@amd.com Wavefront *w = nullptr; 6911693Santhony.gutierrez@amd.com 7011308Santhony.gutierrez@amd.com // check the VRF to see if the operands of a load (or load component 7111308Santhony.gutierrez@amd.com // of an atomic) are accessible 7211692Santhony.gutierrez@amd.com if ((m) && (m->isLoad() || m->isAtomicRet())) { 7311693Santhony.gutierrez@amd.com w = m->wavefront(); 7411308Santhony.gutierrez@amd.com 7511308Santhony.gutierrez@amd.com accessVrf = 7611693Santhony.gutierrez@amd.com w->computeUnit->vrf[w->simdId]-> 7711308Santhony.gutierrez@amd.com vrfOperandAccessReady(m->seqNum(), w, m, 7811308Santhony.gutierrez@amd.com VrfAccessType::WRITE); 7911308Santhony.gutierrez@amd.com } 8011308Santhony.gutierrez@amd.com 8111308Santhony.gutierrez@amd.com if ((!gmReturnedStores.empty() || !gmReturnedLoads.empty()) && 8211308Santhony.gutierrez@amd.com m->latency.rdy() && computeUnit->glbMemToVrfBus.rdy() && 8311308Santhony.gutierrez@amd.com accessVrf && m->statusBitVector == VectorMask(0) && 8411308Santhony.gutierrez@amd.com (computeUnit->shader->coissue_return || 8511308Santhony.gutierrez@amd.com computeUnit->wfWait.at(m->pipeId).rdy())) { 8611308Santhony.gutierrez@amd.com 8711693Santhony.gutierrez@amd.com w = m->wavefront(); 8811693Santhony.gutierrez@amd.com 8911693Santhony.gutierrez@amd.com m->completeAcc(m); 9011693Santhony.gutierrez@amd.com 9111693Santhony.gutierrez@amd.com if (m->isLoad() || m->isAtomic()) { 9211693Santhony.gutierrez@amd.com gmReturnedLoads.pop(); 9311693Santhony.gutierrez@amd.com assert(inflightLoads > 0); 9411693Santhony.gutierrez@amd.com --inflightLoads; 9511693Santhony.gutierrez@amd.com } else { 9611693Santhony.gutierrez@amd.com assert(m->isStore()); 9711693Santhony.gutierrez@amd.com gmReturnedStores.pop(); 9811693Santhony.gutierrez@amd.com assert(inflightStores > 0); 9911693Santhony.gutierrez@amd.com --inflightStores; 10011693Santhony.gutierrez@amd.com } 10111693Santhony.gutierrez@amd.com 10211693Santhony.gutierrez@amd.com // Decrement outstanding register count 10311693Santhony.gutierrez@amd.com computeUnit->shader->ScheduleAdd(&w->outstandingReqs, m->time, -1); 10411693Santhony.gutierrez@amd.com 10511693Santhony.gutierrez@amd.com if (m->isStore() || m->isAtomic()) { 10611693Santhony.gutierrez@amd.com computeUnit->shader->ScheduleAdd(&w->outstandingReqsWrGm, 10711693Santhony.gutierrez@amd.com m->time, -1); 10811693Santhony.gutierrez@amd.com } 10911693Santhony.gutierrez@amd.com 11011693Santhony.gutierrez@amd.com if (m->isLoad() || m->isAtomic()) { 11111693Santhony.gutierrez@amd.com computeUnit->shader->ScheduleAdd(&w->outstandingReqsRdGm, 11211693Santhony.gutierrez@amd.com m->time, -1); 11311693Santhony.gutierrez@amd.com } 11411693Santhony.gutierrez@amd.com 11511693Santhony.gutierrez@amd.com // Mark write bus busy for appropriate amount of time 11611693Santhony.gutierrez@amd.com computeUnit->glbMemToVrfBus.set(m->time); 11711693Santhony.gutierrez@amd.com if (!computeUnit->shader->coissue_return) 11811693Santhony.gutierrez@amd.com w->computeUnit->wfWait.at(m->pipeId).set(m->time); 11911308Santhony.gutierrez@amd.com } 12011308Santhony.gutierrez@amd.com 12111308Santhony.gutierrez@amd.com // If pipeline has executed a global memory instruction 12211308Santhony.gutierrez@amd.com // execute global memory packets and issue global 12311308Santhony.gutierrez@amd.com // memory packets to DTLB 12411308Santhony.gutierrez@amd.com if (!gmIssuedRequests.empty()) { 12511308Santhony.gutierrez@amd.com GPUDynInstPtr mp = gmIssuedRequests.front(); 12611692Santhony.gutierrez@amd.com if (mp->isLoad() || mp->isAtomic()) { 12711308Santhony.gutierrez@amd.com if (inflightLoads >= gmQueueSize) { 12811308Santhony.gutierrez@amd.com return; 12911308Santhony.gutierrez@amd.com } else { 13011308Santhony.gutierrez@amd.com ++inflightLoads; 13111308Santhony.gutierrez@amd.com } 13211308Santhony.gutierrez@amd.com } else { 13311308Santhony.gutierrez@amd.com if (inflightStores >= gmQueueSize) { 13411308Santhony.gutierrez@amd.com return; 13511692Santhony.gutierrez@amd.com } else if (mp->isStore()) { 13611308Santhony.gutierrez@amd.com ++inflightStores; 13711308Santhony.gutierrez@amd.com } 13811308Santhony.gutierrez@amd.com } 13911308Santhony.gutierrez@amd.com 14011308Santhony.gutierrez@amd.com mp->initiateAcc(mp); 14111308Santhony.gutierrez@amd.com gmIssuedRequests.pop(); 14211308Santhony.gutierrez@amd.com 14311692Santhony.gutierrez@amd.com DPRINTF(GPUMem, "CU%d: WF[%d][%d] Popping 0 mem_op = \n", 14411692Santhony.gutierrez@amd.com computeUnit->cu_id, mp->simdId, mp->wfSlotId); 14511308Santhony.gutierrez@amd.com } 14611308Santhony.gutierrez@amd.com} 14711308Santhony.gutierrez@amd.com 14811308Santhony.gutierrez@amd.comvoid 14911308Santhony.gutierrez@amd.comGlobalMemPipeline::regStats() 15011308Santhony.gutierrez@amd.com{ 15111308Santhony.gutierrez@amd.com loadVrfBankConflictCycles 15211308Santhony.gutierrez@amd.com .name(name() + ".load_vrf_bank_conflict_cycles") 15311308Santhony.gutierrez@amd.com .desc("total number of cycles GM data are delayed before updating " 15411308Santhony.gutierrez@amd.com "the VRF") 15511308Santhony.gutierrez@amd.com ; 15611308Santhony.gutierrez@amd.com} 157