pc.hh revision 5389
16313Sgblack@eecs.umich.edu/* 26313Sgblack@eecs.umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan 36313Sgblack@eecs.umich.edu * All rights reserved. 46313Sgblack@eecs.umich.edu * 56313Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 66313Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 76313Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 86313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 96313Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 106313Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 116313Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 126313Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 136313Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 146313Sgblack@eecs.umich.edu * this software without specific prior written permission. 156313Sgblack@eecs.umich.edu * 166313Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176313Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186313Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196313Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206313Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216313Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226313Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236313Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246313Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256313Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266313Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276313Sgblack@eecs.umich.edu * 286313Sgblack@eecs.umich.edu * Authors: Gabe Black 296313Sgblack@eecs.umich.edu */ 306313Sgblack@eecs.umich.edu 316313Sgblack@eecs.umich.edu/** 326313Sgblack@eecs.umich.edu * @file 336313Sgblack@eecs.umich.edu * Declaration of top level class for PC platform components. This class 346333Sgblack@eecs.umich.edu * just retains pointers to all its children so the children can communicate. 356313Sgblack@eecs.umich.edu */ 366313Sgblack@eecs.umich.edu 376333Sgblack@eecs.umich.edu#ifndef __DEV_PC_HH__ 386313Sgblack@eecs.umich.edu#define __DEV_PC_HH__ 396313Sgblack@eecs.umich.edu 406313Sgblack@eecs.umich.edu#include "dev/platform.hh" 416313Sgblack@eecs.umich.edu#include "params/PC.hh" 426313Sgblack@eecs.umich.edu 436313Sgblack@eecs.umich.educlass IdeController; 446313Sgblack@eecs.umich.educlass System; 456313Sgblack@eecs.umich.edu 466333Sgblack@eecs.umich.educlass PC : public Platform 476718Sgblack@eecs.umich.edu{ 486718Sgblack@eecs.umich.edu public: 496718Sgblack@eecs.umich.edu /** Pointer to the system */ 506718Sgblack@eecs.umich.edu System *system; 516718Sgblack@eecs.umich.edu 526718Sgblack@eecs.umich.edu public: 536718Sgblack@eecs.umich.edu typedef PCParams Params; 546718Sgblack@eecs.umich.edu 556718Sgblack@eecs.umich.edu PC(const Params *p); 566718Sgblack@eecs.umich.edu 576718Sgblack@eecs.umich.edu /** 586718Sgblack@eecs.umich.edu * Return the interrupting frequency to AlphaAccess 596718Sgblack@eecs.umich.edu * @return frequency of RTC interrupts 606718Sgblack@eecs.umich.edu */ 616718Sgblack@eecs.umich.edu virtual Tick intrFrequency(); 626718Sgblack@eecs.umich.edu 636718Sgblack@eecs.umich.edu /** 646718Sgblack@eecs.umich.edu * Cause the cpu to post a serial interrupt to the CPU. 656718Sgblack@eecs.umich.edu */ 666718Sgblack@eecs.umich.edu virtual void postConsoleInt(); 676718Sgblack@eecs.umich.edu 686718Sgblack@eecs.umich.edu /** 696718Sgblack@eecs.umich.edu * Clear a posted CPU interrupt 706718Sgblack@eecs.umich.edu */ 716718Sgblack@eecs.umich.edu virtual void clearConsoleInt(); 726718Sgblack@eecs.umich.edu 736718Sgblack@eecs.umich.edu /** 746718Sgblack@eecs.umich.edu * Cause the chipset to post a pci interrupt to the CPU. 756718Sgblack@eecs.umich.edu */ 766313Sgblack@eecs.umich.edu virtual void postPciInt(int line); 776313Sgblack@eecs.umich.edu 786333Sgblack@eecs.umich.edu /** 796333Sgblack@eecs.umich.edu * Clear a posted PCI->CPU interrupt 806401Sgblack@eecs.umich.edu */ 816401Sgblack@eecs.umich.edu virtual void clearPciInt(int line); 826718Sgblack@eecs.umich.edu 836401Sgblack@eecs.umich.edu 846718Sgblack@eecs.umich.edu virtual Addr pciToDma(Addr pciAddr) const; 856401Sgblack@eecs.umich.edu 866333Sgblack@eecs.umich.edu /** 876313Sgblack@eecs.umich.edu * Calculate the configuration address given a bus/dev/func. 886333Sgblack@eecs.umich.edu */ 896333Sgblack@eecs.umich.edu virtual Addr calcConfigAddr(int bus, int dev, int func); 906333Sgblack@eecs.umich.edu}; 916333Sgblack@eecs.umich.edu 926333Sgblack@eecs.umich.edu#endif // __DEV_PC_HH__ 936333Sgblack@eecs.umich.edu