pc.cc revision 5637
19363Snilay@cs.wisc.edu/* 29363Snilay@cs.wisc.edu * Copyright (c) 2008 The Regents of The University of Michigan 39363Snilay@cs.wisc.edu * All rights reserved. 49363Snilay@cs.wisc.edu * 59363Snilay@cs.wisc.edu * Redistribution and use in source and binary forms, with or without 69363Snilay@cs.wisc.edu * modification, are permitted provided that the following conditions are 79363Snilay@cs.wisc.edu * met: redistributions of source code must retain the above copyright 89363Snilay@cs.wisc.edu * notice, this list of conditions and the following disclaimer; 99363Snilay@cs.wisc.edu * redistributions in binary form must reproduce the above copyright 109363Snilay@cs.wisc.edu * notice, this list of conditions and the following disclaimer in the 119363Snilay@cs.wisc.edu * documentation and/or other materials provided with the distribution; 129363Snilay@cs.wisc.edu * neither the name of the copyright holders nor the names of its 139363Snilay@cs.wisc.edu * contributors may be used to endorse or promote products derived from 149363Snilay@cs.wisc.edu * this software without specific prior written permission. 159363Snilay@cs.wisc.edu * 169363Snilay@cs.wisc.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 179363Snilay@cs.wisc.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 189363Snilay@cs.wisc.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 199363Snilay@cs.wisc.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 209363Snilay@cs.wisc.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 219363Snilay@cs.wisc.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 229363Snilay@cs.wisc.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 239363Snilay@cs.wisc.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 249363Snilay@cs.wisc.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 259363Snilay@cs.wisc.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 269363Snilay@cs.wisc.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 279363Snilay@cs.wisc.edu * 289363Snilay@cs.wisc.edu * Authors: Gabe Black 299363Snilay@cs.wisc.edu */ 309363Snilay@cs.wisc.edu 319363Snilay@cs.wisc.edu/** @file 329363Snilay@cs.wisc.edu * Implementation of PC platform. 339363Snilay@cs.wisc.edu */ 349363Snilay@cs.wisc.edu 359363Snilay@cs.wisc.edu#include <deque> 3611052Sandreas.hansson@arm.com#include <string> 3710301Snilay@cs.wisc.edu#include <vector> 3810970Sdavid.hashe@amd.com 3910970Sdavid.hashe@amd.com#include "arch/x86/x86_traits.hh" 4010970Sdavid.hashe@amd.com#include "cpu/intr_control.hh" 419363Snilay@cs.wisc.edu#include "dev/terminal.hh" 4210301Snilay@cs.wisc.edu#include "dev/x86/i8254.hh" 4310301Snilay@cs.wisc.edu#include "dev/x86/pc.hh" 4410970Sdavid.hashe@amd.com#include "dev/x86/south_bridge.hh" 4510301Snilay@cs.wisc.edu#include "sim/system.hh" 4610301Snilay@cs.wisc.edu 4710970Sdavid.hashe@amd.comusing namespace std; 4810970Sdavid.hashe@amd.comusing namespace TheISA; 4910301Snilay@cs.wisc.edu 5010301Snilay@cs.wisc.eduPC::PC(const Params *p) 519363Snilay@cs.wisc.edu : Platform(p), system(p->system) 5210301Snilay@cs.wisc.edu{ 5310301Snilay@cs.wisc.edu southBridge = NULL; 54 // set the back pointer from the system to myself 55 system->platform = this; 56} 57 58void 59PC::init() 60{ 61 assert(southBridge); 62 I8254 & timer = *southBridge->pit; 63 //Timer 0, mode 2, no bcd, 16 bit count 64 timer.writeControl(0x34); 65 //Timer 0, latch command 66 timer.writeControl(0x00); 67 //Write a 16 bit count of 0 68 timer.writeCounter(0, 0); 69 timer.writeCounter(0, 0); 70} 71 72Tick 73PC::intrFrequency() 74{ 75 panic("Need implementation\n"); 76 M5_DUMMY_RETURN 77} 78 79void 80PC::postConsoleInt() 81{ 82 warn_once("Don't know what interrupt to post for console.\n"); 83 //panic("Need implementation\n"); 84} 85 86void 87PC::clearConsoleInt() 88{ 89 warn_once("Don't know what interrupt to clear for console.\n"); 90 //panic("Need implementation\n"); 91} 92 93void 94PC::postPciInt(int line) 95{ 96 panic("Need implementation\n"); 97} 98 99void 100PC::clearPciInt(int line) 101{ 102 panic("Need implementation\n"); 103} 104 105Addr 106PC::pciToDma(Addr pciAddr) const 107{ 108 panic("Need implementation\n"); 109 M5_DUMMY_RETURN 110} 111 112 113Addr 114PC::calcConfigAddr(int bus, int dev, int func) 115{ 116 assert(func < 8); 117 assert(dev < 32); 118 assert(bus == 0); 119 return (PhysAddrPrefixPciConfig | (func << 8) | (dev << 11)); 120} 121 122PC * 123PCParams::create() 124{ 125 return new PC(this); 126} 127