intdev.hh revision 8229:78bf55f23338
1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __DEV_X86_INTDEV_HH__ 32#define __DEV_X86_INTDEV_HH__ 33 34#include <cassert> 35#include <list> 36#include <string> 37 38#include "arch/x86/intmessage.hh" 39#include "arch/x86/x86_traits.hh" 40#include "mem/mem_object.hh" 41#include "mem/mport.hh" 42#include "params/X86IntLine.hh" 43#include "params/X86IntSinkPin.hh" 44#include "params/X86IntSourcePin.hh" 45#include "sim/sim_object.hh" 46 47namespace X86ISA { 48 49typedef std::list<int> ApicList; 50 51class IntDev 52{ 53 protected: 54 class IntPort : public MessagePort 55 { 56 IntDev * device; 57 Tick latency; 58 Addr intAddr; 59 public: 60 IntPort(const std::string &_name, MemObject * _parent, 61 IntDev *dev, Tick _latency) : 62 MessagePort(_name, _parent), device(dev), latency(_latency) 63 { 64 } 65 66 void getDeviceAddressRanges(AddrRangeList &resp, bool &snoop) 67 { 68 snoop = false; 69 device->getIntAddrRange(resp); 70 } 71 72 Tick recvMessage(PacketPtr pkt) 73 { 74 return device->recvMessage(pkt); 75 } 76 77 Tick recvResponse(PacketPtr pkt) 78 { 79 return device->recvResponse(pkt); 80 } 81 82 // This is x86 focused, so if this class becomes generic, this would 83 // need to be moved into a subclass. 84 void sendMessage(ApicList apics, 85 TriggerIntMessage message, bool timing); 86 }; 87 88 IntPort * intPort; 89 90 public: 91 IntDev(MemObject * parent, Tick latency = 0) 92 { 93 if (parent != NULL) { 94 intPort = new IntPort(parent->name() + ".int_port", 95 parent, this, latency); 96 } else { 97 intPort = NULL; 98 } 99 } 100 101 virtual ~IntDev() 102 {} 103 104 virtual void init(); 105 106 virtual void 107 signalInterrupt(int line) 108 { 109 panic("signalInterrupt not implemented.\n"); 110 } 111 112 virtual void 113 raiseInterruptPin(int number) 114 { 115 panic("raiseInterruptPin not implemented.\n"); 116 } 117 118 virtual void 119 lowerInterruptPin(int number) 120 { 121 panic("lowerInterruptPin not implemented.\n"); 122 } 123 124 virtual Tick 125 recvMessage(PacketPtr pkt) 126 { 127 panic("recvMessage not implemented.\n"); 128 return 0; 129 } 130 131 virtual Tick 132 recvResponse(PacketPtr pkt) 133 { 134 return 0; 135 } 136 137 virtual void 138 getIntAddrRange(AddrRangeList &range_list) 139 { 140 panic("intAddrRange not implemented.\n"); 141 } 142}; 143 144class IntSinkPin : public SimObject 145{ 146 public: 147 IntDev * device; 148 int number; 149 150 typedef X86IntSinkPinParams Params; 151 152 const Params * 153 params() const 154 { 155 return dynamic_cast<const Params *>(_params); 156 } 157 158 IntSinkPin(Params *p) : SimObject(p), 159 device(dynamic_cast<IntDev *>(p->device)), number(p->number) 160 { 161 assert(device); 162 } 163}; 164 165class IntSourcePin : public SimObject 166{ 167 protected: 168 std::vector<IntSinkPin *> sinks; 169 170 public: 171 typedef X86IntSourcePinParams Params; 172 173 const Params * 174 params() const 175 { 176 return dynamic_cast<const Params *>(_params); 177 } 178 179 void 180 addSink(IntSinkPin *sink) 181 { 182 sinks.push_back(sink); 183 } 184 185 void 186 raise() 187 { 188 for (int i = 0; i < sinks.size(); i++) { 189 const IntSinkPin &pin = *sinks[i]; 190 pin.device->raiseInterruptPin(pin.number); 191 } 192 } 193 194 void 195 lower() 196 { 197 for (int i = 0; i < sinks.size(); i++) { 198 const IntSinkPin &pin = *sinks[i]; 199 pin.device->lowerInterruptPin(pin.number); 200 } 201 } 202 203 IntSourcePin(Params *p) : SimObject(p) 204 {} 205}; 206 207class IntLine : public SimObject 208{ 209 protected: 210 IntSourcePin *source; 211 IntSinkPin *sink; 212 213 public: 214 typedef X86IntLineParams Params; 215 216 const Params * 217 params() const 218 { 219 return dynamic_cast<const Params *>(_params); 220 } 221 222 IntLine(Params *p) : SimObject(p), source(p->source), sink(p->sink) 223 { 224 source->addSink(sink); 225 } 226}; 227 228} // namespace X86ISA 229 230#endif //__DEV_X86_INTDEV_HH__ 231