i8259.hh revision 5827
15390SN/A/* 25390SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 35390SN/A * All rights reserved. 45390SN/A * 55390SN/A * Redistribution and use in source and binary forms, with or without 65390SN/A * modification, are permitted provided that the following conditions are 75390SN/A * met: redistributions of source code must retain the above copyright 85390SN/A * notice, this list of conditions and the following disclaimer; 95390SN/A * redistributions in binary form must reproduce the above copyright 105390SN/A * notice, this list of conditions and the following disclaimer in the 115390SN/A * documentation and/or other materials provided with the distribution; 125390SN/A * neither the name of the copyright holders nor the names of its 135390SN/A * contributors may be used to endorse or promote products derived from 145390SN/A * this software without specific prior written permission. 155390SN/A * 165390SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175390SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185390SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195390SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205390SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215390SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225390SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235390SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245390SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255390SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265390SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275390SN/A * 285390SN/A * Authors: Gabe Black 295390SN/A */ 305390SN/A 315630Sgblack@eecs.umich.edu#ifndef __DEV_X86_I8259_HH__ 325630Sgblack@eecs.umich.edu#define __DEV_X86_I8259_HH__ 335390SN/A 345630Sgblack@eecs.umich.edu#include "dev/io_device.hh" 355634Sgblack@eecs.umich.edu#include "dev/x86/intdev.hh" 365630Sgblack@eecs.umich.edu#include "params/I8259.hh" 375634Sgblack@eecs.umich.edu#include "enums/X86I8259CascadeMode.hh" 385390SN/A 395390SN/Anamespace X86ISA 405390SN/A{ 415390SN/A 425657Sgblack@eecs.umich.educlass I82094AA; 435657Sgblack@eecs.umich.edu 445634Sgblack@eecs.umich.educlass I8259 : public BasicPioDevice, public IntDev 455390SN/A{ 465630Sgblack@eecs.umich.edu protected: 475657Sgblack@eecs.umich.edu static const int NumLines = 8; 485827Sgblack@eecs.umich.edu bool pinStates[NumLines]; 495657Sgblack@eecs.umich.edu 505630Sgblack@eecs.umich.edu Tick latency; 515827Sgblack@eecs.umich.edu IntSourcePin *output; 525634Sgblack@eecs.umich.edu Enums::X86I8259CascadeMode mode; 535657Sgblack@eecs.umich.edu I8259 * slave; 545630Sgblack@eecs.umich.edu 555631Sgblack@eecs.umich.edu // Interrupt Request Register 565631Sgblack@eecs.umich.edu uint8_t IRR; 575631Sgblack@eecs.umich.edu // In Service Register 585631Sgblack@eecs.umich.edu uint8_t ISR; 595631Sgblack@eecs.umich.edu // Interrupt Mask Register 605631Sgblack@eecs.umich.edu uint8_t IMR; 615631Sgblack@eecs.umich.edu 625656Sgblack@eecs.umich.edu // The higher order bits of the vector to return 635656Sgblack@eecs.umich.edu uint8_t vectorOffset; 645656Sgblack@eecs.umich.edu 655632Sgblack@eecs.umich.edu bool cascadeMode; 665632Sgblack@eecs.umich.edu // A bit vector of lines with slaves attached, or the slave id, depending 675632Sgblack@eecs.umich.edu // on if this is a master or slave PIC. 685632Sgblack@eecs.umich.edu uint8_t cascadeBits; 695632Sgblack@eecs.umich.edu 705631Sgblack@eecs.umich.edu bool edgeTriggered; 715632Sgblack@eecs.umich.edu bool readIRR; 725632Sgblack@eecs.umich.edu 735632Sgblack@eecs.umich.edu // State machine information for reading in initialization control words. 745631Sgblack@eecs.umich.edu bool expectICW4; 755631Sgblack@eecs.umich.edu int initControlWord; 765631Sgblack@eecs.umich.edu 775688Sgblack@eecs.umich.edu // Whether or not the PIC is in auto EOI mode. 785688Sgblack@eecs.umich.edu bool autoEOI; 795688Sgblack@eecs.umich.edu 805686Sgblack@eecs.umich.edu void requestInterrupt(int line); 815686Sgblack@eecs.umich.edu void handleEOI(int line); 825686Sgblack@eecs.umich.edu 835390SN/A public: 845630Sgblack@eecs.umich.edu typedef I8259Params Params; 855390SN/A 865630Sgblack@eecs.umich.edu const Params * 875630Sgblack@eecs.umich.edu params() const 885630Sgblack@eecs.umich.edu { 895630Sgblack@eecs.umich.edu return dynamic_cast<const Params *>(_params); 905630Sgblack@eecs.umich.edu } 915630Sgblack@eecs.umich.edu 925657Sgblack@eecs.umich.edu I8259(Params * p); 935657Sgblack@eecs.umich.edu 945390SN/A Tick read(PacketPtr pkt); 955390SN/A Tick write(PacketPtr pkt); 965632Sgblack@eecs.umich.edu 975632Sgblack@eecs.umich.edu void signalInterrupt(int line); 985827Sgblack@eecs.umich.edu void raiseInterruptPin(int number); 995827Sgblack@eecs.umich.edu void lowerInterruptPin(int number); 1005657Sgblack@eecs.umich.edu int getVector(); 1015390SN/A}; 1025390SN/A 1035390SN/A}; // namespace X86ISA 1045390SN/A 1055630Sgblack@eecs.umich.edu#endif //__DEV_X86_I8259_HH__ 106