i8259.hh revision 5657
15390SN/A/*
25390SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
35390SN/A * All rights reserved.
45390SN/A *
55390SN/A * Redistribution and use in source and binary forms, with or without
65390SN/A * modification, are permitted provided that the following conditions are
75390SN/A * met: redistributions of source code must retain the above copyright
85390SN/A * notice, this list of conditions and the following disclaimer;
95390SN/A * redistributions in binary form must reproduce the above copyright
105390SN/A * notice, this list of conditions and the following disclaimer in the
115390SN/A * documentation and/or other materials provided with the distribution;
125390SN/A * neither the name of the copyright holders nor the names of its
135390SN/A * contributors may be used to endorse or promote products derived from
145390SN/A * this software without specific prior written permission.
155390SN/A *
165390SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175390SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
185390SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
195390SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
205390SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
215390SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
225390SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
235390SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
245390SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
255390SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
265390SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
275390SN/A *
285390SN/A * Authors: Gabe Black
295390SN/A */
305390SN/A
315630Sgblack@eecs.umich.edu#ifndef __DEV_X86_I8259_HH__
325630Sgblack@eecs.umich.edu#define __DEV_X86_I8259_HH__
335390SN/A
345630Sgblack@eecs.umich.edu#include "dev/io_device.hh"
355634Sgblack@eecs.umich.edu#include "dev/x86/intdev.hh"
365630Sgblack@eecs.umich.edu#include "params/I8259.hh"
375634Sgblack@eecs.umich.edu#include "enums/X86I8259CascadeMode.hh"
385390SN/A
395390SN/Anamespace X86ISA
405390SN/A{
415390SN/A
425657Sgblack@eecs.umich.educlass I82094AA;
435657Sgblack@eecs.umich.edu
445634Sgblack@eecs.umich.educlass I8259 : public BasicPioDevice, public IntDev
455390SN/A{
465630Sgblack@eecs.umich.edu  protected:
475657Sgblack@eecs.umich.edu    static const int NumLines = 8;
485657Sgblack@eecs.umich.edu
495630Sgblack@eecs.umich.edu    Tick latency;
505634Sgblack@eecs.umich.edu    IntPin *output;
515634Sgblack@eecs.umich.edu    Enums::X86I8259CascadeMode mode;
525657Sgblack@eecs.umich.edu    I8259 * slave;
535630Sgblack@eecs.umich.edu
545631Sgblack@eecs.umich.edu    // Interrupt Request Register
555631Sgblack@eecs.umich.edu    uint8_t IRR;
565631Sgblack@eecs.umich.edu    // In Service Register
575631Sgblack@eecs.umich.edu    uint8_t ISR;
585631Sgblack@eecs.umich.edu    // Interrupt Mask Register
595631Sgblack@eecs.umich.edu    uint8_t IMR;
605631Sgblack@eecs.umich.edu
615656Sgblack@eecs.umich.edu    // The higher order bits of the vector to return
625656Sgblack@eecs.umich.edu    uint8_t vectorOffset;
635656Sgblack@eecs.umich.edu
645632Sgblack@eecs.umich.edu    bool cascadeMode;
655632Sgblack@eecs.umich.edu    // A bit vector of lines with slaves attached, or the slave id, depending
665632Sgblack@eecs.umich.edu    // on if this is a master or slave PIC.
675632Sgblack@eecs.umich.edu    uint8_t cascadeBits;
685632Sgblack@eecs.umich.edu
695631Sgblack@eecs.umich.edu    bool edgeTriggered;
705632Sgblack@eecs.umich.edu    bool readIRR;
715632Sgblack@eecs.umich.edu
725632Sgblack@eecs.umich.edu    // State machine information for reading in initialization control words.
735631Sgblack@eecs.umich.edu    bool expectICW4;
745631Sgblack@eecs.umich.edu    int initControlWord;
755631Sgblack@eecs.umich.edu
765390SN/A  public:
775630Sgblack@eecs.umich.edu    typedef I8259Params Params;
785390SN/A
795630Sgblack@eecs.umich.edu    const Params *
805630Sgblack@eecs.umich.edu    params() const
815630Sgblack@eecs.umich.edu    {
825630Sgblack@eecs.umich.edu        return dynamic_cast<const Params *>(_params);
835630Sgblack@eecs.umich.edu    }
845630Sgblack@eecs.umich.edu
855657Sgblack@eecs.umich.edu    I8259(Params * p);
865657Sgblack@eecs.umich.edu
875657Sgblack@eecs.umich.edu    void
885657Sgblack@eecs.umich.edu    setSlave(I8259 * _slave)
895630Sgblack@eecs.umich.edu    {
905657Sgblack@eecs.umich.edu        slave = _slave;
915630Sgblack@eecs.umich.edu    }
925390SN/A
935390SN/A    Tick read(PacketPtr pkt);
945390SN/A    Tick write(PacketPtr pkt);
955632Sgblack@eecs.umich.edu
965632Sgblack@eecs.umich.edu    void signalInterrupt(int line);
975657Sgblack@eecs.umich.edu    int getVector();
985390SN/A};
995390SN/A
1005390SN/A}; // namespace X86ISA
1015390SN/A
1025630Sgblack@eecs.umich.edu#endif //__DEV_X86_I8259_HH__
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