i8254.cc revision 14290:fa11f961ae4e 
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/i8254.hh"
32
33#include "debug/I8254.hh"
34#include "dev/x86/intdev.hh"
35#include "mem/packet.hh"
36#include "mem/packet_access.hh"
37
38void
39X86ISA::I8254::counterInterrupt(unsigned int num)
40{
41    DPRINTF(I8254, "Interrupt from counter %d.\n", num);
42    if (num == 0) {
43        for (auto *wire: intPin) {
44            wire->raise();
45            //XXX This is a hack.
46            wire->lower();
47        }
48    }
49}
50
51Tick
52X86ISA::I8254::read(PacketPtr pkt)
53{
54    assert(pkt->getSize() == 1);
55    Addr offset = pkt->getAddr() - pioAddr;
56    if (offset < 3) {
57        pkt->setLE(pit.readCounter(offset));
58    } else if (offset == 3) {
59        pkt->setLE(uint8_t(-1));
60    } else {
61        panic("Read from undefined i8254 register.\n");
62    }
63    pkt->makeAtomicResponse();
64    return latency;
65}
66
67Tick
68X86ISA::I8254::write(PacketPtr pkt)
69{
70    assert(pkt->getSize() == 1);
71    Addr offset = pkt->getAddr() - pioAddr;
72    if (offset < 3) {
73        pit.writeCounter(offset, pkt->getLE<uint8_t>());
74    } else if (offset == 3) {
75        pit.writeControl(pkt->getLE<uint8_t>());
76    } else {
77        panic("Write to undefined i8254 register.\n");
78    }
79    pkt->makeAtomicResponse();
80    return latency;
81}
82
83void
84X86ISA::I8254::serialize(CheckpointOut &cp) const
85{
86    pit.serialize("pit", cp);
87}
88
89void
90X86ISA::I8254::unserialize(CheckpointIn &cp)
91{
92    pit.unserialize("pit", cp);
93}
94
95void
96X86ISA::I8254::startup()
97{
98    pit.startup();
99}
100
101X86ISA::I8254 *
102I8254Params::create()
103{
104    return new X86ISA::I8254(this);
105}
106