i8237.cc revision 5818:b47de42ec8b2 
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/i8237.hh"
32#include "mem/packet.hh"
33#include "mem/packet_access.hh"
34
35Tick
36X86ISA::I8237::read(PacketPtr pkt)
37{
38    assert(pkt->getSize() == 1);
39    Addr offset = pkt->getAddr() - pioAddr;
40    switch (offset) {
41      case 0x0:
42        panic("Read from i8237 channel 0 current address unimplemented.\n");
43      case 0x1:
44        panic("Read from i8237 channel 0 remaining "
45                "word count unimplemented.\n");
46      case 0x2:
47        panic("Read from i8237 channel 1 current address unimplemented.\n");
48      case 0x3:
49        panic("Read from i8237 channel 1 remaining "
50                "word count unimplemented.\n");
51      case 0x4:
52        panic("Read from i8237 channel 2 current address unimplemented.\n");
53      case 0x5:
54        panic("Read from i8237 channel 2 remaining "
55                "word count unimplemented.\n");
56      case 0x6:
57        panic("Read from i8237 channel 3 current address unimplemented.\n");
58      case 0x7:
59        panic("Read from i8237 channel 3 remaining "
60                "word count unimplemented.\n");
61      case 0x8:
62        panic("Read from i8237 status register unimplemented.\n");
63      default:
64        panic("Read from undefined i8237 register %d.\n", offset);
65    }
66    return latency;
67}
68
69Tick
70X86ISA::I8237::write(PacketPtr pkt)
71{
72    assert(pkt->getSize() == 1);
73    Addr offset = pkt->getAddr() - pioAddr;
74    switch (offset) {
75      case 0x0:
76        panic("Write to i8237 channel 0 starting address unimplemented.\n");
77      case 0x1:
78        panic("Write to i8237 channel 0 starting "
79                "word count unimplemented.\n");
80      case 0x2:
81        panic("Write to i8237 channel 1 starting address unimplemented.\n");
82      case 0x3:
83        panic("Write to i8237 channel 1 starting "
84                "word count unimplemented.\n");
85      case 0x4:
86        panic("Write to i8237 channel 2 starting address unimplemented.\n");
87      case 0x5:
88        panic("Write to i8237 channel 2 starting "
89                "word count unimplemented.\n");
90      case 0x6:
91        panic("Write to i8237 channel 3 starting address unimplemented.\n");
92      case 0x7:
93        panic("Write to i8237 channel 3 starting "
94                "word count unimplemented.\n");
95      case 0x8:
96        panic("Write to i8237 command register unimplemented.\n");
97      case 0x9:
98        panic("Write to i8237 request register unimplemented.\n");
99      case 0xa:
100        {
101            uint8_t command = pkt->get<uint8_t>();
102            uint8_t select = bits(command, 1, 0);
103            uint8_t bitVal = bits(command, 2);
104            if (!bitVal)
105                panic("Turning on i8237 channels unimplemented.\n");
106            replaceBits(maskReg, select, bitVal);
107        }
108        break;
109      case 0xb:
110        panic("Write to i8237 mode register unimplemented.\n");
111      case 0xc:
112        panic("Write to i8237 clear LSB/MSB flip-flop "
113                "register unimplemented.\n");
114      case 0xd:
115        panic("Write to i8237 master clear/reset register unimplemented.\n");
116      case 0xe:
117        panic("Write to i8237 clear mask register unimplemented.\n");
118      case 0xf:
119        panic("Write to i8237 write all mask register bits unimplemented.\n");
120      default:
121        panic("Write to undefined i8254 register.\n");
122    }
123    return latency;
124}
125
126X86ISA::I8237 *
127I8237Params::create()
128{
129    return new X86ISA::I8237(this);
130}
131