SouthBridge.py revision 5833
1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Gabe Black 28 29from m5.params import * 30from m5.proxy import * 31from Cmos import Cmos 32from I8042 import I8042 33from I82094AA import I82094AA 34from I8237 import I8237 35from I8254 import I8254 36from I8259 import I8259 37from Ide import IdeController 38from PcSpeaker import PcSpeaker 39from X86IntPin import X86IntLine 40from m5.SimObject import SimObject 41 42def x86IOAddress(port): 43 IO_address_space_base = 0x8000000000000000 44 return IO_address_space_base + port; 45 46class SouthBridge(SimObject): 47 type = 'SouthBridge' 48 pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks") 49 platform = Param.Platform(Parent.any, "Platform this device is part of") 50 51 _pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master') 52 _pic2 = I8259(pio_addr=x86IOAddress(0xA0), mode='I8259Slave') 53 _cmos = Cmos(pio_addr=x86IOAddress(0x70)) 54 _dma1 = I8237(pio_addr=x86IOAddress(0x0)) 55 _keyboard = I8042(data_port=x86IOAddress(0x60), \ 56 command_port=x86IOAddress(0x64)) 57 _pit = I8254(pio_addr=x86IOAddress(0x40)) 58 _speaker = PcSpeaker(pio_addr=x86IOAddress(0x61)) 59 _io_apic = I82094AA(pio_addr=0xFEC00000) 60 # This is to make sure the interrupt lines are instantiated. Don't use 61 # it for anything directly. 62 int_lines = VectorParam.X86IntLine([], "Interrupt lines") 63 64 pic1 = Param.I8259(_pic1, "Master PIC") 65 pic2 = Param.I8259(_pic2, "Slave PIC") 66 cmos = Param.Cmos(_cmos, "CMOS memory and real time clock device") 67 dma1 = Param.I8237(_dma1, "The first dma controller") 68 keyboard = Param.I8042(_keyboard, "The keyboard controller") 69 pit = Param.I8254(_pit, "Programmable interval timer") 70 speaker = Param.PcSpeaker(_speaker, "PC speaker") 71 io_apic = Param.I82094AA(_io_apic, "I/O APIC") 72 73 def connectPins(self, source, sink): 74 self.int_lines.append(X86IntLine(source=source, sink=sink)) 75 76 # IDE controller 77 ide = IdeController(disks=[], pci_func=0, pci_dev=4, pci_bus=0) 78 ide.BAR0 = 0x1f0 79 ide.BAR0LegacyIO = True 80 ide.BAR1 = 0x3f4 81 ide.BAR1Size = '3B' 82 ide.BAR1LegacyIO = True 83 ide.BAR2 = 0x170 84 ide.BAR2LegacyIO = True 85 ide.BAR3 = 0x374 86 ide.BAR3Size = '3B' 87 ide.BAR3LegacyIO = True 88 ide.BAR4 = 1 89 ide.Command = 1 90 91 def attachIO(self, bus): 92 # Route interupt signals 93 self.connectPins(self.pic1.output, self.io_apic.pin(0)) 94 self.connectPins(self.pic2.output, self.pic1.pin(2)) 95 self.connectPins(self.cmos.int_pin, self.pic2.pin(0)) 96 self.connectPins(self.pit.int_pin, self.pic1.pin(0)) 97 self.connectPins(self.pit.int_pin, self.io_apic.pin(2)) 98# self.connectPins(self.keyboard.keyboard_int_pin, 99# self.pic1.pin(1)) 100 self.connectPins(self.keyboard.keyboard_int_pin, 101 self.io_apic.pin(1)) 102# self.connectPins(self.keyboard.mouse_int_pin, 103# self.pic2.pin(4)) 104 self.connectPins(self.keyboard.mouse_int_pin, 105 self.io_apic.pin(12)) 106 # Tell the devices about each other 107 self.pic1.slave = self.pic2 108 self.speaker.i8254 = self.pit 109 self.io_apic.external_int_pic = self.pic1 110 # Connect to the bus 111 self.cmos.pio = bus.port 112 self.dma1.pio = bus.port 113 self.ide.pio = bus.port 114 self.keyboard.pio = bus.port 115 self.pic1.pio = bus.port 116 self.pic2.pio = bus.port 117 self.pit.pio = bus.port 118 self.speaker.pio = bus.port 119 self.io_apic.pio = bus.port 120 self.io_apic.int_port = bus.port 121