SouthBridge.py revision 5643
1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
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7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Gabe Black
28
29from m5.params import *
30from m5.proxy import *
31from Cmos import Cmos
32from I82094AA import I82094AA
33from I8254 import I8254
34from I8259 import I8259
35from PcSpeaker import PcSpeaker
36from m5.SimObject import SimObject
37
38def x86IOAddress(port):
39    IO_address_space_base = 0x8000000000000000
40    return IO_address_space_base + port;
41
42class SouthBridge(SimObject):
43    type = 'SouthBridge'
44    pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
45    platform = Param.Platform(Parent.any, "Platform this device is part of")
46
47    _pic1 = I8259(pio_addr=x86IOAddress(0x20), mode='I8259Master')
48    _pic2 = I8259(pio_addr=x86IOAddress(0xA0), mode='I8259Slave')
49    _cmos = Cmos(pio_addr=x86IOAddress(0x70))
50    _pit = I8254(pio_addr=x86IOAddress(0x40))
51    _speaker = PcSpeaker(pio_addr=x86IOAddress(0x61))
52    _io_apic = I82094AA(pio_addr=0xFEC00000)
53
54    pic1 = Param.I8259(_pic1, "Master PIC")
55    pic2 = Param.I8259(_pic2, "Slave PIC")
56    cmos = Param.Cmos(_cmos, "CMOS memory and real time clock device")
57    pit = Param.I8254(_pit, "Programmable interval timer")
58    speaker = Param.PcSpeaker(_speaker, "PC speaker")
59    io_apic = Param.I82094AA(_io_apic, "I/O APIC")
60
61    def attachIO(self, bus):
62        # Make internal connections
63        self.pic1.output = self.io_apic.pin(0)
64        self.pic2.output = self.pic1.pin(2)
65        self.cmos.int_pin = self.pic2.pin(0)
66        self.pit.int_pin = self.pic1.pin(0)
67        self.speaker.i8254 = self.pit
68        # Connect to the bus
69        self.cmos.pio = bus.port
70        self.pic1.pio = bus.port
71        self.pic2.pio = bus.port
72        self.pit.pio = bus.port
73        self.speaker.pio = bus.port
74        self.io_apic.pio = bus.port
75