t1000.hh revision 5034
13630Sgblack@eecs.umich.edu/*
23630Sgblack@eecs.umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
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273630Sgblack@eecs.umich.edu *
283630Sgblack@eecs.umich.edu * Authors: Ali Saidi
293630Sgblack@eecs.umich.edu */
303630Sgblack@eecs.umich.edu
313630Sgblack@eecs.umich.edu/**
323630Sgblack@eecs.umich.edu * @file
333812Ssaidi@eecs.umich.edu * Declaration of top level class for the T1000 platform chips. This class just
343630Sgblack@eecs.umich.edu * retains pointers to all its children so the children can communicate.
353630Sgblack@eecs.umich.edu */
363630Sgblack@eecs.umich.edu
373630Sgblack@eecs.umich.edu#ifndef __DEV_T1000_HH__
383630Sgblack@eecs.umich.edu#define __DEV_T1000_HH__
393630Sgblack@eecs.umich.edu
403630Sgblack@eecs.umich.edu#include "dev/platform.hh"
415034Smilesck@eecs.umich.edu#include "params/T1000.hh"
423630Sgblack@eecs.umich.edu
433630Sgblack@eecs.umich.educlass IdeController;
443630Sgblack@eecs.umich.educlass System;
453630Sgblack@eecs.umich.edu
463630Sgblack@eecs.umich.educlass T1000 : public Platform
473630Sgblack@eecs.umich.edu{
483630Sgblack@eecs.umich.edu  public:
493630Sgblack@eecs.umich.edu    /** Pointer to the system */
503630Sgblack@eecs.umich.edu    System *system;
513630Sgblack@eecs.umich.edu
523630Sgblack@eecs.umich.edu  public:
535034Smilesck@eecs.umich.edu    typedef T1000Params Params;
543630Sgblack@eecs.umich.edu    /**
553630Sgblack@eecs.umich.edu     * Constructor for the Tsunami Class.
563630Sgblack@eecs.umich.edu     * @param name name of the object
573630Sgblack@eecs.umich.edu     * @param s system the object belongs to
583630Sgblack@eecs.umich.edu     * @param intctrl pointer to the interrupt controller
593630Sgblack@eecs.umich.edu     */
605034Smilesck@eecs.umich.edu    T1000(const Params *p);
613630Sgblack@eecs.umich.edu
623630Sgblack@eecs.umich.edu    /**
633630Sgblack@eecs.umich.edu     * Return the interrupting frequency to AlphaAccess
643630Sgblack@eecs.umich.edu     * @return frequency of RTC interrupts
653630Sgblack@eecs.umich.edu     */
663630Sgblack@eecs.umich.edu    virtual Tick intrFrequency();
673630Sgblack@eecs.umich.edu
683630Sgblack@eecs.umich.edu    /**
693630Sgblack@eecs.umich.edu     * Cause the cpu to post a serial interrupt to the CPU.
703630Sgblack@eecs.umich.edu     */
713630Sgblack@eecs.umich.edu    virtual void postConsoleInt();
723630Sgblack@eecs.umich.edu
733630Sgblack@eecs.umich.edu    /**
743812Ssaidi@eecs.umich.edu     * Clear a posted CPU interrupt
753630Sgblack@eecs.umich.edu     */
763630Sgblack@eecs.umich.edu    virtual void clearConsoleInt();
773630Sgblack@eecs.umich.edu
783630Sgblack@eecs.umich.edu    /**
793630Sgblack@eecs.umich.edu     * Cause the chipset to post a cpi interrupt to the CPU.
803630Sgblack@eecs.umich.edu     */
813630Sgblack@eecs.umich.edu    virtual void postPciInt(int line);
823630Sgblack@eecs.umich.edu
833630Sgblack@eecs.umich.edu    /**
843630Sgblack@eecs.umich.edu     * Clear a posted PCI->CPU interrupt
853630Sgblack@eecs.umich.edu     */
863630Sgblack@eecs.umich.edu    virtual void clearPciInt(int line);
873630Sgblack@eecs.umich.edu
883630Sgblack@eecs.umich.edu
893630Sgblack@eecs.umich.edu    virtual Addr pciToDma(Addr pciAddr) const;
903630Sgblack@eecs.umich.edu
913630Sgblack@eecs.umich.edu    /**
923630Sgblack@eecs.umich.edu     * Calculate the configuration address given a bus/dev/func.
933630Sgblack@eecs.umich.edu     */
943630Sgblack@eecs.umich.edu    virtual Addr calcConfigAddr(int bus, int dev, int func);
953630Sgblack@eecs.umich.edu};
963630Sgblack@eecs.umich.edu
973630Sgblack@eecs.umich.edu#endif // __DEV_T1000_HH__
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