13630Sgblack@eecs.umich.edu/*
23630Sgblack@eecs.umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
33630Sgblack@eecs.umich.edu * All rights reserved.
43630Sgblack@eecs.umich.edu *
53630Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
63630Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
73630Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
83630Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
93630Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
103630Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
113630Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution;
123630Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its
133630Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from
143630Sgblack@eecs.umich.edu * this software without specific prior written permission.
153630Sgblack@eecs.umich.edu *
163630Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
173630Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
183630Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
193630Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
203630Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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253630Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
263630Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
273630Sgblack@eecs.umich.edu *
283630Sgblack@eecs.umich.edu * Authors: Ali Saidi
293630Sgblack@eecs.umich.edu */
303630Sgblack@eecs.umich.edu
313630Sgblack@eecs.umich.edu/**
323630Sgblack@eecs.umich.edu * @file
333812Ssaidi@eecs.umich.edu * Declaration of top level class for the T1000 platform chips. This class just
343630Sgblack@eecs.umich.edu * retains pointers to all its children so the children can communicate.
353630Sgblack@eecs.umich.edu */
363630Sgblack@eecs.umich.edu
373630Sgblack@eecs.umich.edu#ifndef __DEV_T1000_HH__
383630Sgblack@eecs.umich.edu#define __DEV_T1000_HH__
393630Sgblack@eecs.umich.edu
403630Sgblack@eecs.umich.edu#include "dev/platform.hh"
415034Smilesck@eecs.umich.edu#include "params/T1000.hh"
423630Sgblack@eecs.umich.edu
433630Sgblack@eecs.umich.educlass IdeController;
443630Sgblack@eecs.umich.educlass System;
453630Sgblack@eecs.umich.edu
463630Sgblack@eecs.umich.educlass T1000 : public Platform
473630Sgblack@eecs.umich.edu{
483630Sgblack@eecs.umich.edu  public:
493630Sgblack@eecs.umich.edu    /** Pointer to the system */
503630Sgblack@eecs.umich.edu    System *system;
513630Sgblack@eecs.umich.edu
523630Sgblack@eecs.umich.edu  public:
535034Smilesck@eecs.umich.edu    typedef T1000Params Params;
543630Sgblack@eecs.umich.edu    /**
553630Sgblack@eecs.umich.edu     * Constructor for the Tsunami Class.
563630Sgblack@eecs.umich.edu     * @param name name of the object
573630Sgblack@eecs.umich.edu     * @param s system the object belongs to
583630Sgblack@eecs.umich.edu     * @param intctrl pointer to the interrupt controller
593630Sgblack@eecs.umich.edu     */
605034Smilesck@eecs.umich.edu    T1000(const Params *p);
613630Sgblack@eecs.umich.edu
623630Sgblack@eecs.umich.edu    /**
633630Sgblack@eecs.umich.edu     * Cause the cpu to post a serial interrupt to the CPU.
643630Sgblack@eecs.umich.edu     */
653630Sgblack@eecs.umich.edu    virtual void postConsoleInt();
663630Sgblack@eecs.umich.edu
673630Sgblack@eecs.umich.edu    /**
683812Ssaidi@eecs.umich.edu     * Clear a posted CPU interrupt
693630Sgblack@eecs.umich.edu     */
703630Sgblack@eecs.umich.edu    virtual void clearConsoleInt();
713630Sgblack@eecs.umich.edu
723630Sgblack@eecs.umich.edu    /**
733630Sgblack@eecs.umich.edu     * Cause the chipset to post a cpi interrupt to the CPU.
743630Sgblack@eecs.umich.edu     */
753630Sgblack@eecs.umich.edu    virtual void postPciInt(int line);
763630Sgblack@eecs.umich.edu
773630Sgblack@eecs.umich.edu    /**
783630Sgblack@eecs.umich.edu     * Clear a posted PCI->CPU interrupt
793630Sgblack@eecs.umich.edu     */
803630Sgblack@eecs.umich.edu    virtual void clearPciInt(int line);
813630Sgblack@eecs.umich.edu
823630Sgblack@eecs.umich.edu
833630Sgblack@eecs.umich.edu    virtual Addr pciToDma(Addr pciAddr) const;
843630Sgblack@eecs.umich.edu
853630Sgblack@eecs.umich.edu    /**
863630Sgblack@eecs.umich.edu     * Calculate the configuration address given a bus/dev/func.
873630Sgblack@eecs.umich.edu     */
885834Sgblack@eecs.umich.edu    virtual Addr calcPciConfigAddr(int bus, int dev, int func);
895834Sgblack@eecs.umich.edu
905834Sgblack@eecs.umich.edu    /**
915834Sgblack@eecs.umich.edu     * Calculate the address for an IO location on the PCI bus.
925834Sgblack@eecs.umich.edu     */
935834Sgblack@eecs.umich.edu    virtual Addr calcPciIOAddr(Addr addr);
945834Sgblack@eecs.umich.edu
955834Sgblack@eecs.umich.edu    /**
965834Sgblack@eecs.umich.edu     * Calculate the address for a memory location on the PCI bus.
975834Sgblack@eecs.umich.edu     */
985834Sgblack@eecs.umich.edu    virtual Addr calcPciMemAddr(Addr addr);
993630Sgblack@eecs.umich.edu};
1003630Sgblack@eecs.umich.edu
1013630Sgblack@eecs.umich.edu#endif // __DEV_T1000_HH__
102