dtod.cc revision 3943
110107Sradhika.jagtap@ARM.com/* 210107Sradhika.jagtap@ARM.com * Copyright (c) 2004-2006 The Regents of The University of Michigan 310107Sradhika.jagtap@ARM.com * All rights reserved. 410107Sradhika.jagtap@ARM.com * 510107Sradhika.jagtap@ARM.com * Redistribution and use in source and binary forms, with or without 610107Sradhika.jagtap@ARM.com * modification, are permitted provided that the following conditions are 710107Sradhika.jagtap@ARM.com * met: redistributions of source code must retain the above copyright 810107Sradhika.jagtap@ARM.com * notice, this list of conditions and the following disclaimer; 910107Sradhika.jagtap@ARM.com * redistributions in binary form must reproduce the above copyright 1010107Sradhika.jagtap@ARM.com * notice, this list of conditions and the following disclaimer in the 1110107Sradhika.jagtap@ARM.com * documentation and/or other materials provided with the distribution; 1210107Sradhika.jagtap@ARM.com * neither the name of the copyright holders nor the names of its 1310107Sradhika.jagtap@ARM.com * contributors may be used to endorse or promote products derived from 1410107Sradhika.jagtap@ARM.com * this software without specific prior written permission. 1510107Sradhika.jagtap@ARM.com * 1610107Sradhika.jagtap@ARM.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710107Sradhika.jagtap@ARM.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810107Sradhika.jagtap@ARM.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910107Sradhika.jagtap@ARM.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010107Sradhika.jagtap@ARM.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110107Sradhika.jagtap@ARM.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210107Sradhika.jagtap@ARM.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310107Sradhika.jagtap@ARM.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410107Sradhika.jagtap@ARM.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510107Sradhika.jagtap@ARM.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610107Sradhika.jagtap@ARM.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710107Sradhika.jagtap@ARM.com * 2810107Sradhika.jagtap@ARM.com * Authors: Ali Saidi 2910107Sradhika.jagtap@ARM.com */ 3010107Sradhika.jagtap@ARM.com 3110107Sradhika.jagtap@ARM.com/** @file 3210107Sradhika.jagtap@ARM.com * Time of date device implementation 3310107Sradhika.jagtap@ARM.com */ 3410107Sradhika.jagtap@ARM.com#include <sys/time.h> 3510107Sradhika.jagtap@ARM.com 3610107Sradhika.jagtap@ARM.com#include <deque> 3710107Sradhika.jagtap@ARM.com#include <string> 3810107Sradhika.jagtap@ARM.com#include <vector> 3910107Sradhika.jagtap@ARM.com 4010107Sradhika.jagtap@ARM.com#include "base/trace.hh" 4110107Sradhika.jagtap@ARM.com#include "dev/sparc/dtod.hh" 4210107Sradhika.jagtap@ARM.com#include "dev/platform.hh" 4310107Sradhika.jagtap@ARM.com#include "mem/packet_access.hh" 4410107Sradhika.jagtap@ARM.com#include "mem/port.hh" 4510107Sradhika.jagtap@ARM.com#include "sim/builder.hh" 4610107Sradhika.jagtap@ARM.com#include "sim/system.hh" 4710107Sradhika.jagtap@ARM.com 4810107Sradhika.jagtap@ARM.comusing namespace std; 4910107Sradhika.jagtap@ARM.comusing namespace TheISA; 5010107Sradhika.jagtap@ARM.com 5110107Sradhika.jagtap@ARM.comDumbTOD::DumbTOD(Params *p) 5210107Sradhika.jagtap@ARM.com : BasicPioDevice(p) 5310107Sradhika.jagtap@ARM.com{ 5410107Sradhika.jagtap@ARM.com pioSize = 0x08; 5510107Sradhika.jagtap@ARM.com 5610107Sradhika.jagtap@ARM.com struct tm tm; 5710107Sradhika.jagtap@ARM.com parseTime(p->init_time, &tm); 5810107Sradhika.jagtap@ARM.com todTime = timegm(&tm); 5910107Sradhika.jagtap@ARM.com 6010107Sradhika.jagtap@ARM.com DPRINTFN("Real-time clock set to %s\n", asctime(&tm)); 6110107Sradhika.jagtap@ARM.com DPRINTFN("Real-time clock set to %d\n", todTime); 6210107Sradhika.jagtap@ARM.com} 6310107Sradhika.jagtap@ARM.com 6410107Sradhika.jagtap@ARM.comTick 6510107Sradhika.jagtap@ARM.comDumbTOD::read(PacketPtr pkt) 6610107Sradhika.jagtap@ARM.com{ 6710107Sradhika.jagtap@ARM.com assert(pkt->result == Packet::Unknown); 6810107Sradhika.jagtap@ARM.com assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 6910107Sradhika.jagtap@ARM.com assert(pkt->getSize() == 8); 7010107Sradhika.jagtap@ARM.com 7110107Sradhika.jagtap@ARM.com pkt->allocate(); 7210107Sradhika.jagtap@ARM.com pkt->set(todTime); 7310107Sradhika.jagtap@ARM.com todTime += 1000; 7410107Sradhika.jagtap@ARM.com 7510107Sradhika.jagtap@ARM.com pkt->result = Packet::Success; 7610107Sradhika.jagtap@ARM.com return pioDelay; 7710107Sradhika.jagtap@ARM.com} 7810107Sradhika.jagtap@ARM.com 7910107Sradhika.jagtap@ARM.comTick 8010107Sradhika.jagtap@ARM.comDumbTOD::write(PacketPtr pkt) 8110107Sradhika.jagtap@ARM.com{ 8210107Sradhika.jagtap@ARM.com panic("Dumb tod device doesn't support writes\n"); 8310107Sradhika.jagtap@ARM.com} 8410107Sradhika.jagtap@ARM.com 8510107Sradhika.jagtap@ARM.comBEGIN_DECLARE_SIM_OBJECT_PARAMS(DumbTOD) 8610107Sradhika.jagtap@ARM.com 8710107Sradhika.jagtap@ARM.com Param<Addr> pio_addr; 8810107Sradhika.jagtap@ARM.com Param<Tick> pio_latency; 8910107Sradhika.jagtap@ARM.com SimObjectParam<Platform *> platform; 9010107Sradhika.jagtap@ARM.com SimObjectParam<System *> system; 9110107Sradhika.jagtap@ARM.com VectorParam<int> time; 9210107Sradhika.jagtap@ARM.com 9310107Sradhika.jagtap@ARM.comEND_DECLARE_SIM_OBJECT_PARAMS(DumbTOD) 9410107Sradhika.jagtap@ARM.com 9510107Sradhika.jagtap@ARM.comBEGIN_INIT_SIM_OBJECT_PARAMS(DumbTOD) 9610107Sradhika.jagtap@ARM.com 9710107Sradhika.jagtap@ARM.com INIT_PARAM(pio_addr, "Device Address"), 9810107Sradhika.jagtap@ARM.com INIT_PARAM(pio_latency, "Programmed IO latency"), 9910107Sradhika.jagtap@ARM.com INIT_PARAM(platform, "platform"), 10010107Sradhika.jagtap@ARM.com INIT_PARAM(system, "system object"), 10110107Sradhika.jagtap@ARM.com INIT_PARAM(time, "") 10210107Sradhika.jagtap@ARM.com 10310107Sradhika.jagtap@ARM.comEND_INIT_SIM_OBJECT_PARAMS(DumbTOD) 10410107Sradhika.jagtap@ARM.com 10510107Sradhika.jagtap@ARM.comCREATE_SIM_OBJECT(DumbTOD) 10610107Sradhika.jagtap@ARM.com{ 10710107Sradhika.jagtap@ARM.com DumbTOD::Params *p = new DumbTOD::Params; 10810107Sradhika.jagtap@ARM.com p->name =getInstanceName(); 10910107Sradhika.jagtap@ARM.com p->pio_addr = pio_addr; 11010107Sradhika.jagtap@ARM.com p->pio_delay = pio_latency; 11110107Sradhika.jagtap@ARM.com p->platform = platform; 11210107Sradhika.jagtap@ARM.com p->system = system; 11310107Sradhika.jagtap@ARM.com p->init_time = time; 11410107Sradhika.jagtap@ARM.com return new DumbTOD(p); 11510107Sradhika.jagtap@ARM.com} 11610107Sradhika.jagtap@ARM.com 11710107Sradhika.jagtap@ARM.comREGISTER_SIM_OBJECT("DumbTOD", DumbTOD) 11810107Sradhika.jagtap@ARM.com