platform.cc revision 2846
1865SN/A/* 21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 3865SN/A * All rights reserved. 4865SN/A * 5865SN/A * Redistribution and use in source and binary forms, with or without 6865SN/A * modification, are permitted provided that the following conditions are 7865SN/A * met: redistributions of source code must retain the above copyright 8865SN/A * notice, this list of conditions and the following disclaimer; 9865SN/A * redistributions in binary form must reproduce the above copyright 10865SN/A * notice, this list of conditions and the following disclaimer in the 11865SN/A * documentation and/or other materials provided with the distribution; 12865SN/A * neither the name of the copyright holders nor the names of its 13865SN/A * contributors may be used to endorse or promote products derived from 14865SN/A * this software without specific prior written permission. 15865SN/A * 16865SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17865SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18865SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19865SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20865SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21865SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22865SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23865SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24865SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25865SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26865SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi 292665Ssaidi@eecs.umich.edu * Nathan Binkert 30865SN/A */ 31865SN/A 32865SN/A#include "dev/platform.hh" 33865SN/A#include "sim/builder.hh" 34865SN/A#include "sim/sim_exit.hh" 35865SN/A 36865SN/Ausing namespace std; 372107SN/Ausing namespace TheISA; 38865SN/A 392542SN/APlatform::Platform(const string &name, IntrControl *intctrl) 402542SN/A : SimObject(name), intrctrl(intctrl) 411634SN/A{ 421634SN/A} 431634SN/A 441634SN/APlatform::~Platform() 451634SN/A{ 461634SN/A} 471634SN/A 481149SN/Avoid 491149SN/APlatform::postPciInt(int line) 501149SN/A{ 511149SN/A panic("No PCI interrupt support in platform."); 521149SN/A} 531149SN/A 541149SN/Avoid 551149SN/APlatform::clearPciInt(int line) 561149SN/A{ 571149SN/A panic("No PCI interrupt support in platform."); 581149SN/A} 591149SN/A 601149SN/AAddr 611149SN/APlatform::pciToDma(Addr pciAddr) const 621149SN/A{ 631149SN/A panic("No PCI dma support in platform."); 641149SN/A} 651149SN/A 662846Ssaidi@eecs.umich.eduvoid 672846Ssaidi@eecs.umich.eduPlatform::registerPciDevice(uint8_t bus, uint8_t dev, uint8_t func, uint8_t intr) 682846Ssaidi@eecs.umich.edu{ 692846Ssaidi@eecs.umich.edu uint32_t bdf = bus << 16 | dev << 8 | func << 0; 702846Ssaidi@eecs.umich.edu if (pciDevices.find(bdf) != pciDevices.end()) 712846Ssaidi@eecs.umich.edu fatal("Two PCI devices have same bus:device:function\n"); 722846Ssaidi@eecs.umich.edu 732846Ssaidi@eecs.umich.edu if (intLines.test(intr)) 742846Ssaidi@eecs.umich.edu fatal("Two PCI devices have same interrupt line: %d\n", intr); 752846Ssaidi@eecs.umich.edu 762846Ssaidi@eecs.umich.edu pciDevices.insert(bdf); 772846Ssaidi@eecs.umich.edu 782846Ssaidi@eecs.umich.edu intLines.set(intr); 792846Ssaidi@eecs.umich.edu} 802846Ssaidi@eecs.umich.edu 812846Ssaidi@eecs.umich.edu 82865SN/ADEFINE_SIM_OBJECT_CLASS_NAME("Platform", Platform) 83865SN/A 84