device.hh revision 845
111293Sandreas.hansson@arm.com/* 211293Sandreas.hansson@arm.com * Copyright (c) 2003 The Regents of The University of Michigan 311293Sandreas.hansson@arm.com * All rights reserved. 411293Sandreas.hansson@arm.com * 511293Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 611293Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 711293Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 811293Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 911293Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 1011293Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 1111293Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 1211293Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 1311293Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from 1411293Sandreas.hansson@arm.com * this software without specific prior written permission. 1511293Sandreas.hansson@arm.com * 1611293Sandreas.hansson@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1711293Sandreas.hansson@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1811293Sandreas.hansson@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1911293Sandreas.hansson@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2011293Sandreas.hansson@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2111293Sandreas.hansson@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2211293Sandreas.hansson@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2311293Sandreas.hansson@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2411293Sandreas.hansson@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2511293Sandreas.hansson@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2611293Sandreas.hansson@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2711293Sandreas.hansson@arm.com */ 2811293Sandreas.hansson@arm.com 2911293Sandreas.hansson@arm.com/* @file 3011293Sandreas.hansson@arm.com * Interface for devices using PCI configuration 3111293Sandreas.hansson@arm.com */ 3211293Sandreas.hansson@arm.com 3311293Sandreas.hansson@arm.com#ifndef __PCI_DEV_HH__ 3411293Sandreas.hansson@arm.com#define __PCI_DEV_HH__ 3511293Sandreas.hansson@arm.com 36#include "dev/pcireg.h" 37#include "dev/io_device.hh" 38 39class PciConfigAll; 40class MemoryController; 41 42class PciConfigData : public SimObject 43{ 44 public: 45 PciConfigData(const std::string &name) 46 : SimObject(name) 47 { 48 memset(config.data, 0, sizeof(config.data)); 49 memset(BARAddrs, 0, sizeof(BARAddrs)); 50 memset(BARSize, 0, sizeof(BARSize)); 51 } 52 53 PCIConfig config; 54 uint32_t BARSize[6]; 55 Addr BARAddrs[6]; 56}; 57 58/** 59 * PCI device, base implemnation is only config space. 60 * Each device is connected to a PCIConfigSpace device 61 * which returns -1 for everything but the pcidevs that 62 * register with it. This object registers with the PCIConfig space 63 * object. 64 */ 65class PciDev : public DmaDevice 66{ 67 protected: 68 MemoryController *MMU; 69 PciConfigAll *ConfigSpace; 70 PciConfigData *ConfigData; 71 uint32_t BusNum; 72 uint32_t DeviceNum; 73 uint32_t FunctionNum; 74 75 PCIConfig config; 76 uint32_t BARSize[6]; 77 Addr BARAddrs[6]; 78 79 public: 80 PciDev(const std::string &name, MemoryController *mmu, PciConfigAll *cf, 81 PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func); 82 83 virtual Fault read(MemReqPtr &req, uint8_t *data) { 84 return No_Fault; 85 } 86 virtual Fault write(MemReqPtr &req, const uint8_t *data) { 87 return No_Fault; 88 } 89 90 virtual void WriteConfig(int offset, int size, uint32_t data); 91 virtual void ReadConfig(int offset, int size, uint8_t *data); 92 93 virtual void serialize(std::ostream &os); 94 virtual void unserialize(Checkpoint *cp, const std::string §ion); 95}; 96 97#endif // __PCI_DEV_HH__ 98