device.hh revision 2665 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Nathan Binkert
31 */
32
33/* @file
34 * Interface for devices using PCI configuration
35 */
36
37#ifndef __DEV_PCIDEV_HH__
38#define __DEV_PCIDEV_HH__
39
40#include "dev/io_device.hh"
41#include "dev/pcireg.h"
42#include "dev/platform.hh"
43
44#define BAR_IO_MASK 0x3
45#define BAR_MEM_MASK 0xF
46#define BAR_IO_SPACE_BIT 0x1
47#define BAR_IO_SPACE(x) ((x) & BAR_IO_SPACE_BIT)
48#define BAR_NUMBER(x) (((x) - PCI0_BASE_ADDR0) >> 0x2);
49
50class PciConfigAll;
51
52
53/**
54 * This class encapulates the first 64 bytes of a singles PCI
55 * devices config space that in configured by the configuration file.
56 */
57class PciConfigData : public SimObject
58{
59  public:
60    /**
61     * Constructor to initialize the devices config space to 0.
62     */
63    PciConfigData(const std::string &name)
64        : SimObject(name)
65    {
66        memset(config.data, 0, sizeof(config.data));
67        memset(BARAddrs, 0, sizeof(BARAddrs));
68        memset(BARSize, 0, sizeof(BARSize));
69    }
70
71    /** The first 64 bytes */
72    PCIConfig config;
73
74    /** The size of the BARs */
75    uint32_t BARSize[6];
76
77    /** The addresses of the BARs */
78    Addr BARAddrs[6];
79};
80
81/**
82 * PCI device, base implemnation is only config space.
83 * Each device is connected to a PCIConfigSpace device
84 * which returns -1 for everything but the pcidevs that
85 * register with it. This object registers with the PCIConfig space
86 * object.
87 */
88class PciDev : public DmaDevice
89{
90  public:
91    struct Params : public ::PioDevice::Params
92    {
93        /**
94         * A pointer to the configspace all object that calls us when
95         * a read comes to this particular device/function.
96         */
97        PciConfigAll *configSpace;
98
99        /**
100         * A pointer to the object that contains the first 64 bytes of
101         * config space
102         */
103        PciConfigData *configData;
104
105        /** The bus number we are on */
106        uint32_t busNum;
107
108        /** The device number we have */
109        uint32_t deviceNum;
110
111        /** The function number */
112        uint32_t functionNum;
113
114        /** The latency for pio accesses. */
115        Tick pio_delay;
116    };
117
118  public:
119    const Params *params() const { return (const Params *)_params; }
120
121  protected:
122    /** The current config space. Unlike the PciConfigData this is
123     * updated during simulation while continues to reflect what was
124     * in the config file.
125     */
126    PCIConfig config;
127
128    /** The size of the BARs */
129    uint32_t BARSize[6];
130
131    /** The current address mapping of the BARs */
132    Addr BARAddrs[6];
133
134    bool
135    isBAR(Addr addr, int bar) const
136    {
137        assert(bar >= 0 && bar < 6);
138        return BARAddrs[bar] <= addr && addr < BARAddrs[bar] + BARSize[bar];
139    }
140
141    int
142    getBAR(Addr addr)
143    {
144        for (int i = 0; i <= 5; ++i)
145            if (isBAR(addr, i))
146                return i;
147
148        return -1;
149    }
150
151    bool
152    getBAR(Addr paddr, Addr &daddr, int &bar)
153    {
154        int b = getBAR(paddr);
155        if (b < 0)
156            return false;
157
158        daddr = paddr - BARAddrs[b];
159        bar = b;
160        return true;
161    }
162
163  protected:
164    Platform *plat;
165    PciConfigData *configData;
166    Tick pioDelay;
167
168  public:
169    Addr pciToDma(Addr pciAddr) const
170    { return plat->pciToDma(pciAddr); }
171
172    void
173    intrPost()
174    { plat->postPciInt(configData->config.interruptLine); }
175
176    void
177    intrClear()
178    { plat->clearPciInt(configData->config.interruptLine); }
179
180    uint8_t
181    interruptLine()
182    { return configData->config.interruptLine; }
183
184    /** return the address ranges that this device responds to.
185     * @params range_list range list to populate with ranges
186     */
187    void addressRanges(AddrRangeList &range_list);
188
189    /**
190     * Constructor for PCI Dev. This function copies data from the
191     * config file object PCIConfigData and registers the device with
192     * a PciConfigAll object.
193     */
194    PciDev(Params *params);
195
196    /**
197     * Write to the PCI config space data that is stored locally. This may be
198     * overridden by the device but at some point it will eventually call this
199     * for normal operations that it does not need to override.
200     * @param offset the offset into config space
201     * @param size the size of the write
202     * @param data the data to write
203     */
204    virtual void writeConfig(int offset, const uint8_t data);
205    virtual void writeConfig(int offset, const uint16_t data);
206    virtual void writeConfig(int offset, const uint32_t data);
207
208
209    /**
210     * Read from the PCI config space data that is stored locally. This may be
211     * overridden by the device but at some point it will eventually call this
212     * for normal operations that it does not need to override.
213     * @param offset the offset into config space
214     * @param size the size of the read
215     * @param data pointer to the location where the read value should be stored
216     */
217    virtual void readConfig(int offset, uint8_t *data);
218    virtual void readConfig(int offset, uint16_t *data);
219    virtual void readConfig(int offset, uint32_t *data);
220
221    /**
222     * Serialize this object to the given output stream.
223     * @param os The stream to serialize to.
224     */
225    virtual void serialize(std::ostream &os);
226
227    /**
228     * Reconstruct the state of this object from a checkpoint.
229     * @param cp The checkpoint use.
230     * @param section The section name of this object
231     */
232    virtual void unserialize(Checkpoint *cp, const std::string &section);
233};
234#endif // __DEV_PCIDEV_HH__
235