device.hh revision 1762
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* @file 30 * Interface for devices using PCI configuration 31 */ 32 33#ifndef __DEV_PCIDEV_HH__ 34#define __DEV_PCIDEV_HH__ 35 36#include "dev/io_device.hh" 37#include "dev/pcireg.h" 38#include "dev/platform.hh" 39 40class PciConfigAll; 41class MemoryController; 42 43 44/** 45 * This class encapulates the first 64 bytes of a singles PCI 46 * devices config space that in configured by the configuration file. 47 */ 48class PciConfigData : public SimObject 49{ 50 public: 51 /** 52 * Constructor to initialize the devices config space to 0. 53 */ 54 PciConfigData(const std::string &name) 55 : SimObject(name) 56 { 57 memset(config.data, 0, sizeof(config.data)); 58 memset(BARAddrs, 0, sizeof(BARAddrs)); 59 memset(BARSize, 0, sizeof(BARSize)); 60 } 61 62 /** The first 64 bytes */ 63 PCIConfig config; 64 65 /** The size of the BARs */ 66 uint32_t BARSize[6]; 67 68 /** The addresses of the BARs */ 69 Addr BARAddrs[6]; 70}; 71 72/** 73 * PCI device, base implemnation is only config space. 74 * Each device is connected to a PCIConfigSpace device 75 * which returns -1 for everything but the pcidevs that 76 * register with it. This object registers with the PCIConfig space 77 * object. 78 */ 79class PciDev : public DmaDevice 80{ 81 public: 82 struct Params 83 { 84 std::string name; 85 Platform *plat; 86 MemoryController *mmu; 87 88 /** 89 * A pointer to the configspace all object that calls us when 90 * a read comes to this particular device/function. 91 */ 92 PciConfigAll *configSpace; 93 94 /** 95 * A pointer to the object that contains the first 64 bytes of 96 * config space 97 */ 98 PciConfigData *configData; 99 100 /** The bus number we are on */ 101 uint32_t busNum; 102 103 /** The device number we have */ 104 uint32_t deviceNum; 105 106 /** The function number */ 107 uint32_t functionNum; 108 }; 109 110 protected: 111 Params *_params; 112 113 public: 114 const Params *params() const { return _params; } 115 116 protected: 117 /** The current config space. Unlike the PciConfigData this is 118 * updated during simulation while continues to refelect what was 119 * in the config file. 120 */ 121 PCIConfig config; 122 123 /** The size of the BARs */ 124 uint32_t BARSize[6]; 125 126 /** The current address mapping of the BARs */ 127 Addr BARAddrs[6]; 128 129 protected: 130 Platform *plat; 131 PciConfigData *configData; 132 133 public: 134 Addr pciToDma(Addr pciAddr) const 135 { return plat->pciToDma(pciAddr); } 136 137 void 138 intrPost() 139 { plat->postPciInt(configData->config.hdr.pci0.interruptLine); } 140 141 void 142 intrClear() 143 { plat->clearPciInt(configData->config.hdr.pci0.interruptLine); } 144 145 uint8_t 146 interruptLine() 147 { return configData->config.hdr.pci0.interruptLine; } 148 149 public: 150 /** 151 * Constructor for PCI Dev. This function copies data from the 152 * config file object PCIConfigData and registers the device with 153 * a PciConfigAll object. 154 */ 155 PciDev(Params *params); 156 157 virtual Fault read(MemReqPtr &req, uint8_t *data) { 158 return No_Fault; 159 } 160 virtual Fault write(MemReqPtr &req, const uint8_t *data) { 161 return No_Fault; 162 } 163 164 /** 165 * Write to the PCI config space data that is stored locally. This may be 166 * overridden by the device but at some point it will eventually call this 167 * for normal operations that it does not need to override. 168 * @param offset the offset into config space 169 * @param size the size of the write 170 * @param data the data to write 171 */ 172 virtual void WriteConfig(int offset, int size, uint32_t data); 173 174 175 /** 176 * Read from the PCI config space data that is stored locally. This may be 177 * overridden by the device but at some point it will eventually call this 178 * for normal operations that it does not need to override. 179 * @param offset the offset into config space 180 * @param size the size of the read 181 * @param data pointer to the location where the read value should be stored 182 */ 183 virtual void ReadConfig(int offset, int size, uint8_t *data); 184 185 /** 186 * Serialize this object to the given output stream. 187 * @param os The stream to serialize to. 188 */ 189 virtual void serialize(std::ostream &os); 190 191 /** 192 * Reconstruct the state of this object from a checkpoint. 193 * @param cp The checkpoint use. 194 * @param section The section name of this object 195 */ 196 virtual void unserialize(Checkpoint *cp, const std::string §ion); 197}; 198 199#endif // __DEV_PCIDEV_HH__ 200