PciDevice.py revision 9807 
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
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11# neither the name of the copyright holders nor the names of its
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13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Nathan Binkert
28
29from m5.SimObject import SimObject
30from m5.params import *
31from m5.proxy import *
32from Device import BasicPioDevice, DmaDevice, PioDevice
33
34class PciConfigAll(BasicPioDevice):
35    type = 'PciConfigAll'
36    cxx_header = "dev/pciconfigall.hh"
37    platform = Param.Platform(Parent.any, "Platform this device is part of.")
38    bus = Param.UInt8(0x00, "PCI bus to act as config space for")
39    size = Param.MemorySize32('16MB', "Size of config space")
40
41    pio_latency = '30ns'
42    pio_addr = 0 # will be overridden by platform-based calculation
43
44
45class PciDevice(DmaDevice):
46    type = 'PciDevice'
47    cxx_class = 'PciDevice'
48    cxx_header = "dev/pcidev.hh"
49    abstract = True
50    platform = Param.Platform(Parent.any, "Platform this device is part of.")
51    config = SlavePort("PCI configuration space port")
52    pci_bus = Param.Int("PCI bus")
53    pci_dev = Param.Int("PCI device number")
54    pci_func = Param.Int("PCI function code")
55    pio_latency = Param.Latency('30ns', "Programmed IO latency")
56    config_latency = Param.Latency('20ns', "Config read or write latency")
57
58    VendorID = Param.UInt16("Vendor ID")
59    DeviceID = Param.UInt16("Device ID")
60    Command = Param.UInt16(0, "Command")
61    Status = Param.UInt16(0, "Status")
62    Revision = Param.UInt8(0, "Device")
63    ProgIF = Param.UInt8(0, "Programming Interface")
64    SubClassCode = Param.UInt8(0, "Sub-Class Code")
65    ClassCode = Param.UInt8(0, "Class Code")
66    CacheLineSize = Param.UInt8(0, "System Cacheline Size")
67    LatencyTimer = Param.UInt8(0, "PCI Latency Timer")
68    HeaderType = Param.UInt8(0, "PCI Header Type")
69    BIST = Param.UInt8(0, "Built In Self Test")
70
71    BAR0 = Param.UInt32(0x00, "Base Address Register 0")
72    BAR1 = Param.UInt32(0x00, "Base Address Register 1")
73    BAR2 = Param.UInt32(0x00, "Base Address Register 2")
74    BAR3 = Param.UInt32(0x00, "Base Address Register 3")
75    BAR4 = Param.UInt32(0x00, "Base Address Register 4")
76    BAR5 = Param.UInt32(0x00, "Base Address Register 5")
77    BAR0Size = Param.MemorySize32('0B', "Base Address Register 0 Size")
78    BAR1Size = Param.MemorySize32('0B', "Base Address Register 1 Size")
79    BAR2Size = Param.MemorySize32('0B', "Base Address Register 2 Size")
80    BAR3Size = Param.MemorySize32('0B', "Base Address Register 3 Size")
81    BAR4Size = Param.MemorySize32('0B', "Base Address Register 4 Size")
82    BAR5Size = Param.MemorySize32('0B', "Base Address Register 5 Size")
83    BAR0LegacyIO = Param.Bool(False, "Whether BAR0 is hardwired legacy IO")
84    BAR1LegacyIO = Param.Bool(False, "Whether BAR1 is hardwired legacy IO")
85    BAR2LegacyIO = Param.Bool(False, "Whether BAR2 is hardwired legacy IO")
86    BAR3LegacyIO = Param.Bool(False, "Whether BAR3 is hardwired legacy IO")
87    BAR4LegacyIO = Param.Bool(False, "Whether BAR4 is hardwired legacy IO")
88    BAR5LegacyIO = Param.Bool(False, "Whether BAR5 is hardwired legacy IO")
89
90    CardbusCIS = Param.UInt32(0x00, "Cardbus Card Information Structure")
91    SubsystemID = Param.UInt16(0x00, "Subsystem ID")
92    SubsystemVendorID = Param.UInt16(0x00, "Subsystem Vendor ID")
93    ExpansionROM = Param.UInt32(0x00, "Expansion ROM Base Address")
94    InterruptLine = Param.UInt8(0x00, "Interrupt Line")
95    InterruptPin = Param.UInt8(0x00, "Interrupt Pin")
96    MaximumLatency = Param.UInt8(0x00, "Maximum Latency")
97    MinimumGrant = Param.UInt8(0x00, "Minimum Grant")
98
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100