Ethernet.py revision 13784:1941dc118243
1# Copyright (c) 2015 ARM Limited
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2005-2007 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Nathan Binkert
40
41from m5.defines import buildEnv
42from m5.SimObject import SimObject
43from m5.params import *
44from m5.proxy import *
45from m5.objects.PciDevice import PciDevice
46
47class EtherLink(SimObject):
48    type = 'EtherLink'
49    cxx_header = "dev/net/etherlink.hh"
50    int0 = SlavePort("interface 0")
51    int1 = SlavePort("interface 1")
52    delay = Param.Latency('0us', "packet transmit delay")
53    delay_var = Param.Latency('0ns', "packet transmit delay variability")
54    speed = Param.NetworkBandwidth('1Gbps', "link speed")
55    dump = Param.EtherDump(NULL, "dump object")
56
57class DistEtherLink(SimObject):
58    type = 'DistEtherLink'
59    cxx_header = "dev/net/dist_etherlink.hh"
60    int0 = SlavePort("interface 0")
61    delay = Param.Latency('0us', "packet transmit delay")
62    delay_var = Param.Latency('0ns', "packet transmit delay variability")
63    speed = Param.NetworkBandwidth('1Gbps', "link speed")
64    dump = Param.EtherDump(NULL, "dump object")
65    dist_rank = Param.UInt32('0', "Rank of this gem5 process (dist run)")
66    dist_size = Param.UInt32('1', "Number of gem5 processes (dist run)")
67    sync_start = Param.Latency('5200000000000t', "first dist sync barrier")
68    sync_repeat = Param.Latency('10us', "dist sync barrier repeat")
69    server_name = Param.String('localhost', "Message server name")
70    server_port = Param.UInt32('2200', "Message server port")
71    is_switch = Param.Bool(False, "true if this a link in etherswitch")
72    dist_sync_on_pseudo_op = Param.Bool(False, "Start sync with pseudo_op")
73    num_nodes = Param.UInt32('2', "Number of simulate nodes")
74
75class EtherBus(SimObject):
76    type = 'EtherBus'
77    cxx_header = "dev/net/etherbus.hh"
78    loopback = Param.Bool(True, "send packet back to the sending interface")
79    dump = Param.EtherDump(NULL, "dump object")
80    speed = Param.NetworkBandwidth('100Mbps', "bus speed in bits per second")
81
82class EtherSwitch(SimObject):
83    type = 'EtherSwitch'
84    cxx_header = "dev/net/etherswitch.hh"
85    dump = Param.EtherDump(NULL, "dump object")
86    fabric_speed = Param.NetworkBandwidth('10Gbps', "switch fabric speed in bits "
87                                          "per second")
88    interface = VectorMasterPort("Ethernet Interface")
89    output_buffer_size = Param.MemorySize('1MB', "size of output port buffers")
90    delay = Param.Latency('0us', "packet transmit delay")
91    delay_var = Param.Latency('0ns', "packet transmit delay variability")
92    time_to_live = Param.Latency('10ms', "time to live of MAC address maping")
93
94class EtherTapBase(SimObject):
95    type = 'EtherTapBase'
96    abstract = True
97    cxx_header = "dev/net/ethertap.hh"
98    bufsz = Param.Int(10000, "tap buffer size")
99    dump = Param.EtherDump(NULL, "dump object")
100    tap = SlavePort("Ethernet interface to connect to gem5's network")
101
102if buildEnv['USE_TUNTAP']:
103    class EtherTap(EtherTapBase):
104        type = 'EtherTap'
105        cxx_header = "dev/net/ethertap.hh"
106        tun_clone_device = Param.String('/dev/net/tun',
107                                        "Path to the tun clone device node")
108        tap_device_name = Param.String('gem5-tap', "Tap device name")
109
110class EtherTapStub(EtherTapBase):
111    type = 'EtherTapStub'
112    cxx_header = "dev/net/ethertap.hh"
113    port = Param.UInt16(3500, "Port helper should send packets to")
114
115class EtherDump(SimObject):
116    type = 'EtherDump'
117    cxx_header = "dev/net/etherdump.hh"
118    file = Param.String("dump file")
119    maxlen = Param.Int(96, "max portion of packet data to dump")
120
121class EtherDevice(PciDevice):
122    type = 'EtherDevice'
123    abstract = True
124    cxx_header = "dev/net/etherdevice.hh"
125    interface = MasterPort("Ethernet Interface")
126
127class IGbE(EtherDevice):
128    # Base class for two IGbE adapters listed above
129    type = 'IGbE'
130    cxx_header = "dev/net/i8254xGBe.hh"
131    hardware_address = Param.EthernetAddr(NextEthernetAddr,
132        "Ethernet Hardware Address")
133    rx_fifo_size = Param.MemorySize('384kB', "Size of the rx FIFO")
134    tx_fifo_size = Param.MemorySize('384kB', "Size of the tx FIFO")
135    rx_desc_cache_size = Param.Int(64,
136        "Number of enteries in the rx descriptor cache")
137    tx_desc_cache_size = Param.Int(64,
138        "Number of enteries in the rx descriptor cache")
139    VendorID = 0x8086
140    SubsystemID = 0x1008
141    SubsystemVendorID = 0x8086
142    Status = 0x0000
143    SubClassCode = 0x00
144    ClassCode = 0x02
145    ProgIF = 0x00
146    BAR0 = 0x00000000
147    BAR1 = 0x00000000
148    BAR2 = 0x00000000
149    BAR3 = 0x00000000
150    BAR4 = 0x00000000
151    BAR5 = 0x00000000
152    MaximumLatency = 0x00
153    MinimumGrant = 0xff
154    InterruptLine = 0x1e
155    InterruptPin = 0x01
156    BAR0Size = '128kB'
157    wb_delay = Param.Latency('10ns', "delay before desc writeback occurs")
158    fetch_delay = Param.Latency('10ns', "delay before desc fetch occurs")
159    fetch_comp_delay = Param.Latency('10ns', "delay after desc fetch occurs")
160    wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs")
161    tx_read_delay = Param.Latency('0ns', "delay after tx dma read")
162    rx_write_delay = Param.Latency('0ns', "delay after rx dma read")
163    phy_pid = Param.UInt16("Phy PID that corresponds to device ID")
164    phy_epid = Param.UInt16("Phy EPID that corresponds to device ID")
165
166class IGbE_e1000(IGbE):
167    # Older Intel 8254x based gigabit ethernet adapter
168    # Uses Intel e1000 driver
169    DeviceID = 0x1075
170    phy_pid = 0x02A8
171    phy_epid = 0x0380
172
173class IGbE_igb(IGbE):
174    # Newer Intel 8257x based gigabit ethernet adapter
175    # Uses Intel igb driver and in theory supports packet splitting and LRO
176    DeviceID = 0x10C9
177    phy_pid = 0x0141
178    phy_epid = 0x0CC0
179
180class EtherDevBase(EtherDevice):
181    type = 'EtherDevBase'
182    abstract = True
183    cxx_header = "dev/net/etherdevice.hh"
184
185    hardware_address = Param.EthernetAddr(NextEthernetAddr,
186        "Ethernet Hardware Address")
187
188    dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
189    dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
190    dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
191    dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
192
193    rx_delay = Param.Latency('1us', "Receive Delay")
194    tx_delay = Param.Latency('1us', "Transmit Delay")
195    rx_fifo_size = Param.MemorySize('512kB', "max size of rx fifo")
196    tx_fifo_size = Param.MemorySize('512kB', "max size of tx fifo")
197
198    rx_filter = Param.Bool(True, "Enable Receive Filter")
199    intr_delay = Param.Latency('10us', "Interrupt propagation delay")
200    rx_thread = Param.Bool(False, "dedicated kernel thread for transmit")
201    tx_thread = Param.Bool(False, "dedicated kernel threads for receive")
202    rss = Param.Bool(False, "Receive Side Scaling")
203
204class NSGigE(EtherDevBase):
205    type = 'NSGigE'
206    cxx_header = "dev/net/ns_gige.hh"
207
208    dma_data_free = Param.Bool(False, "DMA of Data is free")
209    dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
210    dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
211
212    VendorID = 0x100B
213    DeviceID = 0x0022
214    Status = 0x0290
215    SubClassCode = 0x00
216    ClassCode = 0x02
217    ProgIF = 0x00
218    BAR0 = 0x00000001
219    BAR1 = 0x00000000
220    BAR2 = 0x00000000
221    BAR3 = 0x00000000
222    BAR4 = 0x00000000
223    BAR5 = 0x00000000
224    MaximumLatency = 0x34
225    MinimumGrant = 0xb0
226    InterruptLine = 0x1e
227    InterruptPin = 0x01
228    BAR0Size = '256B'
229    BAR1Size = '4kB'
230
231
232
233class Sinic(EtherDevBase):
234    type = 'Sinic'
235    cxx_class = 'Sinic::Device'
236    cxx_header = "dev/net/sinic.hh"
237
238    rx_max_copy = Param.MemorySize('1514B', "rx max copy")
239    tx_max_copy = Param.MemorySize('16kB', "tx max copy")
240    rx_max_intr = Param.UInt32(10, "max rx packets per interrupt")
241    rx_fifo_threshold = Param.MemorySize('384kB', "rx fifo high threshold")
242    rx_fifo_low_mark = Param.MemorySize('128kB', "rx fifo low threshold")
243    tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold")
244    tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold")
245    virtual_count = Param.UInt32(1, "Virtualized SINIC")
246    zero_copy_size = Param.UInt32(64, "Bytes to copy if below threshold")
247    zero_copy_threshold = Param.UInt32(256,
248        "Only zero copy above this threshold")
249    zero_copy = Param.Bool(False, "Zero copy receive")
250    delay_copy = Param.Bool(False, "Delayed copy transmit")
251    virtual_addr = Param.Bool(False, "Virtual addressing")
252
253    VendorID = 0x1291
254    DeviceID = 0x1293
255    Status = 0x0290
256    SubClassCode = 0x00
257    ClassCode = 0x02
258    ProgIF = 0x00
259    BAR0 = 0x00000000
260    BAR1 = 0x00000000
261    BAR2 = 0x00000000
262    BAR3 = 0x00000000
263    BAR4 = 0x00000000
264    BAR5 = 0x00000000
265    MaximumLatency = 0x34
266    MinimumGrant = 0xb0
267    InterruptLine = 0x1e
268    InterruptPin = 0x01
269    BAR0Size = '64kB'
270
271
272