io_device.cc revision 2565
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include "dev/io_device.hh"
30#include "sim/builder.hh"
31
32
33PioPort::PioPort(PioDevice *dev, Platform *p)
34        : device(dev), platform(p)
35{ }
36
37
38Tick
39PioPort::recvAtomic(Packet &pkt)
40{
41    return device->recvAtomic(pkt);
42}
43
44void
45PioPort::recvFunctional(Packet &pkt)
46{
47    device->recvAtomic(pkt);
48}
49
50void
51PioPort::getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop)
52{
53    snoop.clear();
54    device->addressRanges(resp);
55}
56
57
58Packet *
59PioPort::recvRetry()
60{
61    Packet* pkt = transmitList.front();
62    transmitList.pop_front();
63    return pkt;
64}
65
66
67void
68PioPort::SendEvent::process()
69{
70    if (port->Port::sendTiming(packet) == Success)
71        return;
72
73    port->transmitList.push_back(&packet);
74}
75
76
77bool
78PioPort::recvTiming(Packet &pkt)
79{
80    device->recvAtomic(pkt);
81    sendTiming(pkt, pkt.time-pkt.req->getTime());
82    return Success;
83}
84
85PioDevice::~PioDevice()
86{
87    if (pioPort)
88        delete pioPort;
89}
90
91void
92PioDevice::init()
93{
94    if (!pioPort)
95        panic("Pio port not connected to anything!");
96    pioPort->sendStatusChange(Port::RangeChange);
97}
98
99void
100BasicPioDevice::addressRanges(AddrRangeList &range_list)
101{
102    assert(pioSize != 0);
103    range_list.clear();
104    range_list.push_back(RangeSize(pioAddr, pioSize));
105}
106
107
108DmaPort::DmaPort(DmaDevice *dev, Platform *p)
109        : device(dev), platform(p), pendingCount(0)
110{ }
111
112bool
113DmaPort::recvTiming(Packet &pkt)
114{
115    if (pkt.senderState) {
116        DmaReqState *state;
117        state = (DmaReqState*)pkt.senderState;
118        state->completionEvent->schedule(pkt.time - pkt.req->getTime());
119    }
120    return Success;
121}
122
123DmaDevice::DmaDevice(Params *p)
124    : PioDevice(p), dmaPort(NULL)
125{ }
126
127void
128DmaPort::SendEvent::process()
129{
130    if (port->Port::sendTiming(packet) == Success)
131        return;
132
133    port->transmitList.push_back(&packet);
134}
135
136Packet *
137DmaPort::recvRetry()
138{
139    Packet* pkt = transmitList.front();
140    transmitList.pop_front();
141    return pkt;
142}
143void
144DmaPort::dmaAction(Command cmd, Addr addr, int size, Event *event,
145        uint8_t *data)
146{
147
148    assert(event);
149
150    int prevSize = 0;
151    Packet basePkt;
152    Request baseReq(false);
153
154    basePkt.flags = 0;
155    basePkt.coherence = NULL;
156    basePkt.senderState = NULL;
157    basePkt.src = 0;
158    basePkt.dest = 0;
159    basePkt.cmd = cmd;
160    basePkt.result = Unknown;
161    basePkt.req = NULL;
162//    baseReq.nicReq = true;
163    baseReq.setTime(curTick);
164
165    for (ChunkGenerator gen(addr, size, peerBlockSize());
166         !gen.done(); gen.next()) {
167            Packet *pkt = new Packet(basePkt);
168            Request *req = new Request(baseReq);
169            pkt->addr = gen.addr();
170            pkt->size = gen.size();
171            pkt->req = req;
172            pkt->req->setPaddr(pkt->addr);
173            pkt->req->setSize(pkt->size);
174            // Increment the data pointer on a write
175            pkt->data = data ? data + prevSize : NULL ;
176            prevSize += pkt->size;
177            // Set the last bit of the dma as the final packet for this dma
178            // and set it's completion event.
179            if (prevSize == size) {
180                DmaReqState *state = new DmaReqState(event, true);
181
182                pkt->senderState = (void*)state;
183            }
184            assert(pendingCount >= 0);
185            pendingCount++;
186            sendDma(*pkt);
187    }
188}
189
190
191void
192DmaPort::sendDma(Packet &pkt)
193{
194   // some kind of selction between access methods
195   // more work is going to have to be done to make
196   // switching actually work
197  /* MemState state = device->platform->system->memState;
198
199   if (state == Timing) {
200       if (sendTiming(pkt) == Failure)
201           transmitList.push_back(&packet);
202   } else if (state == Atomic) {*/
203       sendAtomic(pkt);
204       if (pkt.senderState) {
205           DmaReqState *state = (DmaReqState*)pkt.senderState;
206           state->completionEvent->schedule(curTick + (pkt.time - pkt.req->getTime()) +1);
207       }
208        pendingCount--;
209        assert(pendingCount >= 0);
210/*   } else if (state == Functional) {
211       sendFunctional(pkt);
212       // Is this correct???
213       completionEvent->schedule(pkt.req->responseTime - pkt.req->requestTime);
214       completionEvent == NULL;
215   } else
216       panic("Unknown memory command state.");
217  */
218}
219
220DmaDevice::~DmaDevice()
221{
222    if (dmaPort)
223        delete dmaPort;
224}
225
226
227