intel_8254_timer.hh revision 5635:b65e232e7755
12SN/A/* 21762SN/A * Copyright (c) 2004, 2005 32SN/A * The Regents of The University of Michigan 42SN/A * All Rights Reserved 52SN/A * 62SN/A * This code is part of the M5 simulator. 72SN/A * 82SN/A * Permission is granted to use, copy, create derivative works and 92SN/A * redistribute this software and such derivative works for any 102SN/A * purpose, so long as the copyright notice above, this grant of 112SN/A * permission, and the disclaimer below appear in all copies made; and 122SN/A * so long as the name of The University of Michigan is not used in 132SN/A * any advertising or publicity pertaining to the use or distribution 142SN/A * of this software without specific, written prior authorization. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE 172SN/A * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND 182SN/A * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER 192SN/A * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED 202SN/A * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 212SN/A * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE 222SN/A * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT, 232SN/A * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM 242SN/A * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN 252SN/A * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH 262SN/A * DAMAGES. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ali G. Saidi 292665Ssaidi@eecs.umich.edu * Andrew L. Schultz 302SN/A * Miguel J. Serrano 312SN/A */ 322SN/A 332SN/A#ifndef __DEV_8254_HH__ 342SN/A#define __DEV_8254_HH__ 352SN/A 361354SN/A#include <string> 371354SN/A#include <iostream> 382SN/A 392SN/A#include "base/bitunion.hh" 405501Snate@binkert.org#include "sim/eventq.hh" 415546Snate@binkert.org#include "sim/host.hh" 422SN/A#include "sim/serialize.hh" 432SN/A 442SN/A/** Programmable Interval Timer (Intel 8254) */ 452SN/Aclass Intel8254Timer : public EventManager 4656SN/A{ 472361SN/A protected: 481354SN/A BitUnion8(CtrlReg) 4956SN/A Bitfield<7, 6> sel; 505501Snate@binkert.org Bitfield<5, 4> rw; 512SN/A Bitfield<3, 1> mode; 525543Ssaidi@eecs.umich.edu Bitfield<0> bcd; 532SN/A EndBitUnion(CtrlReg) 541354SN/A 551354SN/A enum SelectVal { 562SN/A SelectCounter0, 572SN/A SelectCounter1, 582SN/A SelectCounter2, 592SN/A ReadBackCommand 605501Snate@binkert.org }; 615501Snate@binkert.org 622SN/A enum ReadWriteVal { 63395SN/A LatchCommand, 642SN/A LsbOnly, 652SN/A MsbOnly, 662SN/A TwoPhase 672SN/A }; 685502Snate@binkert.org 695502Snate@binkert.org enum ModeVal { 705502Snate@binkert.org InitTc, 715503Snate@binkert.org OneShot, 725503Snate@binkert.org RateGen, 735502Snate@binkert.org SquareWave, 745502Snate@binkert.org SoftwareStrobe, 755502Snate@binkert.org HardwareStrobe 765502Snate@binkert.org }; 775502Snate@binkert.org 785502Snate@binkert.org /** Counter element for PIT */ 795502Snate@binkert.org class Counter 805602Snate@binkert.org { 815602Snate@binkert.org /** Event for counter interrupt */ 825501Snate@binkert.org class CounterEvent : public Event 835543Ssaidi@eecs.umich.edu { 845543Ssaidi@eecs.umich.edu private: 855501Snate@binkert.org /** Pointer back to Counter */ 864016Sstever@eecs.umich.edu Counter* counter; 874016Sstever@eecs.umich.edu Tick interval; 884016Sstever@eecs.umich.edu 894016Sstever@eecs.umich.edu public: 904016Sstever@eecs.umich.edu CounterEvent(Counter*); 914016Sstever@eecs.umich.edu 924016Sstever@eecs.umich.edu /** Event process */ 934016Sstever@eecs.umich.edu virtual void process(); 944016Sstever@eecs.umich.edu 955501Snate@binkert.org /** Event description */ 965605Snate@binkert.org virtual const char *description() const; 975605Snate@binkert.org 985605Snate@binkert.org friend class Counter; 995605Snate@binkert.org 1005501Snate@binkert.org void setTo(int clocks); 1014016Sstever@eecs.umich.edu }; 1025577SSteve.Reinhardt@amd.com 1035501Snate@binkert.org private: 1045501Snate@binkert.org std::string _name; 1055501Snate@binkert.org const std::string &name() const { return _name; } 1065502Snate@binkert.org 1075502Snate@binkert.org CounterEvent event; 1085605Snate@binkert.org 1095502Snate@binkert.org /** Current count value */ 1105502Snate@binkert.org uint16_t count; 1115605Snate@binkert.org 1125605Snate@binkert.org /** Latched count */ 1135605Snate@binkert.org uint16_t latched_count; 1145577SSteve.Reinhardt@amd.com 1155502Snate@binkert.org /** Interrupt period */ 1165502Snate@binkert.org uint16_t period; 1175502Snate@binkert.org 1185502Snate@binkert.org /** Current mode of operation */ 1192SN/A uint8_t mode; 1202SN/A 1212SN/A /** Output goes high when the counter reaches zero */ 1222SN/A bool output_high; 1232SN/A 124237SN/A /** State of the count latch */ 1252667Sstever@eecs.umich.edu bool latch_on; 1265605Snate@binkert.org 1275605Snate@binkert.org /** Set of values for read_byte and write_byte */ 1282SN/A enum {LSB, MSB}; 1292SN/A 1302SN/A /** Determine which byte of a 16-bit count value to read/write */ 1312SN/A uint8_t read_byte, write_byte; 1322SN/A 1332SN/A /** Pointer to container */ 1342SN/A Intel8254Timer *parent; 1355501Snate@binkert.org 1365543Ssaidi@eecs.umich.edu public: 1372SN/A Counter(Intel8254Timer *p, const std::string &name); 1382SN/A 139396SN/A /** Latch the current count (if one is not already latched) */ 140396SN/A void latchCount(); 141396SN/A 142396SN/A /** Set the read/write mode */ 143396SN/A void setRW(int rw_val); 1445501Snate@binkert.org 1455543Ssaidi@eecs.umich.edu /** Set operational mode */ 1465501Snate@binkert.org void setMode(int mode_val); 1473329Sstever@eecs.umich.edu 1483329Sstever@eecs.umich.edu /** Set count encoding */ 1493329Sstever@eecs.umich.edu void setBCD(int bcd_val); 1503329Sstever@eecs.umich.edu 1513329Sstever@eecs.umich.edu /** Read a count byte */ 1523329Sstever@eecs.umich.edu uint8_t read(); 1533329Sstever@eecs.umich.edu 1543329Sstever@eecs.umich.edu /** Write a count byte */ 1555543Ssaidi@eecs.umich.edu void write(const uint8_t data); 156396SN/A 1573329Sstever@eecs.umich.edu /** Is the output high? */ 1583329Sstever@eecs.umich.edu bool outputHigh(); 1593329Sstever@eecs.umich.edu 1603329Sstever@eecs.umich.edu /** 1615543Ssaidi@eecs.umich.edu * Serialize this object to the given output stream. 1623329Sstever@eecs.umich.edu * @param base The base name of the counter object. 163396SN/A * @param os The stream to serialize to. 164396SN/A */ 165396SN/A void serialize(const std::string &base, std::ostream &os); 1665543Ssaidi@eecs.umich.edu 167396SN/A /** 168396SN/A * Reconstruct the state of this object from a checkpoint. 1695543Ssaidi@eecs.umich.edu * @param base The base name of the counter object. 170396SN/A * @param cp The checkpoint use. 171396SN/A * @param section The section name of this object 172396SN/A */ 173396SN/A void unserialize(const std::string &base, Checkpoint *cp, 1745543Ssaidi@eecs.umich.edu const std::string §ion); 175396SN/A }; 176396SN/A 177396SN/A protected: 1785543Ssaidi@eecs.umich.edu std::string _name; 179396SN/A const std::string &name() const { return _name; } 180396SN/A 181396SN/A /** PIT has three seperate counters */ 1825543Ssaidi@eecs.umich.edu Counter *counter[3]; 183396SN/A 1844075Sbinkertn@umich.edu public: 1854075Sbinkertn@umich.edu 1864075Sbinkertn@umich.edu Intel8254Timer(EventManager *em, const std::string &name, 187396SN/A Counter *counter0, Counter *counter1, Counter *counter2); 188396SN/A 1895543Ssaidi@eecs.umich.edu Intel8254Timer(EventManager *em, const std::string &name); 1905501Snate@binkert.org 1915501Snate@binkert.org /** Write control word */ 1925543Ssaidi@eecs.umich.edu void writeControl(const CtrlReg data); 193396SN/A 194396SN/A uint8_t 1952SN/A readCounter(unsigned int num) 1962SN/A { 1972SN/A assert(num < 3); 1982SN/A return counter[num]->read(); 1995605Snate@binkert.org } 2005605Snate@binkert.org 201224SN/A void 2024016Sstever@eecs.umich.edu writeCounter(unsigned int num, const uint8_t data) 2035501Snate@binkert.org { 2045605Snate@binkert.org assert(num < 3); 2055501Snate@binkert.org counter[num]->write(data); 2065501Snate@binkert.org } 2075501Snate@binkert.org 2085501Snate@binkert.org bool 2094016Sstever@eecs.umich.edu outputHigh(unsigned int num) 210224SN/A { 211224SN/A assert(num < 3); 2125501Snate@binkert.org return counter[num]->outputHigh(); 2135501Snate@binkert.org } 2145501Snate@binkert.org 2155501Snate@binkert.org /** 2162SN/A * Serialize this object to the given output stream. 2175501Snate@binkert.org * @param base The base name of the counter object. 2185501Snate@binkert.org * @param os The stream to serialize to. 2195501Snate@binkert.org */ 2204016Sstever@eecs.umich.edu void serialize(const std::string &base, std::ostream &os); 2215501Snate@binkert.org 2224016Sstever@eecs.umich.edu /** 223270SN/A * Reconstruct the state of this object from a checkpoint. 2244016Sstever@eecs.umich.edu * @param base The base name of the counter object. 225265SN/A * @param cp The checkpoint use. 226265SN/A * @param section The section name of this object 2275501Snate@binkert.org */ 2285501Snate@binkert.org void unserialize(const std::string &base, Checkpoint *cp, 2295501Snate@binkert.org const std::string §ion); 2305501Snate@binkert.org}; 2315501Snate@binkert.org 2325501Snate@binkert.org#endif // __DEV_8254_HH__ 2335501Snate@binkert.org