intel_8254_timer.hh revision 5606:6da7a58b0bc8
12SN/A/*
21762SN/A * Copyright (c) 2004, 2005
32SN/A * The Regents of The University of Michigan
42SN/A * All Rights Reserved
52SN/A *
62SN/A * This code is part of the M5 simulator.
72SN/A *
82SN/A * Permission is granted to use, copy, create derivative works and
92SN/A * redistribute this software and such derivative works for any
102SN/A * purpose, so long as the copyright notice above, this grant of
112SN/A * permission, and the disclaimer below appear in all copies made; and
122SN/A * so long as the name of The University of Michigan is not used in
132SN/A * any advertising or publicity pertaining to the use or distribution
142SN/A * of this software without specific, written prior authorization.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
172SN/A * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
182SN/A * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
192SN/A * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
202SN/A * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
212SN/A * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
222SN/A * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
232SN/A * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
242SN/A * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
252SN/A * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
262SN/A * DAMAGES.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Ali G. Saidi
292665Ssaidi@eecs.umich.edu *          Andrew L. Schultz
302SN/A *          Miguel J. Serrano
312SN/A */
322SN/A
332SN/A#ifndef __DEV_8254_HH__
342SN/A#define __DEV_8254_HH__
352SN/A
361354SN/A#include <string>
371354SN/A#include <iostream>
382SN/A
392SN/A#include "base/bitunion.hh"
405501Snate@binkert.org#include "sim/eventq.hh"
412SN/A#include "sim/host.hh"
422SN/A#include "sim/serialize.hh"
432SN/A
442SN/A/** Programmable Interval Timer (Intel 8254) */
4556SN/Aclass Intel8254Timer : public EventManager
462361SN/A{
471354SN/A    BitUnion8(CtrlReg)
4856SN/A        Bitfield<7, 6> sel;
495501Snate@binkert.org        Bitfield<5, 4> rw;
502SN/A        Bitfield<3, 1> mode;
515543Ssaidi@eecs.umich.edu        Bitfield<0> bcd;
522SN/A    EndBitUnion(CtrlReg)
531354SN/A
541354SN/A    enum SelectVal {
551354SN/A        SelectCounter0,
561354SN/A        SelectCounter1,
571354SN/A        SelectCounter2,
581354SN/A        ReadBackCommand
591354SN/A    };
601354SN/A
611354SN/A    enum ReadWriteVal {
621354SN/A        LatchCommand,
631354SN/A        LsbOnly,
641354SN/A        MsbOnly,
652SN/A        TwoPhase
662SN/A    };
672SN/A
682SN/A    enum ModeVal {
695501Snate@binkert.org        InitTc,
705501Snate@binkert.org        OneShot,
712SN/A        RateGen,
72395SN/A        SquareWave,
732SN/A        SoftwareStrobe,
742SN/A        HardwareStrobe
752SN/A    };
762SN/A
775502Snate@binkert.org    /** Counter element for PIT */
785502Snate@binkert.org    class Counter
795502Snate@binkert.org    {
805503Snate@binkert.org        /** Event for counter interrupt */
815503Snate@binkert.org        class CounterEvent : public Event
825502Snate@binkert.org        {
835502Snate@binkert.org          private:
845502Snate@binkert.org            /** Pointer back to Counter */
855502Snate@binkert.org            Counter* counter;
865502Snate@binkert.org            Tick interval;
875502Snate@binkert.org
885502Snate@binkert.org          public:
895503Snate@binkert.org            CounterEvent(Counter*);
905502Snate@binkert.org
915501Snate@binkert.org            /** Event process */
925501Snate@binkert.org            virtual void process();
935501Snate@binkert.org
945501Snate@binkert.org            /** Event description */
955501Snate@binkert.org            virtual const char *description() const;
965543Ssaidi@eecs.umich.edu
975543Ssaidi@eecs.umich.edu            friend class Counter;
985501Snate@binkert.org
994016Sstever@eecs.umich.edu            void setTo(int clocks);
1004016Sstever@eecs.umich.edu        };
1014016Sstever@eecs.umich.edu
1024016Sstever@eecs.umich.edu      private:
1034016Sstever@eecs.umich.edu        std::string _name;
1044016Sstever@eecs.umich.edu        const std::string &name() const { return _name; }
1054016Sstever@eecs.umich.edu
1064016Sstever@eecs.umich.edu        CounterEvent event;
1074016Sstever@eecs.umich.edu
1085501Snate@binkert.org        /** Current count value */
1095501Snate@binkert.org        uint16_t count;
1104016Sstever@eecs.umich.edu
1115501Snate@binkert.org        /** Latched count */
1125501Snate@binkert.org        uint16_t latched_count;
1135501Snate@binkert.org
1145501Snate@binkert.org        /** Interrupt period */
1155502Snate@binkert.org        uint16_t period;
1165502Snate@binkert.org
1175502Snate@binkert.org        /** Current mode of operation */
1185502Snate@binkert.org        uint8_t mode;
1195502Snate@binkert.org
1205502Snate@binkert.org        /** Output goes high when the counter reaches zero */
1215502Snate@binkert.org        bool output_high;
1225502Snate@binkert.org
1235502Snate@binkert.org        /** State of the count latch */
1245502Snate@binkert.org        bool latch_on;
1255502Snate@binkert.org
1262SN/A        /** Set of values for read_byte and write_byte */
1272SN/A        enum {LSB, MSB};
1282SN/A
1292SN/A        /** Determine which byte of a 16-bit count value to read/write */
1302SN/A        uint8_t read_byte, write_byte;
131237SN/A
1322667Sstever@eecs.umich.edu        /** Pointer to container */
1332667Sstever@eecs.umich.edu        Intel8254Timer *parent;
1342SN/A
1352SN/A      public:
1362SN/A        Counter(Intel8254Timer *p, const std::string &name);
1372SN/A
1382SN/A        /** Latch the current count (if one is not already latched) */
1392SN/A        void latchCount();
1402SN/A
1415501Snate@binkert.org        /** Set the read/write mode */
1422SN/A        void setRW(int rw_val);
1435501Snate@binkert.org
1445543Ssaidi@eecs.umich.edu        /** Set operational mode */
1452SN/A        void setMode(int mode_val);
1462SN/A
147396SN/A        /** Set count encoding */
148396SN/A        void setBCD(int bcd_val);
149396SN/A
150396SN/A        /** Read a count byte */
151396SN/A        uint8_t read();
1525501Snate@binkert.org
1535543Ssaidi@eecs.umich.edu        /** Write a count byte */
1545501Snate@binkert.org        void write(const uint8_t data);
1553329Sstever@eecs.umich.edu
1563329Sstever@eecs.umich.edu        /** Is the output high? */
1573329Sstever@eecs.umich.edu        bool outputHigh();
1583329Sstever@eecs.umich.edu
1593329Sstever@eecs.umich.edu        /**
1603329Sstever@eecs.umich.edu         * Serialize this object to the given output stream.
1613329Sstever@eecs.umich.edu         * @param base The base name of the counter object.
1623329Sstever@eecs.umich.edu         * @param os   The stream to serialize to.
1635543Ssaidi@eecs.umich.edu         */
164396SN/A        void serialize(const std::string &base, std::ostream &os);
1653329Sstever@eecs.umich.edu
1663329Sstever@eecs.umich.edu        /**
1673329Sstever@eecs.umich.edu         * Reconstruct the state of this object from a checkpoint.
1683329Sstever@eecs.umich.edu         * @param base The base name of the counter object.
1695543Ssaidi@eecs.umich.edu         * @param cp The checkpoint use.
1703329Sstever@eecs.umich.edu         * @param section The section name of this object
171396SN/A         */
172396SN/A        void unserialize(const std::string &base, Checkpoint *cp,
173396SN/A                         const std::string &section);
1745543Ssaidi@eecs.umich.edu    };
175396SN/A
176396SN/A  private:
1775543Ssaidi@eecs.umich.edu    std::string _name;
178396SN/A    const std::string &name() const { return _name; }
179396SN/A
180396SN/A    /** PIT has three seperate counters */
181396SN/A    Counter *counter[3];
1825543Ssaidi@eecs.umich.edu
183396SN/A  public:
184396SN/A    /** Public way to access individual counters (avoid array accesses) */
185396SN/A    Counter counter0;
1865543Ssaidi@eecs.umich.edu    Counter counter1;
187396SN/A    Counter counter2;
188396SN/A
189396SN/A    Intel8254Timer(EventManager *em, const std::string &name);
1905543Ssaidi@eecs.umich.edu
191396SN/A    /** Write control word */
1924075Sbinkertn@umich.edu    void writeControl(const CtrlReg data);
1934075Sbinkertn@umich.edu
1944075Sbinkertn@umich.edu    /**
195396SN/A     * Serialize this object to the given output stream.
196396SN/A     * @param base The base name of the counter object.
1975543Ssaidi@eecs.umich.edu     * @param os The stream to serialize to.
1985501Snate@binkert.org     */
1995501Snate@binkert.org    void serialize(const std::string &base, std::ostream &os);
2005543Ssaidi@eecs.umich.edu
201396SN/A    /**
202396SN/A     * Reconstruct the state of this object from a checkpoint.
2032SN/A     * @param base The base name of the counter object.
2042SN/A     * @param cp The checkpoint use.
2052SN/A     * @param section The section name of this object
2062SN/A     */
207396SN/A    void unserialize(const std::string &base, Checkpoint *cp,
2085502Snate@binkert.org                     const std::string &section);
209224SN/A};
2104016Sstever@eecs.umich.edu
2115501Snate@binkert.org#endif // __DEV_8254_HH__
2125501Snate@binkert.org