intel_8254_timer.cc revision 8232
15443Sgblack@eecs.umich.edu/*
25443Sgblack@eecs.umich.edu * Copyright (c) 2004, 2005
35443Sgblack@eecs.umich.edu * The Regents of The University of Michigan
45443Sgblack@eecs.umich.edu * All Rights Reserved
55443Sgblack@eecs.umich.edu *
65443Sgblack@eecs.umich.edu * This code is part of the M5 simulator.
75443Sgblack@eecs.umich.edu *
85443Sgblack@eecs.umich.edu * Permission is granted to use, copy, create derivative works and
95443Sgblack@eecs.umich.edu * redistribute this software and such derivative works for any
105443Sgblack@eecs.umich.edu * purpose, so long as the copyright notice above, this grant of
115443Sgblack@eecs.umich.edu * permission, and the disclaimer below appear in all copies made; and
125443Sgblack@eecs.umich.edu * so long as the name of The University of Michigan is not used in
135443Sgblack@eecs.umich.edu * any advertising or publicity pertaining to the use or distribution
145443Sgblack@eecs.umich.edu * of this software without specific, written prior authorization.
155443Sgblack@eecs.umich.edu *
165443Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
175443Sgblack@eecs.umich.edu * UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND
185443Sgblack@eecs.umich.edu * WITHOUT WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER
195443Sgblack@eecs.umich.edu * EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED
205443Sgblack@eecs.umich.edu * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
215443Sgblack@eecs.umich.edu * PURPOSE. THE REGENTS OF THE UNIVERSITY OF MICHIGAN SHALL NOT BE
225443Sgblack@eecs.umich.edu * LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, SPECIAL, INDIRECT,
235443Sgblack@eecs.umich.edu * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WITH RESPECT TO ANY CLAIM
245443Sgblack@eecs.umich.edu * ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE, EVEN
255443Sgblack@eecs.umich.edu * IF IT HAS BEEN OR IS HEREAFTER ADVISED OF THE POSSIBILITY OF SUCH
265443Sgblack@eecs.umich.edu * DAMAGES.
275443Sgblack@eecs.umich.edu *
285443Sgblack@eecs.umich.edu * Authors: Ali G. Saidi
295443Sgblack@eecs.umich.edu *          Andrew L. Schultz
305443Sgblack@eecs.umich.edu *          Miguel J. Serrano
315443Sgblack@eecs.umich.edu */
325443Sgblack@eecs.umich.edu
335443Sgblack@eecs.umich.edu#include "base/misc.hh"
348232Snate@binkert.org#include "debug/Intel8254Timer.hh"
355443Sgblack@eecs.umich.edu#include "dev/intel_8254_timer.hh"
365443Sgblack@eecs.umich.edu
375443Sgblack@eecs.umich.eduusing namespace std;
385443Sgblack@eecs.umich.edu
395635Sgblack@eecs.umich.eduIntel8254Timer::Intel8254Timer(EventManager *em, const string &name,
405635Sgblack@eecs.umich.edu    Counter *counter0, Counter *counter1, Counter *counter2) :
415635Sgblack@eecs.umich.edu    EventManager(em), _name(name)
425443Sgblack@eecs.umich.edu{
435635Sgblack@eecs.umich.edu    counter[0] = counter0;
445635Sgblack@eecs.umich.edu    counter[1] = counter1;
455635Sgblack@eecs.umich.edu    counter[2] = counter2;
465635Sgblack@eecs.umich.edu}
475635Sgblack@eecs.umich.edu
485635Sgblack@eecs.umich.eduIntel8254Timer::Intel8254Timer(EventManager *em, const string &name) :
495635Sgblack@eecs.umich.edu    EventManager(em), _name(name)
505635Sgblack@eecs.umich.edu{
515642Sgblack@eecs.umich.edu    counter[0] = new Counter(this, name + ".counter0", 0);
525642Sgblack@eecs.umich.edu    counter[1] = new Counter(this, name + ".counter1", 1);
535642Sgblack@eecs.umich.edu    counter[2] = new Counter(this, name + ".counter2", 2);
545443Sgblack@eecs.umich.edu}
555443Sgblack@eecs.umich.edu
565443Sgblack@eecs.umich.eduvoid
575443Sgblack@eecs.umich.eduIntel8254Timer::writeControl(const CtrlReg data)
585443Sgblack@eecs.umich.edu{
595443Sgblack@eecs.umich.edu    int sel = data.sel;
605443Sgblack@eecs.umich.edu
615443Sgblack@eecs.umich.edu    if (sel == ReadBackCommand)
625443Sgblack@eecs.umich.edu       panic("PITimer Read-Back Command is not implemented.\n");
635443Sgblack@eecs.umich.edu
645443Sgblack@eecs.umich.edu    if (data.rw == LatchCommand)
655443Sgblack@eecs.umich.edu        counter[sel]->latchCount();
665443Sgblack@eecs.umich.edu    else {
675443Sgblack@eecs.umich.edu        counter[sel]->setRW(data.rw);
685443Sgblack@eecs.umich.edu        counter[sel]->setMode(data.mode);
695443Sgblack@eecs.umich.edu        counter[sel]->setBCD(data.bcd);
705443Sgblack@eecs.umich.edu    }
715443Sgblack@eecs.umich.edu}
725443Sgblack@eecs.umich.edu
735443Sgblack@eecs.umich.eduvoid
745443Sgblack@eecs.umich.eduIntel8254Timer::serialize(const string &base, ostream &os)
755443Sgblack@eecs.umich.edu{
765443Sgblack@eecs.umich.edu    // serialize the counters
775635Sgblack@eecs.umich.edu    counter[0]->serialize(base + ".counter0", os);
785635Sgblack@eecs.umich.edu    counter[1]->serialize(base + ".counter1", os);
795635Sgblack@eecs.umich.edu    counter[2]->serialize(base + ".counter2", os);
805443Sgblack@eecs.umich.edu}
815443Sgblack@eecs.umich.edu
825443Sgblack@eecs.umich.eduvoid
835443Sgblack@eecs.umich.eduIntel8254Timer::unserialize(const string &base, Checkpoint *cp,
845443Sgblack@eecs.umich.edu        const string &section)
855443Sgblack@eecs.umich.edu{
865443Sgblack@eecs.umich.edu    // unserialze the counters
875635Sgblack@eecs.umich.edu    counter[0]->unserialize(base + ".counter0", cp, section);
885635Sgblack@eecs.umich.edu    counter[1]->unserialize(base + ".counter1", cp, section);
895635Sgblack@eecs.umich.edu    counter[2]->unserialize(base + ".counter2", cp, section);
905443Sgblack@eecs.umich.edu}
915443Sgblack@eecs.umich.edu
925642Sgblack@eecs.umich.eduIntel8254Timer::Counter::Counter(Intel8254Timer *p,
935642Sgblack@eecs.umich.edu        const string &name, unsigned int _num)
946067Sgblack@eecs.umich.edu    : _name(name), num(_num), event(this), initial_count(0),
955642Sgblack@eecs.umich.edu      latched_count(0), period(0), mode(0), output_high(false),
965642Sgblack@eecs.umich.edu      latch_on(false), read_byte(LSB), write_byte(LSB), parent(p)
975443Sgblack@eecs.umich.edu{
985443Sgblack@eecs.umich.edu
995443Sgblack@eecs.umich.edu}
1005443Sgblack@eecs.umich.edu
1015443Sgblack@eecs.umich.eduvoid
1025443Sgblack@eecs.umich.eduIntel8254Timer::Counter::latchCount()
1035443Sgblack@eecs.umich.edu{
1045443Sgblack@eecs.umich.edu    // behave like a real latch
1055443Sgblack@eecs.umich.edu    if(!latch_on) {
1065443Sgblack@eecs.umich.edu        latch_on = true;
1075443Sgblack@eecs.umich.edu        read_byte = LSB;
1086067Sgblack@eecs.umich.edu        latched_count = currentCount();
1095443Sgblack@eecs.umich.edu    }
1105443Sgblack@eecs.umich.edu}
1115443Sgblack@eecs.umich.edu
1126067Sgblack@eecs.umich.eduint
1136067Sgblack@eecs.umich.eduIntel8254Timer::Counter::currentCount()
1146067Sgblack@eecs.umich.edu{
1156067Sgblack@eecs.umich.edu    int clocks = event.clocksLeft();
1166067Sgblack@eecs.umich.edu    if (clocks == -1) {
1176067Sgblack@eecs.umich.edu        warn_once("Reading current count from inactive timer.\n");
1186067Sgblack@eecs.umich.edu        return 0;
1196067Sgblack@eecs.umich.edu    }
1206067Sgblack@eecs.umich.edu    if (mode == RateGen || mode == SquareWave)
1216067Sgblack@eecs.umich.edu        return clocks + 1;
1226067Sgblack@eecs.umich.edu    else
1236067Sgblack@eecs.umich.edu        return clocks;
1246067Sgblack@eecs.umich.edu}
1256067Sgblack@eecs.umich.edu
1265443Sgblack@eecs.umich.eduuint8_t
1275443Sgblack@eecs.umich.eduIntel8254Timer::Counter::read()
1285443Sgblack@eecs.umich.edu{
1295443Sgblack@eecs.umich.edu    if (latch_on) {
1305443Sgblack@eecs.umich.edu        switch (read_byte) {
1315443Sgblack@eecs.umich.edu          case LSB:
1325443Sgblack@eecs.umich.edu            read_byte = MSB;
1335443Sgblack@eecs.umich.edu            return (uint8_t)latched_count;
1345443Sgblack@eecs.umich.edu            break;
1355443Sgblack@eecs.umich.edu          case MSB:
1365443Sgblack@eecs.umich.edu            read_byte = LSB;
1375443Sgblack@eecs.umich.edu            latch_on = false;
1385443Sgblack@eecs.umich.edu            return latched_count >> 8;
1395443Sgblack@eecs.umich.edu            break;
1405443Sgblack@eecs.umich.edu          default:
1415443Sgblack@eecs.umich.edu            panic("Shouldn't be here");
1425443Sgblack@eecs.umich.edu        }
1435443Sgblack@eecs.umich.edu    } else {
1446067Sgblack@eecs.umich.edu        uint16_t count = currentCount();
1455443Sgblack@eecs.umich.edu        switch (read_byte) {
1465443Sgblack@eecs.umich.edu          case LSB:
1475443Sgblack@eecs.umich.edu            read_byte = MSB;
1485443Sgblack@eecs.umich.edu            return (uint8_t)count;
1495443Sgblack@eecs.umich.edu            break;
1505443Sgblack@eecs.umich.edu          case MSB:
1515443Sgblack@eecs.umich.edu            read_byte = LSB;
1525443Sgblack@eecs.umich.edu            return count >> 8;
1535443Sgblack@eecs.umich.edu            break;
1545443Sgblack@eecs.umich.edu          default:
1555443Sgblack@eecs.umich.edu            panic("Shouldn't be here");
1565443Sgblack@eecs.umich.edu        }
1575443Sgblack@eecs.umich.edu    }
1585443Sgblack@eecs.umich.edu}
1595443Sgblack@eecs.umich.edu
1605443Sgblack@eecs.umich.eduvoid
1615443Sgblack@eecs.umich.eduIntel8254Timer::Counter::write(const uint8_t data)
1625443Sgblack@eecs.umich.edu{
1635443Sgblack@eecs.umich.edu    switch (write_byte) {
1645443Sgblack@eecs.umich.edu      case LSB:
1656067Sgblack@eecs.umich.edu        initial_count = (initial_count & 0xFF00) | data;
1665443Sgblack@eecs.umich.edu
1675443Sgblack@eecs.umich.edu        if (event.scheduled())
1685606Snate@binkert.org            parent->deschedule(event);
1695443Sgblack@eecs.umich.edu        output_high = false;
1705443Sgblack@eecs.umich.edu        write_byte = MSB;
1715443Sgblack@eecs.umich.edu        break;
1725443Sgblack@eecs.umich.edu
1735443Sgblack@eecs.umich.edu      case MSB:
1746067Sgblack@eecs.umich.edu        initial_count = (initial_count & 0x00FF) | (data << 8);
1755444Sgblack@eecs.umich.edu        // In the RateGen or SquareWave modes, the timer wraps around and
1765444Sgblack@eecs.umich.edu        // triggers on a value of 1, not 0.
1775444Sgblack@eecs.umich.edu        if (mode == RateGen || mode == SquareWave)
1786067Sgblack@eecs.umich.edu            period = initial_count - 1;
1795444Sgblack@eecs.umich.edu        else
1806067Sgblack@eecs.umich.edu            period = initial_count;
1815443Sgblack@eecs.umich.edu
1825444Sgblack@eecs.umich.edu        if (period > 0)
1835444Sgblack@eecs.umich.edu            event.setTo(period);
1845444Sgblack@eecs.umich.edu
1855443Sgblack@eecs.umich.edu        write_byte = LSB;
1865443Sgblack@eecs.umich.edu        break;
1875443Sgblack@eecs.umich.edu    }
1885443Sgblack@eecs.umich.edu}
1895443Sgblack@eecs.umich.edu
1905443Sgblack@eecs.umich.eduvoid
1915443Sgblack@eecs.umich.eduIntel8254Timer::Counter::setRW(int rw_val)
1925443Sgblack@eecs.umich.edu{
1935443Sgblack@eecs.umich.edu    if (rw_val != TwoPhase)
1945443Sgblack@eecs.umich.edu        panic("Only LSB/MSB read/write is implemented.\n");
1955443Sgblack@eecs.umich.edu}
1965443Sgblack@eecs.umich.edu
1975443Sgblack@eecs.umich.eduvoid
1985443Sgblack@eecs.umich.eduIntel8254Timer::Counter::setMode(int mode_val)
1995443Sgblack@eecs.umich.edu{
2005443Sgblack@eecs.umich.edu    if(mode_val != InitTc && mode_val != RateGen &&
2015443Sgblack@eecs.umich.edu       mode_val != SquareWave)
2025443Sgblack@eecs.umich.edu        panic("PIT mode %#x is not implemented: \n", mode_val);
2035443Sgblack@eecs.umich.edu
2045443Sgblack@eecs.umich.edu    mode = mode_val;
2055443Sgblack@eecs.umich.edu}
2065443Sgblack@eecs.umich.edu
2075443Sgblack@eecs.umich.eduvoid
2085443Sgblack@eecs.umich.eduIntel8254Timer::Counter::setBCD(int bcd_val)
2095443Sgblack@eecs.umich.edu{
2105443Sgblack@eecs.umich.edu    if (bcd_val)
2115443Sgblack@eecs.umich.edu        panic("PITimer does not implement BCD counts.\n");
2125443Sgblack@eecs.umich.edu}
2135443Sgblack@eecs.umich.edu
2145443Sgblack@eecs.umich.edubool
2155443Sgblack@eecs.umich.eduIntel8254Timer::Counter::outputHigh()
2165443Sgblack@eecs.umich.edu{
2175443Sgblack@eecs.umich.edu    return output_high;
2185443Sgblack@eecs.umich.edu}
2195443Sgblack@eecs.umich.edu
2205443Sgblack@eecs.umich.eduvoid
2215443Sgblack@eecs.umich.eduIntel8254Timer::Counter::serialize(const string &base, ostream &os)
2225443Sgblack@eecs.umich.edu{
2236067Sgblack@eecs.umich.edu    paramOut(os, base + ".initial_count", initial_count);
2245443Sgblack@eecs.umich.edu    paramOut(os, base + ".latched_count", latched_count);
2255443Sgblack@eecs.umich.edu    paramOut(os, base + ".period", period);
2265443Sgblack@eecs.umich.edu    paramOut(os, base + ".mode", mode);
2275443Sgblack@eecs.umich.edu    paramOut(os, base + ".output_high", output_high);
2285443Sgblack@eecs.umich.edu    paramOut(os, base + ".latch_on", latch_on);
2295443Sgblack@eecs.umich.edu    paramOut(os, base + ".read_byte", read_byte);
2305443Sgblack@eecs.umich.edu    paramOut(os, base + ".write_byte", write_byte);
2317683Ssteve.reinhardt@amd.com
2327683Ssteve.reinhardt@amd.com    Tick event_tick = 0;
2337683Ssteve.reinhardt@amd.com    if (event.scheduled())
2347683Ssteve.reinhardt@amd.com        event_tick = event.when();
2355443Sgblack@eecs.umich.edu    paramOut(os, base + ".event_tick", event_tick);
2365443Sgblack@eecs.umich.edu}
2375443Sgblack@eecs.umich.edu
2385443Sgblack@eecs.umich.eduvoid
2395443Sgblack@eecs.umich.eduIntel8254Timer::Counter::unserialize(const string &base, Checkpoint *cp,
2405443Sgblack@eecs.umich.edu                                         const string &section)
2415443Sgblack@eecs.umich.edu{
2426067Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".initial_count", initial_count);
2435443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".latched_count", latched_count);
2445443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".period", period);
2455443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".mode", mode);
2465443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".output_high", output_high);
2475443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".latch_on", latch_on);
2485443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".read_byte", read_byte);
2495443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".write_byte", write_byte);
2505443Sgblack@eecs.umich.edu
2517903Shestness@cs.utexas.edu    Tick event_tick = 0;
2527903Shestness@cs.utexas.edu    if (event.scheduled())
2537903Shestness@cs.utexas.edu        parent->deschedule(event);
2545443Sgblack@eecs.umich.edu    paramIn(cp, section, base + ".event_tick", event_tick);
2555443Sgblack@eecs.umich.edu    if (event_tick)
2565606Snate@binkert.org        parent->schedule(event, event_tick);
2575443Sgblack@eecs.umich.edu}
2585443Sgblack@eecs.umich.edu
2595443Sgblack@eecs.umich.eduIntel8254Timer::Counter::CounterEvent::CounterEvent(Counter* c_ptr)
2605443Sgblack@eecs.umich.edu{
2617064Snate@binkert.org    interval = (Tick)(SimClock::Float::s / 1193180.0);
2625443Sgblack@eecs.umich.edu    counter = c_ptr;
2635443Sgblack@eecs.umich.edu}
2645443Sgblack@eecs.umich.edu
2655443Sgblack@eecs.umich.eduvoid
2665443Sgblack@eecs.umich.eduIntel8254Timer::Counter::CounterEvent::process()
2675443Sgblack@eecs.umich.edu{
2685443Sgblack@eecs.umich.edu    switch (counter->mode) {
2695443Sgblack@eecs.umich.edu      case InitTc:
2705443Sgblack@eecs.umich.edu        counter->output_high = true;
2715444Sgblack@eecs.umich.edu        break;
2725443Sgblack@eecs.umich.edu      case RateGen:
2735443Sgblack@eecs.umich.edu      case SquareWave:
2745444Sgblack@eecs.umich.edu        setTo(counter->period);
2755443Sgblack@eecs.umich.edu        break;
2765443Sgblack@eecs.umich.edu      default:
2775443Sgblack@eecs.umich.edu        panic("Unimplemented PITimer mode.\n");
2785443Sgblack@eecs.umich.edu    }
2795642Sgblack@eecs.umich.edu    counter->parent->counterInterrupt(counter->num);
2805443Sgblack@eecs.umich.edu}
2815443Sgblack@eecs.umich.edu
2825444Sgblack@eecs.umich.eduvoid
2835444Sgblack@eecs.umich.eduIntel8254Timer::Counter::CounterEvent::setTo(int clocks)
2845444Sgblack@eecs.umich.edu{
2855444Sgblack@eecs.umich.edu    if (clocks == 0)
2865444Sgblack@eecs.umich.edu        panic("Timer can't be set to go off instantly.\n");
2877823Ssteve.reinhardt@amd.com    DPRINTF(Intel8254Timer, "Timer set to curTick() + %d\n",
2885444Sgblack@eecs.umich.edu            clocks * interval);
2897823Ssteve.reinhardt@amd.com    counter->parent->schedule(this, curTick() + clocks * interval);
2905444Sgblack@eecs.umich.edu}
2915444Sgblack@eecs.umich.edu
2926067Sgblack@eecs.umich.eduint
2936067Sgblack@eecs.umich.eduIntel8254Timer::Counter::CounterEvent::clocksLeft()
2946067Sgblack@eecs.umich.edu{
2956067Sgblack@eecs.umich.edu    if (!scheduled())
2966067Sgblack@eecs.umich.edu        return -1;
2977823Ssteve.reinhardt@amd.com    return (when() - curTick() + interval - 1) / interval;
2986067Sgblack@eecs.umich.edu}
2996067Sgblack@eecs.umich.edu
3005443Sgblack@eecs.umich.educonst char *
3015443Sgblack@eecs.umich.eduIntel8254Timer::Counter::CounterEvent::description() const
3025443Sgblack@eecs.umich.edu{
3035642Sgblack@eecs.umich.edu    return "Intel 8254 Interval timer";
3045443Sgblack@eecs.umich.edu}
305